DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 1-7 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by US 2014/0070300 A1 (Jang).
Re claim 1, Jang teaches a semiconductor device, comprising:
insulating layers (first insulation layer patterns 115) disposed in a first direction (first direction) and spaced apart from each other in the first direction;
pillars (vertical structures defined by semiconductor pattern 160, second insulation pattern 260 and channels 252) passing through the insulating layers;
a slit (third insulation pattern 380 and division layer pattern 130) passing through the insulating layers;
a nitrogen-containing layer (first barrier layer pattern 302 which is a conductive metal nitride [0081] and/or second barrier layer pattern 312 which is a conductive metal nitride [0091]) formed along a space between adjacent insulating layers in the first direction, the nitrogen-containing layer formed around the slit so that a gap between the pillars in the space is exposed; and
a conductive pattern (first filling layer pattern 322 [0085]) in the space to fill the gap between the pillars,
wherein the conductive pattern extends continuously from the gap to overlap the nitrogen-containing layer in the first direction (Figs. 2-5).
PNG
media_image1.png
673
460
media_image1.png
Greyscale
Re claim 2, Jang teaches wherein each of the pillars is formed in a through-hole (plurality of holes 150), the through-hole passing through the insulating layers and being surrounded by the conductive pattern (Figs. 2-5), and wherein each of the pillar includes a memory layer (first charge storage pattern 182) over an inner-wall of the through-hole and a semiconductor pattern (channel layers 252 [0130]) over an inner-wall of the memory layer (Fig. 5).
PNG
media_image2.png
701
497
media_image2.png
Greyscale
Re claim 3, Jang teaches wherein the conductive pattern surrounds a side-wall of the memory layer (Fig. 5).
Re claim 4, Jang teaches wherein the pillars include an outer pillar adjacent to the slit (Fig. 3).
PNG
media_image3.png
697
470
media_image3.png
Greyscale
Re claim 5, Jang teaches wherein the nitrogen-containing layer partially surrounds a side-wall of the outer pillar (second barrier layer 312 Fig. 3).
Re claim 6, Jang teaches wherein a side-wall of the outer pillar includes a first portion (leftmost side) facing the slit and a second portion (rightmost side) facing the gap between the pillars, and wherein the nitrogen-containing layer is formed over the first portion of the outer pillar (second barrier layer 312 Fig. 3).
Re claim 7, Jang teaches wherein the nitrogen-containing layer entirely surrounds a side-wall of the outer pillar (first barrier layer 302 Fig. 3).
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to BRIGITTE A PATERSON whose telephone number is (571)272-1752. The examiner can normally be reached Monday-Friday 9:00AM-5:00PM.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, William Kraig can be reached at 571-272-8660. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
BRIGITTE A. PATERSON
Primary Examiner
Art Unit 2896
/BRIGITTE A PATERSON/Primary Examiner, Art Unit 2896
Prosecution Insights