Prosecution Insights
Last updated: October 01, 2026
Application No. 18/644,445

SENSING DEVICE

Non-Final OA §102
Filed
Apr 24, 2024
Priority
May 24, 2023 — CN 202310590720.7
Examiner
ENAD, CHRISTINE A
Art Unit
Tech Center
Assignee
Innolux Corporation
OA Round
1 (Non-Final)
84%
Grant Probability
Favorable
1-2
OA Rounds
0m
Est. Remaining
95%
With Interview

Examiner Intelligence

Grants 84% — above average
84%
Career Allowance Rate
1149 granted / 1361 resolved
+24.4% vs TC avg
Moderate +10% lift
Without
With
+10.3%
Interview Lift
resolved cases with interview
Fast prosecutor
1y 12m
Avg Prosecution
28 currently pending
Career history
1398
Total Applications
across all art units

Statute-Specific Performance

§101
1.7%
-38.3% vs TC avg
§103
64.5%
+24.5% vs TC avg
§102
19.3%
-20.7% vs TC avg
§112
8.1%
-31.9% vs TC avg
Black line = Tech Center average estimate • Based on career data from 1361 resolved cases

Office Action

§102
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claims 1-20 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Di et al (Publication No. CN-113432725-A). PNG media_image1.png 682 459 media_image1.png Greyscale Regarding claim 1, Di discloses a sensing device, comprising: a substrate Fig 2, 103; a circuit layer Fig 2, 1 disposed on the substrate, and provided with a plurality of driving circuits Fig 1 and Fig 2; and a plurality of sensing units Fig 2, 2 disposed on the circuit layer, each sensing unit including: a supporting part electrically connected to one of the driving circuits Fig 1-2 Page 11; and a sensing part electrically connected to the supporting part Fig 1-2, and separated from the circuit layer by a first cavity through the supporting part Fig 1-2 Page 10-11, wherein at least part of the supporting part overlaps with the sensing part in a normal direction of the substrate Fig 1-2 Page 10-11. Regarding claim 2, Di discloses wherein the supporting part at least partially overlaps with the sensing part of another sensing unit in a normal direction of the substrate Fig 1-2 Page 10-11. Regarding claim 3, Di discloses wherein the supporting part is disposed between the substrate and the sensing part of the another sensing unit Fig 1-4. Regarding claim 4, Di discloses wherein the sensing part does not overlap with the one of the driving circuits in a normal direction of the substrate Fig 1-4 and Fig 15. Regarding claim 5, Di discloses a bias line Fig 18 Page 26-27 disposed on the substrate, wherein the supporting part includes a first supporting member and a second supporting member, the first supporting member is electrically connected to the one of the driving circuits, and the second supporting member is electrically connected to the bias line Fig 1-4 and Fig 18 Page 26-27. Regarding claim 6, Di discloses wherein an included angle between an extension direction of the first supporting member and an extension direction of the second supporting member is between 0 and 10 degrees Fig 1-4. Regarding claim 7, Di discloses wherein an included angle between an extension direction of the second supporting member and an extension direction of the bias line is between 0 and 20 degrees Fig 1-4 and Fig 18 Page 26-27. Regarding claim 8, Di discloses wherein an included angle between the extension direction of the second supporting member and an extension direction of the bias line is between 10 and 20 degrees Fig 1-4 and Fig 18 Page 26-27. Regarding claim 9, Di discloses wherein an extension direction of the first supporting member is parallel to an extension direction of the second supporting member Fig 1-4 and Fig 18 Page 26-27. Regarding claim 10, Di discloses wherein an extension direction of the second supporting member is parallel to an extension direction of the bias line Fig 1-4 and Fig 18 Page 26-27. Regarding claim 11, Di discloses a bias line disposed on the substrate, wherein the supporting part of one of the sensing units and the supporting part of another one of the sensing units are designed to be mirrors with the bias line Fig 1-4 and Fig 18 Page 26-27. Regarding claim 12, Di discloses wherein the first supporting member 61 of the sensing unit at least partially overlaps with the sensing part of the sensing unit and at least partially overlaps with the sensing part of another sensing unit, and the second supporting member of the sensing unit at least partially overlaps with the sensing part of the sensing unit and at least partially overlaps with the sensing part of another sensing unit Fig 1-4 and Fig 15-18. Regarding claim 13, Di discloses wherein one end of the second supporting member of the sensing unit that is electrically connected to the bias line and one end of the second supporting member of another sensing unit that is electrically connected to the bias line are connected to each other Fig 1-4 and Fig 18 Page 26-27. . Regarding claim 14, Di discloses wherein one end of the second supporting member of the sensing unit that is electrically connected to the bias line and one end of the second supporting member of another sensing unit that is electrically connected to the bias line are separated from each other Fig 1-4 and Fig 18 Page 26-27. Regarding claim 15, Di discloses, wherein the circuit layer further includes a first insulating layer, a second insulating layer, a third insulating layer and a fourth insulating layer, the first insulating layer is disposed on the substrate, the second insulating layer is disposed on the first insulating layer, the third insulating layer is disposed on the second insulating layer, and the fourth insulating layer is disposed on the third insulating layer Fig 1-4 Page 10-11. Regarding claim 16, Di discloses wherein one of the driving circuits includes a drain/source electrode, a source/drain electrode, a gate electrode and a semiconductor layer, the one of the driving circuits is disposed on the first insulating layer, and the source/drain electrode of the one of the driving circuits passes is electrically connected to the first supporting member of the supporting part through a conductive connecting member Fig 1-4 Page 10-11.. Regarding claim 17, Di discloses wherein a fifth insulating layer is provided around the first supporting member of the supporting part, and the first supporting member is fixed to the connecting member on the fourth insulating layer through a first fixing member, and wherein another fifth insulating layer is provided around the second supporting member, and the second supporting member is fixed to another connecting member on the fourth insulating layer and electrically connected to the bias line through another first fixing member Fig 1-4 Page 10-11.. Regarding claim 18, Di discloses wherein the sensing part of the sensing unit includes a sensing layer, a sixth insulating layer, at least one absorbing component and at least one second fixing member, the sensing layer is disposed on the at least one absorbing component, the sixth insulating layer is disposed on the sensing layer, one of the at least one absorbing component is fixed to the first supporting member through one of the at least one second fixing member, and another one of the at least one absorbing component is fixed to the second supporting member through the another one of the at least one second fixing member Fig 1-4 Page 10-11. Regarding claim 19, Di discloses wherein the fourth insulating layer is provided with a reflective layer Fig 2, 4 disposed between the sensing layer and the fourth insulating layer Fig 1-2 Page 10-11. Regarding claim 20, Di discloses wherein the first supporting member and the second supporting member of each sensing unit at least partially overlap with the sensing part of the sensing unit and, in the normal direction of the substrate, the sensing part of the sensing unit overlaps with the driving circuit electrically connected to the sensing unit Fig 1-4 Page 10-11. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to CHRISTINE A ENAD whose telephone number is (571)270-7891. The examiner can normally be reached Monday-Friday, 7:30 am -4:30 pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Lynne Gurley can be reached at 571 272 1670. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /CHRISTINE A ENAD/Primary Examiner, Art Unit 2811
Read full office action

Prosecution Timeline

Apr 24, 2024
Application Filed
Aug 31, 2026
Non-Final Rejection mailed — §102 (current)

Precedent Cases

Applications granted by this same examiner with similar technology

Patent 12751029
STRUCTURE AND FORMATION METHOD OF SEMICONDUCTOR DEVICE WITH POWER RAIL
4y 2m to grant Granted Sep 29, 2026
Patent 12751039
CONTACT STRUCTURE WITH ARCHED TOP SURFACE AND FABRICATION METHOD THEREOF
3y 8m to grant Granted Sep 29, 2026
Patent 12745413
SYSTEM AND METHODS OF MANUFACTURING SEMICONDUCTOR DEVICES
3y 1m to grant Granted Sep 22, 2026
Patent 12745414
SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
2y 9m to grant Granted Sep 22, 2026
Patent 12733200
NON-EPITAXIAL ELECTRICAL COUPLING BETWEEN A FRONT SIDE TRENCH CONNECTOR AND BACK SIDE CONTACTS OF A TRANSISTOR
4y 5m to grant Granted Sep 08, 2026
Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
84%
Grant Probability
95%
With Interview (+10.3%)
1y 12m (~0m remaining)
Median Time to Grant
Low
PTA Risk
Based on 1361 resolved cases by this examiner. Grant probability derived from career allowance rate.

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