Prosecution Insights
Last updated: April 19, 2026
Application No. 18/644,473

TEST AND/OR MEASUREMENT SYSTEM

Non-Final OA §102§103
Filed
Apr 24, 2024
Examiner
HOQUE, FARHANA AKHTER
Art Unit
2858
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Rohde & Schwarz GmbH & Co. Kg
OA Round
1 (Non-Final)
86%
Grant Probability
Favorable
1-2
OA Rounds
2y 6m
To Grant
97%
With Interview

Examiner Intelligence

Grants 86% — above average
86%
Career Allow Rate
737 granted / 859 resolved
+17.8% vs TC avg
Moderate +11% lift
Without
With
+11.2%
Interview Lift
resolved cases with interview
Typical timeline
2y 6m
Avg Prosecution
21 currently pending
Career history
880
Total Applications
across all art units

Statute-Specific Performance

§101
2.1%
-37.9% vs TC avg
§103
46.8%
+6.8% vs TC avg
§102
42.2%
+2.2% vs TC avg
§112
5.3%
-34.7% vs TC avg
Black line = Tech Center average estimate • Based on career data from 859 resolved cases

Office Action

§102 §103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Rejections - 35 USC § 102 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claims 1-15, 17 and 18-20 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Schmid (U.S. Publication No. 2021/0143918 A1). With respect to claim 1, Schmid (U.S. Publication No. 2021/0143918 A1) discloses a test and/or measurement system, comprising: a signal generator circuit comprising a processing circuit (see signal generator 10 shown in Fig. 1 which is connected to a control module 21; para 0046, lines 1-11), wherein the processing circuit is configured to: generate and/or process a predetermined waveform (the signal generators 12 and 14 are established as waveform generators that have amplitude, frequency and phase which can be generated in independent output channels para 0041, lines 1-6), wherein the predetermined waveform comprises at least one critical portion (para 0005, lines 1-6); control the signal generator circuit to generate a radio frequency, RF, signal, based on the predetermined waveform (para 0019, lines 1-3), wherein the generated RF signal comprises the predetermined waveform (the signal generators 12 and 14 are established as waveform generators that have amplitude, frequency and phase which can be generated in independent output channels para 0041, lines 1-6) and adapt operational parameters of the signal generator circuit such that a signal level of the at least one critical portion of the RF signal generated fulfills at least one predefined criterion (para 0009, lines 1-5). With respect to claim 2, Schmid discloses the test and/or measurement system of claim 1, wherein the signal generator circuit is configured to generate the complete RF signal based on the operational parameters adapted by the processing circuit (“calibration parameters are determined based on the determined power parameters. The determined calibration parameters can then be used to generate the first signal and the second signal with the desired phase difference.”; the first and second signals are radio frequency signals as stated in para 0009). With respect to claim 3, Schmid discloses the test and/or measurement system of claim 1, wherein the processing circuit is configured to apply a signal processing algorithm for equalizing the at least one critical portion, wherein the processing circuit is configured to apply said signal processing algorithm to the complete predetermined waveform (para 0087, lines 1-11; a computer program having software of firmware instruction to cause the device to perform one or more protocols). With respect to claim 4, Schmid discloses the test and/or measurement system of claim 1, wherein the at least one predefined criterion relates to a maximum allowable signal level of the at least one critical portion , a maximum actual signal level of the at least one critical portion, the maximum actual signal level compared to the maximum allowable signal level, a dynamic range of an amplifier processing the RF signal, a dynamic range of an attenuator processing the RF signal, and/or a clipping of the at least one critical portion (“calibration parameters are determined based on the determined power parameters. The determined calibration parameters can then be used to generate the first signal and the second signal with the desired phase difference.”; the first and second signals are radio frequency signals as stated in para 0009). With respect to claim 5, Schmid discloses the test and/or measurement system of claim 1, wherein the signal generator circuit is configured to generate and output an indicator signal (see signal generator 10 shown in Fig. 1 which is connected to a control module 21; para 0046, lines 1-11), and wherein the indicator signal indicates that the at least one critical portion is output, or wherein the indicator signal indicates that an uncritical portion of the RF signal is output (col. 6, lines 1-20). With respect to claim 6, Schmid discloses the test and/or measurement system of claim 1, wherein the processing circuit is configured to identify the at least one critical portion based on at least one of a communication standard underlying the predetermined waveform, a user input, information included in the predetermined waveform (para 0019, lines 1-3), or a command signal received by the signal generator circuit (see signal generator 10 shown in Fig. 1 which is connected to a control module 21; para 0046, lines 1-11). With respect to claim 7, Schmid discloses the test and/or measurement system of claim 6, further comprising a signal analysis circuit configured to generate the command signal and/or a control circuit configured to generate the command signal (see control module 21 shown in Fig. 1; each of these components may comprise one or more circuits for carrying out its respective functionality). With respect to claim 8, Schmid discloses the test and/or measurement system of claim 1, wherein the signal generator circuit further comprises at least one amplifier circuit being configured to amplify the RF signal and/or at least one attenuator circuit being configured to attenuate the RF signal, wherein the processing circuit is configured to adapt operational parameters of the signal generator circuit such that at least a predetermined portion of a dynamic range of the at least one amplifier circuit and/or of the at least one attenuator circuit is utilized (see generator system 10 shown in Fig. 1; para 0041, lines 1-5). With respect to claim 9, Schmid discloses the test and/or measurement system of claim 1, wherein the processing circuit is configured to adapt the operational parameters of the signal generator circuit taking memory effects of the signal generator circuit, memory effects of a device under test, and/or memory effects of a signal analysis circuit into account (para 0085, lines 1-11). With respect to claim 10, Schmid discloses the test and/or measurement system of claim 1, further comprising a signal analysis circuit, wherein the signal analysis circuit is configured to analyze an output signal of a device under test (para 0083, lines 1-10), thereby obtaining analysis data, wherein the output signal comprises the predetermined waveform (para 0041, lines 1-10). With respect to claim 11, Schmid discloses the test and/or measurement system of claim 10, wherein the signal generator circuit is connectable to an input of the device under test (para 0041, lines 1-7). With respect to claim 12, Schmid discloses the test and/or measurement system of claim 10, further comprising a visualization circuit, wherein the visualization circuit is configured to visualize the analysis data, and wherein the visualization circuit is configured to indicate the at least one critical portion (para 0085, lines 1-11). With respect to claim 13, Schmid discloses the test and/or measurement system of claim 12, wherein the visualization circuit is configured to visualize the at least one critical portion different compared to uncritical portions of the predetermined waveform (para 0087, lines 1-11; a computer program having software of firmware instruction to cause the device to perform one or more protocols). With respect to claim 14, Schmid discloses the test and/or measurement system of claim 13, wherein the visualization circuit is configured to visualize the at least one critical portion with a different color and/or shading compared to uncritical portions of the predetermined waveform (para 0009, lines 1-5). With respect to claim 15, Schmid discloses the test and/or measurement system of claim 10, wherein the signal analysis circuit is configured to identify the at least one critical portion based on at least one of a communication standard underlying the predetermined waveform (para 0087, lines 1-11; a computer program having software of firmware instruction to cause the device to perform one or more protocols), a user input, information included in the predetermined waveform, or an indicator signal received from the signal generator circuit (para 0021, lines 1-4). With respect to claim 17, the test and/or measurement system of claim 10 comprising a first housing and a second test and/or measurement instrument having a second housing (see signal generator 10 shown in Fig. 1; comprised in a first housing), wherein the first housing and the second housing are separate from each other, wherein the signal generator circuit is arranged in the first housing, and wherein the signal analysis circuit is arranged in the second housing (see second signal generator 14 shown in Fig. 1 comprised in a separate housing). With respect to claim 18, Schmid discloses the test and/or measurement system of claim 10, wherein the signal analysis circuit is configured to determine at least one figure of merit of the output signal (para 0021, lines 1-12). With respect to claim 19, Schmid discloses the test and/or measurement system of claim 1, wherein the at least one critical portion corresponds to a payload portion (para 0005, lines 2-6). With respect to claim 20, Schmid discloses the test and/or measurement system of claim 1, wherein at least one uncritical portion of the predetermined waveform corresponds to a preamble (para 0005, lines 2-6). Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. The text of those sections of Title 35, U.S. Code not included in this action can be found in a prior Office action. Claim 16 is rejected under 35 U.S.C. 103 as being unpatentable over Schmid (U.S. Publication No. 2021/0143918 A1) in view of El-Assir et al. (U.S. Patent No. 11,609,343 B2). With respect to claim 16, Schmid discloses the test and/or measurement system of claim 10. Schmid does not disclose comprising a test and/or measurement instrument having a housing, wherein the signal generator circuit and the signal analysis circuit each are arranged in the housing. El-Assir et al. discloses comprising a test and/or measurement instrument having a housing, wherein the signal generator circuit and the signal analysis circuit each are arranged in the housing (col. 2, lines 20-25). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the device of Schmid to include comprising a test and/or measurement instrument having a housing, wherein the signal generator circuit and the signal analysis circuit each are arranged in the housing as taught by El-Assir to allow for a compact device. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to FARHANA AKHTER HOQUE whose telephone number is (571)270-7543. The examiner can normally be reached Monday-Friday, 7:30am-4:00pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Eman A Alkafawi can be reached at 571-272-4448. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /FARHANA A HOQUE/Primary Examiner, Art Unit 2858
Read full office action

Prosecution Timeline

Apr 24, 2024
Application Filed
Jun 11, 2024
Response after Non-Final Action
Dec 12, 2025
Non-Final Rejection — §102, §103 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
86%
Grant Probability
97%
With Interview (+11.2%)
2y 6m
Median Time to Grant
Low
PTA Risk
Based on 859 resolved cases by this examiner. Grant probability derived from career allow rate.

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