Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Information Disclosure Statement
The Information Disclosure Statement filed on 11/04/2024 has been acknowledged and considered by examiner.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION. —The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claim 5 is rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claim 5 recites the limitation “the controller”. There is insufficient antecedent basis for this limitation in the claim. The interpretation being used in the rejections below is that “the controller” of claim 5 is the same controller recited in claim 4. A possible correction would be to have claim 5 depend on claim 4.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-10, 14, 16, and 18-20 are rejected under 35 U.S.C. 103 as being unpatentable over US 20130241653 A1 (Gilbert) in view of US 20150137840 A1 (Whittington).
With regards to claim 1, Gilbert teaches a test and measurement instrument (“instrumentation input system" ([0008])) having an integrated analog front end ("especially well suited for use as a front end for an oscilloscope" ([0028])), comprising:
one or more amplifiers, the one or more amplifiers implemented on a high-speed amplifier integrated circuit die (“fixed gain main amplifiers 50" ([0043]) that are high-bandwidth and implemented on a "second IC 48" (FIG. 6));
a controlled-impedance signal path between an input and a reference voltage, the controlled-impedance signal path including one or more signal taps, ("attenuator 76 that generates a series of progressively attenuated outputs" ([0054]). These outputs function as the "signal taps")
and one or more controlled-impedance attenuator stages, the one or more controlled-impedance attenuator stages implemented on the amplifier integrated circuit die ("variable attenuators 52" are "fabricated on a second IC 48" ([0043]));
Gilbert does not teach:
and a switching network structured to selectively couple a signal tap of the controlled-impedance signal path to a respective amplifier of the one or more amplifiers, the switching network implemented on the amplifier integrated circuit die.
However, Whittington teaches a switching network ("switching network established using low-voltage switches" ([0010])) structured to selectively couple a signal tap ("selectively couple" signal paths ([0013])) of the controlled-impedance signal path to a respective amplifier (the switching network couples the path to the "amplifier 822" ([0049])), the switching network implemented on the amplifier integrated circuit die (the switching transistors M4, M6 and the switching network are "located inside IC 802" ([0049]), which is the same "custom integrated circuit" housing the amplifier 822).
It would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to have modified the high-bandwidth distributed amplifier stages of Gilbert by incorporating the switching network of Whittington wherein a switching network structured to selectively couple a signal tap of the controlled-impedance signal path to a respective amplifier of the one or more amplifiers, the switching network implemented on the amplifier integrated circuit die. This would be done to achieve the "miniaturization and robustness" and avoidance of "parasitic resistance, capacitance, and/or inductance" taught by Whittington ([0007]).
With regards to claim 2, Gilbert as modified by Whittington does not teach further comprising a multiplexer having inputs coupled to the outputs of the one or more amplifiers and structured to output an amplified signal from a selected amplifier of the one or more amplifiers.
However, Whittington teaches a multiplexer ("switching core" ([0009]) comprising transistor devices M30 through M33 ([0050])) having inputs coupled to the outputs of the one or more amplifiers (the switching core is "coupled to the voltage converter output" [0013]) and structured to output an amplified signal from a selected amplifier of the one or more amplifiers ("operated to selectively couple a selected respective feedback network to the voltage converter output" ([0013]) to provide the final output signal).
It would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to have modified the instrumentation input system of Gilbert as modified by Whittington by incorporating the switching core of Whittington wherein a multiplexer having inputs coupled to the outputs of the one or more amplifiers and structured to output an amplified signal from a selected amplifier of the one or more amplifiers. While Gilbert provides a gain selection function ([0047]), incorporating the multiplexer at the output stage as taught by Whittington allows for isolated selection of the amplified signal path. This is beneficial because it prevents "blow-by" or signal leakage from non-selected amplifier stages from reaching the final output, thereby maintaining signal integrity and improving the signal-to-noise ratio (SNR) as required by Gilbert ([0046], [0053]).
With regards to claim 3, Gilbert as modified by Whittington does not teach
wherein the multiplexer is implemented on the amplifier integrated circuit die.
However, Whittington identifies the entire system as being built around a "custom integrated circuit 802" ([0049]) and that the output switching components are implemented "inside IC 802" ([0049] - [0050]), which is the same custom integrated circuit die containing the amplifier (822).
It would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to have modified the instrumentation input system of Gilbert by incorporating the switching core of Whittington wherein the multiplexer is implemented on the amplifier integrated circuit die. This would be done to achieve the "miniaturization and robustness" and avoidance of "parasitic resistance, capacitance, and/or inductance" taught by Whittington ([0007]).
With regards to claim 4, Gilbert as modified by Whittington does not teach:
further comprising a controller structured to control operation of the switching network and the multiplexer.
However, Whittington teaches a "control circuit" ([0010]) and specifies that the "switching network... may each be operated according to digital control inputs, or digital control signals" ([0014]). The same "digital control signals" and internal "current sources" ([0049]) are taught to operate the "switching core" (multiplexer) that selects the signal pathways ([0009], [0014]).
It would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to have modified the instrumentation input system of Gilbert by incorporating the controller of Whittington to provide a digital programming interface to reliably and precisely toggle the integrated switches between the various signal taps and output paths.
With regards to claim 5, Gilbert as modified by Whittington does not explicitly teach:
in which the controller is configured to turn off power to non-selected amplifiers of the one or more amplifiers.
However, Gilbert teaches a multi-stage amplifier system where the stages are "activated sequentially as the gain increases" ([0046]).
Whittington further teaches an integrated architecture where the "current sources enabled to turn on these switches are provided by transistor devices... located inside IC 802" ([0049]).
It would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to have modified the instrumentation input system of Gilbert by incorporating the controller of Whittington in which the controller is configured to turn off power to non-selected amplifiers of the one or more amplifiers to achieve a "better signal-to-noise ratio (SNR)" ([0046]) and to avoid "blow-by" or leakage from inactive stages ([0053]) as taught by Gilbert and to selectively enable power or bias only to active circuit components.
With regards to claim 6, Gilbert as modified by Whittington teaches:
(citations to Whittington unless otherwise indicated) the switching network comprises a switching circuit associated with each amplifier ("one or more PIN diode circuits that selectively couple a respective non-selected input network... to signal ground" ([0012])), the switching circuit comprising a PIN diode ("the improved circuit in FIG. 6 may feature a PIN diode with high current handling capability" ([0047]) and specifically identifies "PIN diode (D1) 408" ([0047]) as the switching component).
With regards to claim 7, Gilbert does not explicitly teach:
wherein each amplifier of the one or more amplifiers has a different gain.
However, Whittington teaches wherein each amplifier of the one or more amplifiers has a different gain (Whittington describes an integrated architecture where "three gain settings are possible" ([0049]). Specifically, different input networks are coupled to the amplifier 822 to produce different gain ratios, effectively creating a series of amplifiers with distinct gain profiles depending on which input network is active).
It would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to have modified amplifiers of Gilbert by incorporating the teachings of Whittington wherein each amplifier of the one or more amplifiers has a different gain to accommodate a "wide range of possible input amplitudes" ([0009]) and ensure that the input signal is properly scaled for subsequent stages while optimizing the signal-to-noise ratio of the integrated front end.
With regards to claim 8, Gilbert teaches wherein at least one of the one or more amplifiers has a predetermined gain ("fixed gain main amplifiers 50" ([0043])).
With regards to claim 9, Gilbert as modified by Whittington teaches at least one of the one or more amplifiers has a programmable gain (Gilbert teaches a "series of variable attenuators and amplifiers" ([0041]) and specifies the use of a "digital programming interface 62" ([0043]) to control and adjust parameters).
Gilbert as modified by Whittington does not teach the specific switch-based variable capacitance structure for gain control.
However, Whittington teaches an "adjustable capacitance circuit" ([0014]) and a "switch-based variable capacitance feedback circuit" ([0044]) used to adjust the gain of the amplifier (822) according to "digital control signals" ([0014]).
It would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to implement the programmable gain of Gilbert using the digitally-controlled hardware structures of Whittington because it provides a predictable and precise method for adjusting circuit parameters in discrete steps on a single die.
With regards to claim 10, Gilbert as modified by Whittington does not teach:
wherein each attenuator stage of the one or more attenuator stages has a different attenuation factor.
However, Whittington teaches that "three gain settings are possible depending on which input path is selected," specifically identifying the discrete attenuation ratios of "1/100... 1/10... or unity" ([0049]).
It would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to have modified the attenuator stages of Gilbert by incorporating the teachings of Whittington wherein each attenuator stage of the one or more attenuator stages has a different attenuation factor to accommodate the "wide range of possible input amplitudes" ([0009]).
With regards to claim 14, Gilbert as modified by Whittington teaches a first signal tap is connected to the controlled-impedance signal path between the input and a first attenuator stage to selectively couple an unattenuated input signal to a respective first amplifier.
Specifically, Gilbert teaches a differential architecture where an input signal is applied to an input terminal ([0033]). Gilbert describes that this input signal is coupled to a "steering core" (amplifier stage) to provide gain ([0053]). Gilbert discloses an "attenuator network" ([0031]) for larger signals, and explicitly teaches a high-sensitivity mode to view "fine levels of detail in small signals" ([0027]). Whittington further teaches an input network where one path is a "fixed pathway" directly to the amplifier input ([0009]).
It would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to connect a first signal tap before the first attenuator stage to provide an unattenuated signal path to the amplifier. This enables a "maximum sensitivity" setting, ensuring that the smallest detectable signals are not degraded by the SNR loss inherent in an attenuation stage, as suggested by both Gilbert ([0027]) and Whittington ([0009]).
With regards to claim 16, Gilbert teaches wherein the reference voltage is ground ("other input terminal INM may be coupled to any suitable point such as a ground" ([0033]). Furthermore, in the context of the variable gain amplifier and steering core, Gilbert describes the use of a "ground node" as a reference to prevent leakage and ensure proper switching operation ([0055])).
With regards to claim 18, Gilbert as modified by Whittington teaches:
wherein the amplifier integrated circuit die includes a pin structured to receive a programmable termination voltage as the reference voltage.
Specifically, Gilbert teaches a "digital programming interface 62" and a "DAC 18" ([0044], [0027]) used to generate a precise "programmable slideback" or "centering signal" applied to a reference node to center the signal ([0027], [0049]). Gilbert further discloses that this reference voltage is provided to a terminal (pin) of the amplifier stage to force the signal node to a desired programmable potential ([0080] - [0081]).
It would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to utilize the programmable centering/reference voltage pin of Gilbert in the modified switching network of Whittington to provide a stable, adjustable reference point for the integrated signal taps, ensuring accurate signal measurement across different gain settings.
With regards to claim 19, Gilbert teaches wherein the test and measurement instrument comprises an oscilloscope (“especially well suited for use as a front end for an oscilloscope” ([0028])).
With regards to claim 20, Gilbert teaches an integrated circuit (“instrumentation input system" ([0008])) providing an analog front end for an oscilloscope ("especially well suited for use as a front end for an oscilloscope" ([0028])), comprising:
one or more amplifiers (“fixed gain main amplifiers 50" ([0043]));
a controlled-impedance signal path between an input and a reference voltage, the controlled-impedance signal path including one or more signal taps (("attenuator 76 that generates a series of progressively attenuated outputs" ([0054]). These outputs function as the "signal taps".)
and one or more controlled-impedance attenuator stages ("variable attenuators 52" ([0043] - [0044]));
Gilbert does not teach:
and a switching network structured to selectively couple a signal tap of the controlled- impedance signal path to a respective amplifier of the one or more amplifiers.
However, Whittington teaches a switching network ("switching network established using low-voltage switches" ([0010])) structured to selectively couple a signal tap ("selectively couple" signal paths ([0013])) of the controlled-impedance signal path to a respective amplifier (the switching network couples the path to the "amplifier 822" ([0049])), the switching network implemented on the amplifier integrated circuit die (the switching transistors M4, M6 and the switching network are "located inside IC 802" ([0049]), which is the same "custom integrated circuit" housing the amplifier 822).
It would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to have modified the high-bandwidth distributed amplifier stages of Gilbert by incorporating the switching network of Whittington wherein a switching network structured to selectively couple a signal tap of the controlled-impedance signal path to a respective amplifier of the one or more amplifiers, the switching network implemented on the amplifier integrated circuit die. This would be done to achieve the "miniaturization and robustness" and avoidance of "parasitic resistance, capacitance, and/or inductance" taught by Whittington ([0007]).
Claims 11-13, and 17 are rejected under 35 U.S.C. 103 as being unpatentable over US 20130241653 A1 (Gilbert) in view of US 20150137840 A1 (Whittington) and US 7402991 B2 (Pollock).
With regards to claim 11, Gilbert as modified by Whittington does not explicitly teach:
wherein the one or more attenuator stages comprise multiple progressive attenuation stages each having progressively lower impedances.
However, Pollock teaches a wide bandwidth input attenuation circuit where the signal moves from a high-impedance probing tip (R1) through a controlled impedance transmission line (32) to a "termination resistive element (RT)" ([FIG. 3], Col. 3 line 56 - Col. 4 line 9). Pollock specifically teaches that the resistive values of the series components (RA) are "at least an order of magnitude higher" than the resistive values of the termination stage (RT) (Col. 4 lines 23-25).
It would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to have modified the attenuator stages of Gilbert as modified by Whittington by incorporating the teachings of Pollock wherein the one or more attenuator stages comprise multiple progressive attenuation stages each having progressively lower impedances to ensure that the RC time constant at the final termination (RT) is minimized, thereby reducing interconnect parasitics and maintain high frequency response (Col. 1, lines 33-35).
With regards to claim 12, Gilbert as modified by Whittington does not explicitly teach:
wherein the one or more attenuator stages are structured to have less attenuation at higher frequencies.
However, Pollock describes a "compensated RC passive attenuator" (Col. 1, lines 41-43). Pollock teaches that while DC/low-frequency signals are attenuated by resistive pairs (RA, RB), as frequency increases, the "capacitive reactance of CA and CB decreases" causing the signal to bypass the resistors (Col. 5, lines 16-19). This creates a frequency dependent impedance where the attenuation factor of the RC network is lower at higher frequencies than its attenuation factor at DC.
It would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to have modified the attenuator stages of Gilbert as modified by Whittington by incorporating the teachings of Pollock wherein the one or more attenuator stages are structured to have less attenuation at higher frequencies because it allows the attenuator to counteract high-frequency roll-off and "extend the bandwidth" as taught by Pollock (Col. 5, lines 3-6).
With regards to claim 13, Gilbert as modified by Whittington and Pollock does not explicitly teach:
The test and measurement instrument of claim 1, wherein the controlled-impedance signal path includes one or more continuous time linear equalizers (CTLEs).
However, Pollock teaches a signal conditioning circuit comprising an "active low pass filter circuit" (62) and a "voltage amplifier circuit" (70) [FIG 5]. Pollock teaches that this circuit uses feedback elements (RBP, CBP) where the "impedance of the feedback elements varies as a function of the frequency of the differential input signal" to achieve a "flat overall frequency response" from DC to the bandwidth of the amplifier (Col. 6, lines 6-7 and Col. 6, lines 33-36). This active, frequency-dependent compensation circuit performs the exact function of a continuous time linear equalizer (CTLE).
It would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to have modified the signal path of Gilbert as modified by Whittington by incorporating the active frequency-compensation circuits (CTLEs) taught by Pollock to "achieve a flat overall frequency response" and to "reduce the chances of unwanted parasitics" in the high-speed signal path (Col. 6, lines 6-7 and Col. 7, lines 55-56).
With regards to claim 17, Gilbert as modified by Whittington does not explicitly teach:
The test and measurement instrument of claim 16, wherein the controlled-impedance signal path includes a termination resistor to ground.
However, Pollock teaches “the resistive termination elements RTP and -RTN are coupled to ground” (Col. 5, lines 57-58).
It would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to have modified the controlled-impedance signal path of Gilbert as modified by Whittington to include a termination resistor to ground at the end of the path as taught by Pollock to “improve the high speed termination design, allowing termination on an integrated circuit implementation of the design” (Col. 7, lines 56-59).
Claim 15 is rejected under 35 U.S.C. 103 as being unpatentable over US 20130241653 A1 (Gilbert) in view of US 20150137840 A1 (Whittington) and US 7470968 B2 (Babcock).
With regards to claim 15, Gilbert as modified by Whittington does not teach:
The test and measurement instrument of claim 1, wherein the controlled-impedance signal path includes an inductive peaking circuit at each signal tap.
However, Babcock teaches a "T-coil circuit", connected to a signal line to "at least partially compensate for the capacitance associated with the receiver circuit" (Col. 2, lines 1-3). Babcock identifies that these inductive peaking circuits (L1, L2) are inserted at the junction of the signal path and the receiver/amplifier inputs ([FIG. 1], to enable "greater bandwidth and higher frequency operation" (Col. 5, lines 56-57). Furthermore, Babcock teaches that these inductive peaking structures are "generally implemented in the same layer as the amplifier circuitry" with the amplifiers (Col. 4, lines 42-45).
It would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to have modified the signal taps of Gilbert as modified by Whittington by incorporating the inductive peaking circuits taught by Babcock to "compensate for the unwanted capacitance" of the integrated amplifiers and switches, thereby extending the bandwidth of the controlled-impedance signal path and maintaining signal integrity at the high frequencies required for an oscilloscope front end (Col. 5, lines 55-61).
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to OSAMAH MURSHED whose telephone number is (571)272-9534. The examiner can normally be reached Monday - Friday, 11 a.m. 8 p.m. ET..
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Judy Nguyen can be reached at (571) 272-2258. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/OSAMAH MURSHED/ Examiner, Art Unit 2858
/JUDY NGUYEN/ Supervisory Patent Examiner, Art Unit 2858
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