DETAILED ACTION
This action is responsive to the claims filed 25 Apr 2024. Claims 1-14 are pending. Claim 1 is independent.
Notice of AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 112(b)
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
Claim 1-14 are rejected under 35 U.S.C. 112(b) as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor, or for pre-AIA the applicant regards as the invention.
Claim 1 recites the limitation, “An apparatus and a fabricating method therefor.” A single claim which claims both an apparatus and the method steps of using the apparatus is indefinite under 35 U.S.C. 112(b) or pre-AIA 35 U.S.C. 112, second paragraph (See MPEP 2173.05(p)II.
Claim 2 recites the limitation, “computing AI inference… CMP… WTW… and WIW… RIE… “ All acronyms must be spelled out at their first use in the claims.
Claims 1, 2, 4, 6, 10, and 13 comprise a “/” (slash) limitation construction rather than a spelled out “and” or “or” limitation The limitations of claims 10 and 13 are particularly indefinite as to whether one or multiple layers comprise the cited limitation. The metes and bounds of the claim should clearly show the requirements for each claimed layer and that layer’s required components.
Claim 2 recites the limitation “having seed layer/racetrack data storage layer/MgO/pin layerl/Ru/pin layer2/PMA layer/cap layer, wherein racetrack data storage layer has an anti-parallel pinned (AP-pinned) data storage layerl/Ru/data storage layer2 (Seed/SAF Storage layer/MgO/SAF Pin layer/ PMA/Cap );” The slashes in this instant appear to be a 1-to-1 correspondence of each layer – however the slashes make this indefinite. Further, merely listing layers without a specific “x-layer stacked on y-layer” the layers are not required to be provided in the same order as listed, unless explicitly stated. As written, any slash could be read as an “or” statement requiring only one of the listed component parts.
Claim 4 recites the limitation “storage layer… SAF… comprising CoHf, or combination and SAF”. It is unclear the limitation “or combinate and SAF” further limits an SAF layer. As written, the CoFe… CoHf, or combination and SAF may (or may not) all be required. As written, the claim could comprise a “(SAF)… AP-pinned layer … comprising SAF.”.
Claims 6, 13 and 14 are written to depend on themselves. A claim cannot depend on itself.
Claim(s) 2-14 depend on rejected claim 1 and are also rejected under 35 U.S.C. 112(b).
Claim Rejections – 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless —
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
Claims 1, 4, 10 – 13, and 15 are rejected under 35 U.S.C. 102(a)(2) as being anticipated by Song, et al, U.S. Patent Application Publication 2025/0232790 (“Song”).
Regarding claim 1, Song teaches:
An apparatus and a fabricating method therefor of the magnetic topological array unit cell comprising magnetic racetrack in-memory computing AI inference chip comprises: (Song, fig 1-3, 12, 13, “[0058] The racetrack memory device 1 may include a first electrode El and a second electrode E2 that are respectively arranged at opposite ends of the writing element 10, a third electrode E3 that is arranged at one end of the moving element 20, and a fourth electrode E4 that is arranged at one end of the reading element 30. [0116] The racetrack memory devices 1, 1b, and 1c according to the embodiments may be used for a memory device. [0118] FIG. 13 is a circuit diagram schematically showing a configuration of a memory device 400 including a plurality of memory cells of FIG. 12.”; an racetrack memory device with a reading element 20 and writing element 10 used to store data in an array of memory cells).
a. a spin orbit torque (SOT) cell configured from topological seed layer, topological layer, and blocking layer stack; (Song, fig 1-3, “[0058] The writing element 10 and the moving element 20 may be disposed on the same substrate W, and the racetrack memory device 1 may further include a seed layer S. [0069] Referring to FIG. 2, the writing element 10 may include a first spin-orbit torque layer 110, a first free layer 120 disposed on the first spin-orbit torque layer 110, a first oxide layer 130 disposed on the first free layer 120, and an insulating layer 140 on the first oxide layer 130. [0084] For example, the first to third oxide layers 130, 230, and 330 may be formed integrally. The third oxide layer 330 included in the reading element 30 may be referred to as a tunnel barrier layer.”; that the reading and writing elements may have a substrate and seed layer of fig 2; the SOT can have a seed layer S, a SOT layer 110, and a barrier layer 130, 230, & 330).
b. a magnetic tunnel junction (MTJ) cell configured from tunneling magnetoresistance (TMR) layer stack; (Song, fig 1-3, “[0083] [0083] The reading element 30 may include a third oxide layer 330 disposed on the moving element 20 and a fixed layer 340 disposed on the third oxide layer 330. In the racetrack memory device 1, the moving element 20 and the reading element 30 may configure a magnetic tunnel junction (MTJ) structure.”; an MTJ structure as elements 20 and 30 of fig 3).
c. a magnetic racetrack data storage layer stack; (Song, fig 1-3, “[0066] In the racetrack memory device 1 according to an embodiment, the writing element 10 and the moving element 20 may be spatially separated from each other. Then, the magnetic domain may be easily stored in the moving element 20 by multi-bit.”; a racetrack memory used to store multi-bit data).
d. and a fabricating method therefor comprising materials and manufacturable processes providing a racetrack SOT-MTJ cell configured the MTJ cell having AP-pinned racetrack data storage layer, and (Song, fig 1-3, “[0087] The magnetization direction of the fixed layer 340 is fixed, and the magnetization direction of the moving element 20 may be a parallel or anti-parallel direction with the magnetization direction of the fixed layer 340 according to stored data. [0072] For example, the first oxide layer 130 may include at least one of MgO, Al2O3 , NaCl, and ZnO. [0073] The insulating layer 140 may be disposed on the first oxide layer 130.”; a racetrack memory using a seed layer and at least MgO using at least a disposition method).
the SOT cell having laminated multilayer stack of topological seed layer, topological layer, and blocking layer, wherein: (Song, fig 1-3, “[0069] Referring to FIG. 2, the writing element 10 may include a first spin-orbit torque layer 110, a first free layer 120 disposed on the first spin-orbit torque layer 110, a first oxide layer 130 disposed on the first free layer 120, and an insulating layer 140 on the first oxide layer 130.”; the racetrack memory can be multi-layered (laminated) with a seed layer, the SOT layer 110, and “blocking layer” 130, 230, and 330).
e. the SOT topological layer and the magnetic racetrack data storage layer are configured to generate memory writing; (Song, fig 1-3, “[0058] The racetrack memory device 1 may include a first electrode El and a second electrode E2 that are respectively arranged at opposite ends of the writing element 10, [0061] The first current may be applied to the writing element 10 whenever a magnetic domain having a magnetization direction opposite to the magnetization direction of the magnetic domain that is already created in the writing element 10 is created.”; a racetrack memory with a writing element 10 between electrodes E1 and E2).
f. the MTJ TMR and the magnetic racetrack data storage layer are configured to provide memory reading; (Song, fig 1-3, “[0065] The reading element 30 may read the magnetic domain included in the moving element 20. For example, the first to third electrodes El, E2, and E3 are grounded, and a third current may be applied to the reading element 30 through the fourth electrode E4.”; a racetrack memory that can be “read”).
g. the magnetic racetrack data storage layer is configured to store multi polar bits (multi-bits), wherein magnetic polarized pattern bits/domain walls (DWs) are used to store data, and driven to move together/along the magnetic racetrack data storage layer by pulses of coherent spin-polarized electrical current to push/move corresponding bit into read or write location; and (Song, fig 6a-6e, “[0063] The moving element 20 may include a plurality of magnetic domains and a plurality of magnetic domain walls. The magnetic domains and/or the magnetic domain walls may be moved based on the second current applied to the moving element 20. [0097] Referring to FIG. 6B, the second current of a pulse type may be applied to the writing element 10 and the moving element 20 through the first to third electrodes El, E2, and E3. [0101] As illustrated in FIG. 6E, the second current of a pulse type may be applied to the writing element 10 and the moving element 20 through the first to third electrodes El, E2, and E3.”; a mechanism to write different “bits” into the magnetic domain walls to store data).
Regarding claim 4, Song teaches A method of claim 1, wherein each corresponding magnetic racetrack data storage layer comprises synthetic antiferromagnetic (SAF) anti-parallel (AP-pinned) data storage layer of an exemplary embodiment comprising CoFe/Ru/CoFe, CoFe/W/CoFe, CoFeB, CoFe/NiFe, Ta, MgO, W, CoHf, or combination and SAF. (Song, fig 3, “[0071] Alternatively, the first free layer 120 may have a synthetic antiferromagnetic (SAF) structure. For example, the first free layer 120 may include (Co/Ni) n/Ru/(Co/Ni) nor (Co/Ni) n/Ir/(Co/Ni) n that is a structure of a magnetic layer/a non-magnetic layer (Ru or Ir)/a magnetic layer.”; that the layers 120, 220, and 320 may be an SAF comprised of the listed materials).
Regarding claim 10, Song teaches The apparatus of claim 1, wherein each corresponding SOT cell comprises a topological layer of yet another exemplary embodiment comprising doping or cluster co-depositing having ceramic elements including nitride, carbide, and oxide, or doping or cluster co-depositing having inert gases including N2, CO2, and O2 to prevent diffusion/migration and improve the melting temperature of THHA and TI materials therefore to improve the thermal and long-term reliability thus its operating temperature of the devices. (Song, fig 3, “[0070] For example, the first spin-orbit torque layer 110 may include at least one of iridium (Ir), ruthenium (Ru), tantalum (Ta), platinum (Pt), palladium (Pd), bismuth (Bi), titanium (Ti), tungsten (W), and an alloy thereof, but the disclosure is not limited thereto.”; a first layer of Ir on the seed layer of fig 3 comprised of at least Ir).
Regarding claim 11, Song teaches The apparatus of claim 1, wherein each corresponding SOT cell comprises topological seed layer providing texturing to form the epitaxial structure and promote desired crystalline orientation and blocking layer (BL) blocking diffusion of the topological layer of an exemplary embodiment comprising Cr, Ta, Ru, Ir, Pt, W, Zr, Al, Ni, Co, Hf, MgO, HfO2, or combinations thereof. (Song, fig 3, “[0070] For example, the first spin-orbit torque layer 110 may include at least one of iridium (Ir), ruthenium (Ru), tantalum (Ta), platinum (Pt), palladium (Pd), bismuth (Bi), titanium (Ti), tungsten (W), and an alloy thereof, but the disclosure is not limited thereto.”; a first layer of Ir on the seed layer of fig 3 comprised of at least Ir).
Regarding claim 12, Song teaches:
The apparatus of claim 1, wherein each corresponding SOT cell comprises topological seed layer, topological layer, and blocking layer of an exemplary embodiment comprising laminated multilayer stack of topological seed layer, topological layer, and blocking layer, (Song, fig 1-3, “[0058] The writing element 10 and the moving element 20 may be disposed on the same substrate W, and the racetrack memory device 1 may further include a seed layer S. [0069] Referring to FIG. 2, the writing element 10 may include a first spin-orbit torque layer 110, a first free layer 120 disposed on the first spin-orbit torque layer 110, a first oxide layer 130 disposed on the first free layer 120, and an insulating layer 140 on the first oxide layer 130. [0084] For example, the first to third oxide layers 130, 230, and 330 may be formed integrally. The third oxide layer 330 included in the reading element 30 may be referred to as a tunnel barrier layer.”; that the reading and writing elements may have a substrate and seed layer of fig 2; the SOT can have a seed layer S, a SOT layer 110, and a barrier layer 130, 230, & 330).
wherein the stack repeats one or more times. (Song, fig 3, “[0058] [0057] Referring to FIGS. 1 to 3, the racetrack memory device 1 may include the writing element 10 that creates a magnetic domain based on a first current applied thereto, a moving element 20 into which the magnetic domain”; a stack where the stack repeats one time).
Regarding claim 13, Song teaches:
The apparatus of claim 1 (13), wherein each corresponding laminated multilayer stack of topological seed layer, topological layer, and blocking layer of an exemplary embodiment comprises topological seed, un-doped topological layer, and nitride, carbide and oxide doped or cluster co-deposited or/and N2, CO2, and O2 doped or cluster co-deposited topological layer, and blocking layer, (Song, fig 1-3, “[0058] The writing element 10 and the moving element 20 may be disposed on the same substrate W, and the racetrack memory device 1 may further include a seed layer S. [0069] Referring to FIG. 2, the writing element 10 may include a first spin-orbit torque layer 110, a first free layer 120 disposed on the first spin-orbit torque layer 110, a first oxide layer 130 disposed on the first free layer 120, and an insulating layer 140 on the first oxide layer 130. [0084] For example, the first to third oxide layers 130, 230, and 330 may be formed integrally. The third oxide layer 330 included in the reading element 30 may be referred to as a tunnel barrier layer.”; that the reading and writing elements may have a substrate and seed layer of fig 2; the SOT can have a seed layer S, a SOT layer 110, and a barrier layer 130, 230, & 330; that one of the layers may be an oxide).
wherein the stack repeats one or more times. (Song, fig 3, “[0058] [0057] Referring to FIGS. 1 to 3, the racetrack memory device 1 may include the writing element 10 that creates a magnetic domain based on a first current applied thereto, a moving element 20 into which the magnetic domain”; a stack where the stack repeats one time).
Regarding claim 15, Song teaches The apparatus of claim 1, wherein each corresponding racetrack SOT-MTJ cell comprises 4 terminals: (Song, fig 12, 13, “ [0118] FIG. 13 is a circuit diagram schematically showing a configuration of a memory device 400 including a plurality of memory cells of FIG. 12.”; that multiple racetrack memory cells can be arranged so that an array of four multi-bit memories are created and stored. Note- the claim merely required data storage, the “intended use” of storing weights is not considered limiting of the memory structure).
Claim Rejections – 35 USC § 103
The following is a quotation of 35 U.S.C. 103, which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
Claims 5 and 14 are rejected under 35 U.S.C. 103 as being unpatentable over Song in view of Gang, et al, U.S. Patent Application Publication 2025/0338779 (“Gang”).
Regarding claim 5, Song teaches the apparatus of claim 1.
Song does not explicitly teach wherein each corresponding MTJ cell comprises an exemplary embodiment of Perpendicular Magnetic Anisotropy (PMA) TMR (p-MTJ)..
Gang teaches wherein each corresponding MTJ cell comprises an exemplary embodiment of Perpendicular Magnetic Anisotropy (PMA) TMR (p-MTJ). (Gang, fig 9A-11B, “[0029] In some instances, the at least one of the magnetic layers that includes the perpendicularly-magnetized Heusler compound grown on the templating layer includes a free layer. [0085] Referring again to FIGS. 9A-11B,… In some cases, one of the magnetic layers is chosen from perpendicularly-magnetized tetragonal Heusler compounds”; that at least one magnetic layer can be perpendicularly magnetized Heusler compound).
In view of the teachings of Gang it would have been obvious for a person of ordinary skill in the art to apply the teachings of Gang to Song before the effective filing date of the claimed invention in order to teach SOT and MRAM construction. The teachings of Gang, in the same or in a similar field of endeavor with Song, can combine Gang’s explicit construction of an MTJ cell with Song’s less explicit MTJ construction. The two methods of constructing the MTJ cells merely perform the same functions as they perform separately and being no more “the combining of prior art elements according to known methods to yield predictable results” (KSR Int’l Co. v. Teleflex Inc., 550 U.S. 398, 417 (2007)).
Regarding claim 14, Song teaches the apparatus of claim 1.
Song does not explicitly teach (14), wherein each corresponding doped and un-doped topological layer of an exemplary embodiment comprising a topological half Heusler alloy (THHA) or a topological insulator (TI) or a mixture of THHA and TI layer..
Gang teaches (14), wherein each corresponding doped and un-doped topological layer of an exemplary embodiment comprising a topological half Heusler alloy (THHA) or a topological insulator (TI) or a mixture of THHA and TI layer. (Gang, fig 9A-11B, “[0069] One or more embodiments advantageously make half metallic Heusler compounds tetragonal with non-zero anisotropy by using an underlayer with a different in-plane lattice constant (as compared to the cubic form), obtaining volume anisotropy as opposed to interfacial anisotropy.”; that at least one layer can be comprised of half Heusler alloy).
In view of the teachings of Gang it would have been obvious for a person of ordinary skill in the art to apply the teachings of Gang to Song before the effective filing date of the claimed invention in order to teach MRAM construction. The teachings of Gang, in the same or in a similar field of endeavor with Song, can combine Gang’s explicit construction of an MTJ cell with Song’s less explicit MTJ construction. The two methods of constructing the MTJ cells merely perform the same functions as they perform separately and being no more “the combining of prior art elements according to known methods to yield predictable results” (KSR Int’l Co. v. Teleflex Inc., 550 U.S. 398, 417 (2007)).
Claims 7 – 9 are rejected under 35 U.S.C. 103 as being unpatentable over Song in view of Le, et al, U.S. Patent Application Publication 2025/0268110 (“Le”).
Regarding claim 7, Song teaches the apparatus of claim 1.
Song does not explicitly teach wherein each corresponding SOT cell comprises a topological layer of an exemplary embodiment comprising topological half Heusler alloy (THHA) APtBi, wherein A comprises Y, Lu..
Le teaches wherein each corresponding SOT cell comprises a topological layer of an exemplary embodiment comprising topological half Heusler alloy (THHA) APtBi, wherein A comprises Y, Lu. (Le, fig 3A-3B, “[0003] YPtBi is a material that has been proposed in various spin-orbit torque (SOT) device applications, such as for a spin Hall layer for magnetoresistive random access memory (MRAM) devices, [0005] The TSM layer of the SOT device comprises YPtBi having a 1:1.02:1.05 stoichiometry to a 1:1.25:1.35 stoichiometry, [0037] The SOT device 300 of FIG. 3A comprises a seed layer 302, a buffer layer 304 disposed over the seed layer 302, a first migration barrier layer 306 disposed over the buffer layer 304, a topological semi-metal (TSM) layer 312 disposed on the first migration barrier layer 306, an interlayer 310 disposed on the TSM layer 312, a ferromagnetic (FM) layer 316 disposed on the interlayer 310, and a cap layer 318 disposed on the FM layer 316”; that Heusler alloys, comprising YPtBi, can be used to construct memory SOT cells).
In view of the teachings of Le it would have been obvious for a person of ordinary skill in the art to apply the teachings of Le to Song before the effective filing date of the claimed invention in order to teach SOT and MRAM construction. The teachings of Le, in the same or in a similar field of endeavor with Song, can combine Le’s explicit construction of an SOT/ MTJ cell, comprising YPtBi, with Song’s less explicit MTJ construction. The two methods of constructing the MTJ cells merely perform the same functions as they perform separately and being no more “the combining of prior art elements according to known methods to yield predictable results” (KSR Int’l Co. v. Teleflex Inc., 550 U.S. 398, 417 (2007)).
Regarding claim 8, Song teaches the apparatus of claim 1.
Song does not explicitly teach wherein each corresponding SOT cell comprises a topological layer of another exemplary embodiment comprising topological half Heusler alloy (THHA) BPdBi, wherein B comprises Y, Sm, Gd, Tb, Dy, Ho, Er, Tm, Lu..
Le teaches wherein each corresponding SOT cell comprises a topological layer of another exemplary embodiment comprising topological half Heusler alloy (THHA) BPdBi, wherein B comprises Y, Sm, Gd, Tb, Dy, Ho, Er, Tm, Lu. (Le, fig 3A-3B, “ [0037] The SOT device 300 of FIG. 3A comprises a seed layer 302, a buffer layer 304 disposed over the seed layer 302, a first migration barrier layer 306 disposed over the buffer layer 304, a topological semi-metal (TSM) layer 312 disposed on the first migration barrier layer 306, an interlayer 310 disposed on the TSM layer 312, a ferromagnetic (FM) layer 316 disposed on the interlayer 310, and a cap layer 318 disposed on the FM layer 316. [0047] The buffer layer 304 may comprise a combination of materials selected from the groups consisting of (100) or (110) textured layers, …, with the groups of (a)-(k) below… (h) other spinel cubic materials with the space group 216 and similar lattice parameters, such as YNiBi, YPdBi, NiBiGd, AgMgSb, and BiXPt (where X is a rare earth element from Gd to Lu);”; that Heusler alloys, comprising YPdBi, can be used to construct memory SOT cells).
In view of the teachings of Le it would have been obvious for a person of ordinary skill in the art to apply the teachings of Le to Song before the effective filing date of the claimed invention in order to teach SOT and MRAM construction. The teachings of Le, in the same or in a similar field of endeavor with Song, can combine Le’s explicit construction of an SOT/ MTJ cell, comprising YPtBi, with Song’s less explicit MTJ construction. The two methods of constructing the MTJ cells merely perform the same functions as they perform separately and being no more “the combining of prior art elements according to known methods to yield predictable results” (KSR Int’l Co. v. Teleflex Inc., 550 U.S. 398, 417 (2007)).
Regarding claim 9, Song teaches the apparatus of claim 1.
Song does not explicitly teach wherein each corresponding SOT cell comprises a topological layer of yet another exemplary embodiment comprising topological insulator (TI) bismuth antimony BiSb and its compound CBiSb, wherein C comprises Ni..
Le teaches wherein each corresponding SOT cell comprises a topological layer of yet another exemplary embodiment comprising topological insulator (TI) bismuth antimony BiSb and its compound CBiSb, wherein C comprises Ni. (Le, fig 3A-3B, “[0050] Buffer layers between the textured seed layers and the SOT layer can, in general, offer better control of electrical shunting between the seed layers and the SOT layer, or serve as migration barriers to prevent intermixing of the SOT layer and seed layers, or provide better film epitaxial growth to the YPtBi or BiSbX SOT layer.”; that Heusler alloys, comprising at least BiSb, can be used to construct memory SOT cells).
In view of the teachings of Le it would have been obvious for a person of ordinary skill in the art to apply the teachings of Le to Song before the effective filing date of the claimed invention in order to teach SOT and MRAM construction. The teachings of Le, in the same or in a similar field of endeavor with Song, can combine Le’s explicit construction of an SOT/ MTJ cell, comprising YPtBi, with Song’s less explicit MTJ construction. The two methods of constructing the MTJ cells merely perform the same functions as they perform separately and being no more “the combining of prior art elements according to known methods to yield predictable results” (KSR Int’l Co. v. Teleflex Inc., 550 U.S. 398, 417 (2007)).
Conclusion
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/Donald HB Braswell/ Primary Examiner, Art Unit 2825
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