Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
DETAILED ACTION
This action is responsive to application No. 18646294 filed on 04/25/2024.
Information Disclosure Statement
Acknowledgment is made of Applicant’s Information Disclosure Statement (IDS) form PTO-1449. These IDS has been considered.
Priority
Receipt is acknowledged of papers submitted under 35 U.S.C. 119(a)-(d), which papers have been placed of record in the file.
Election/Restrictions
Applicant’s election without traverse of claims 1-5, 13-20 in the reply filed on 7/14/2026 is acknowledged.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(B) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 5, 13 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor, or for pre-AIA the applicant regards as the invention.
Claim 5 recites the limitation “wherein both end portions of the at least one first chip in the first direction protrude with respect to the second chip on the at least one first chip”. The metes and bounds of the claimed limitation can not be determined for the following reasons: The drawings and specification appear to disclose that both end portions of the second chip in the first direction protrude with respect to the first chip.
For examination purpose it will be interpreted that the that the second chip in the first direction protrude with respect to the first chip.
Claim 13 recites the limitation “wherein the second chip comprises an overhanging portion protruding with respect to first chip in a first direction parallel to a surface of the substrate”. The metes and bounds of the claimed limitation can not be determined for the following reasons: the highlighted term has been defined before and lacks proper antecedent basis.
The examiner suggests amending the claim to recite “wherein the second chip comprises an overhanging portion protruding with respect to the first chip in a first direction parallel to a surface of the substrate”
Clams 14-20 are also rejected under 112(b) as they depend on base claim 13.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1-2, 13-14, 18-20 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Chen et al. (US 2023/0361086).
Regarding independent claim 1, Chen et al. teach a semiconductor package structure comprising:
a substrate (Fig. 6D, element 210, paragraph 0036);
a plurality of chips (Fig. 6D, elements X1, X2, X3, paragraph 0038) stacked on the substrate in a second direction perpendicular to a surface of the substrate;
a plurality of bonding wires (Fig. 6D, elements Wx, paragraph 0037) connecting the plurality of chips to bonding pads (Fig. 6D, element 220, paragraph 0036) included in the substrate, respectively; and
a molding layer (Fig. 6D, element 310, paragraph 0036) on the substrate, the molding layer encapsulating the plurality of chips and the plurality of bonding wires,
wherein at least one first chip (Fig. 6D, element X1) of the plurality of chips comprises an overhanging portion (Fig. 6D) protruding with respect to a second chip (Fig. 6D, element X2) of the plurality of chips on the at least one first chip in a first direction parallel to the surface of the substrate, and
wherein a support (Fig. 6D, element AL, paragraph 0039) is on the at least one first chip.
Regarding claim 2, Chen et al. teach wherein a thickness of the support in the second direction is equal to or less than a height of a wire loop of a corresponding bonding wire of the plurality of bonding wires (Fig. 6D).
Regarding independent claim 13, Chen et al. teach a semiconductor package structure, comprising:
a substrate (Fig. 6D, element 210, paragraph 0036);
a first chip (Fig. 6D, element X1, paragraph 0038) on the substrate;
a second chip (Fig. 6D, element X2, paragraph 0038) on the first chip;
a third chip (Fig. 6D, element X3, paragraph 0038) on the second chip;
a plurality of bonding wires (Fig. 6D, elements Wx, paragraph 0037) connecting the first chip, the second chip, and the third chip to bonding pads (Fig. 6D, element 220, paragraph 0036) included in the substrate, respectively;
a first support (Fig. 6D, element AL, paragraph 0039) between the first chip and the second chip; and
a molding layer (Fig. 6D, element 310, paragraph 0036) on the substrate,
wherein the second chip comprises an overhanging portion protruding (Fig. 6D) with respect to first chip in a first direction parallel to a surface of the substrate.
Regarding claim 14, Chen et al. teach wherein a thickness of the first support in a second direction perpendicular to the surface of the substrate is equal to or less than a height of a wire loop of a bonding wire of the plurality of bonding wires connecting the second chip to a bonding pad included in the substrate (Fig. 6D).
Regarding claim 18, Chen et al. teach wherein at least one of end portions of the third chip in the first direction protrudes with respect to at least one of end portions of the second chip in the first direction (Fig. 6D).
Regarding claim 19, Chen et al. teach further comprising a second support (Fig. 6D, element AL, paragraph 0039) on the third chip opposite to the second chip.
Regarding claim 20, Chen et al. teach wherein a thickness of the second support in the second direction is equal to or less than a height of a wire loop of a bonding wire of the plurality of bonding wires connecting the third chip to a bonding pad included in the substrate (Fig. 6D).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 3-4, 15-16 are rejected under 35 U.S.C. 103 as being unpatentable over Chen et al. (US 2023/0361086) in view of Kim et al. (KR 20120093725 A).
Regarding claims 3 & 15, Chen et al. teach all of the limitations as discussed above.
Chen et al. do not explicitly disclose wherein the support comprises a rigid material.
Before the effective filling date of the invention it would have been obvious to one having ordinary skill in the art to select a known polymer resin for an adhesive as shown by Kim et al. (specification discloses “The adhesive layer may include a polymer resin, an epoxy resin, a curing agent, a curing catalyst, and other additives. For example, as the polymer resin, polyimide resin, polystyrene resin, polyethylene resin, polyester resin, polyamide resin, (meth) acrylic resin, urethane resin, polyphenylene ether resin, polyether imide resin, phenoxy resin , Polycarbonate resin or polyphenylene ether resin may include any one or more”), since it has been held to be within the general skill of a worker in the art to select a known material on the base of its suitability, for its intended use involves only ordinary skill in the art. In re Leshin, 125 USPQ 416.
Regarding claims 4 & 16, Chen et al. teach all of the limitations as discussed above.
Chen et al. do not explicitly disclose wherein the rigid material comprises silicon, a metal or a polymer resin.
Before the effective filling date of the invention it would have been obvious to one having ordinary skill in the art to select a known polymer resin for an adhesive as shown by Kim et al. (specification discloses “The adhesive layer may include a polymer resin, an epoxy resin, a curing agent, a curing catalyst, and other additives. For example, as the polymer resin, polyimide resin, polystyrene resin, polyethylene resin, polyester resin, polyamide resin, (meth) acrylic resin, urethane resin, polyphenylene ether resin, polyether imide resin, phenoxy resin , Polycarbonate resin or polyphenylene ether resin may include any one or more”), since it has been held to be within the general skill of a worker in the art to select a known material on the base of its suitability, for its intended use involves only ordinary skill in the art. In re Leshin, 125 USPQ 416.
Claims 5 & 17 are rejected under 35 U.S.C. 103 as being unpatentable over Chen et al. (US 2023/0361086) in view of Zhang et al. (CN 214279953 U).
Regarding claim 3, Chen et al. teach all of the limitations as discussed above.
Chen et al. do not explicitly disclose wherein both end portions of the at least one first chip in the first direction protrude with respect to the second chip on the at least one first chip.
Zhang et al. teach a packaging device comprising wherein both end portions of the at least one second chip (Fig. 1A, element 103) in the first direction protrude with respect to the first chip (Fig. 1A, element 103).
It would have been obvious to one of ordinary skill in the art before the effective filling date of the invention to modify the teachings of Chen et al. according to the teachings of Zhang et al. with the motivation to provide “larger device density”.
Regarding claim 17, Chen et al. teach all of the limitations as discussed above.
Chen et al. do not explicitly disclose wherein both end portions of the second chip in the first direction protrude with respect to the first chip in the first direction.
Zhang et al. teach a packaging device comprising wherein both end portions of the second chip (Fig. 1A, element 103) in the first direction protrude with respect to the first chip (Fig. 1A, element 103) in the first direction.
It would have been obvious to one of ordinary skill in the art before the effective filling date of the invention to modify the teachings of Chen et al. according to the teachings of Zhang et al. with the motivation to provide “larger device density”.
Cited Prior Art
The Examiner has pointed out particular references contained in the prior art of record within the body of this action for the convenience of the Applicant.
Although the specified citations are representative of the teachings in the art and are applied to the specific limitations within the individual claim, other passages and figures may apply.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to SHAHED AHMED whose telephone number is (571)272-3477. The examiner can normally be reached M-F 9-5.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Steven Gauthier can be reached on 571-270-0373. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/SHAHED AHMED/
Primary Examiner, Art Unit 2813