Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 1-8 and 10-11 are rejected under 35 U.S.C. 103 as being unpatentable over Sung et al (US 20220199583) in view of Yamada et al (US 20210084799).
Regarding claims 1 and 5,
[claim 1] A semiconductor device, comprising: a stacked substrate (figure 1D, paragraph 0027, where elements 220 and 60 comprise the stacked substrate);
a plurality of semiconductor chips provided on the stacked substrate (figure 1D, paragraph 0027, where elements 110, 120B, 120A, 120C, and 120D are the plurality of semiconductor chips on the stacked substrate [220 and 60]);
an external output terminal (figure 1D, paragraph 0027, where elements 132, 135 connect the circuit board and semiconductor die to the package substrate [60] which has external output terminals on the bottom of the package substrate);
a circuit board configured to electrically connect the plurality semiconductor chips, and to electrically connect the plurality of semiconductor chips to the external output terminal (figure 1D, paragraph 0027, where elements 132, 135 connect the circuit board [element 240] and semiconductor die to the package substrate [60] which has external output terminals on the bottom of the package substrate);
the circuit board having a first surface and a second surface opposite to each other, the second surface facing the stacked substrate (figure 1D, paragraph 0027, where the circuit board (figure 1D, paragraph 0027, where element 240 is the circuit board having a first surface [bottom surface] and a second surface [top surface] where the bottom surface is connected to the stacked substrate [element 220 and 60] specifically through element 131);
[claim 5] forming a module having a stacked substrate on which a plurality of semiconductor chips is provided, and a circuit board electrically connecting the plurality of semiconductor chips (figure 1D, paragraph 0027, where elements 60 and 220 comprise the stacked substrate and are formed [figures 1A-1E] which a plurality of semiconductor chips [elements 110, 120A-D] are stacked and electrically connected to a circuit board [element 240]),
and electrically connecting the plurality of semiconductor chips to an external output terminal (figure 1D, paragraph 0027, where elements 132, 135 connect the circuit board and semiconductor die to the package substrate [60] which has external output terminals on the bottom of the package substrate),
the circuit board having a first surface and a second surface opposite to each other, the second surface facing the stacked semiconductor substrate (figure 1D, paragraph 0027, where element 240 is the circuit board having a first surface [bottom surface] and a second surface [top surface] where the bottom surface is connected to the stacked substrate [element 220 and 60] specifically through element 131);
However, Sung et al does not specifically disclose
[claim 1] a sealing resin sealing the stacked substrate and the circuit board; and a plurality of flow velocity control pins attached to the circuit board, at the first surface of the circuit board.
[claim 5] A method of manufacturing a semiconductor device via transfer molding, the method comprising: attaching the module to a mold having an injection gate, injecting a sealing resin from the injection gate of the mold, and disposing a plurality of flow velocity control pins, arranged orthogonal to a direction of a flow of the sealing resin, at the first surface of the circuit board.
It would have been obvious to one of ordinary skill in the art before the effective filing date of the present application to have modified the teachings of Sung et al to incorporate the teachings of Yamada et al in order to adequately cool and control the flow of any coolant or other liquid under the circuit board to maximize efficiency.
However, Yamada et al does teach
[claim 1] a sealing resin sealing the stacked substrate and the circuit board (figure 3, paragraph 0053, where element 74 is a sealing resin sealing the stacked substrate and circuit board [elements 76 and 78 imposed from Sung et al]);
and a plurality of flow velocity control pins attached to the circuit board, at the first surface of the circuit board (figure 3, paragraph 0085, where elements 92, 94, and 98 comprise the flow velocity control pins attached to the bottom of the circuit board [element 76] which is the first surface of the circuit board).
[claim 5] A method of manufacturing a semiconductor device via transfer molding, the method comprising (figure 3, paragraph 0069, where the semiconductor device is created using a molding technique equivalent to transfer molding):
attaching the module to a mold having an injection gate (figure 3, paragraph 0053, where the mold of the injection gate is bound by element 72 and is placed onto the module containing the circuit board and semiconductor die);
injecting a sealing resin from the injection gate of the mold (paragraph 0053, where the sealing resin is filled into the gap between elements 72);
and disposing a plurality of flow velocity control pins, arranged orthogonal to a direction of a flow of the sealing resin, at the first surface of the circuit board (figure 3, paragraph 0069, where the flow velocity control pins are disposed on the first [bottom] surface of the circuit board and arranged orthogonal direction of a flow of the sealing resin [pins are vertical, injection is horiztonal]).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the present application to have modified the teachings of Sung et al to incorporate the teachings of Yamada et al in order to adequately cool and control the flow of any coolant or other liquid under the circuit board to maximize efficiency.
Regarding claims 2, 3, 6-8,
Additionally, Sung et al as modified does not specifically disclose
[claim 2] The semiconductor device according to claim 1, wherein the circuit board has a first end and a second end opposite to each other, and the plurality of flow velocity control pins is provided at the first end of the circuit board.
[claim 3] The semiconductor device according to claim 1, wherein the circuit board has two opposite ends and an intermediate region between the two ends, and the plurality of flow velocity control pins is provided both at the two ends of the circuit board and in the intermediate region.
[claim 6] The method according to claim 5, wherein the circuit board has a first end and a second end opposite to each other, the first end facing the injection gate, and the plurality of flow velocity control pins is disposed at the first end of the circuit board.
[claim 7] The method according to claim 5, wherein the circuit board has a first end and a second end opposite to each other, the first end facing the injection gate, and the plurality of flow velocity control pins is disposed at the first end and the second end of the circuit board.
[claim 8] The method according to claim 5, wherein the circuit board has a first end and a second end opposite to each other, the first end facing the injection gate, and an intermediate region between the first end and the second end, and the plurality of flow velocity control pins is provided at the first end, the second end, and in the intermediate region of the circuit board.
However, Yamada et al does teach
[claim 2] The semiconductor device according to claim 1, wherein the circuit board has a first end and a second end opposite to each other, and the plurality of flow velocity control pins is provided at the first end of the circuit board (figure 3, paragraph 0085, where elements 92 and 94 contain the flow velocity control pins and element 76 is the circuit board with a first end [left end] and a second end [right side] where the pins are located on the left end of the circuit board).
[claim 3] The semiconductor device according to claim 1, wherein the circuit board has two opposite ends and an intermediate region between the two ends, and the plurality of flow velocity control pins is provided both at the two ends of the circuit board and in the intermediate region (figure 3, paragraph 0085, where elements 92 and 94 contain the flow velocity control pins and element 76 is the circuit board with a first end [left end] and a second end [right side] where the pins are located at the first [left] end and second [right] end as well as the intermediate portion between the first and second end).
[claim 6] The method according to claim 5, wherein the circuit board has a first end and a second end opposite to each other, the first end facing the injection gate, and the plurality of flow velocity control pins is disposed at the first end of the circuit board (figure 3, paragraph 0085, where elements 92 and 94 contain the flow velocity control pins and element 76 is the circuit board with a first end [left end] and a second end [right side] where the pins are located on the left end of the circuit board).
[claim 7] The method according to claim 5, wherein the circuit board has a first end and a second end opposite to each other, the first end facing the injection gate, and the plurality of flow velocity control pins is disposed at the first end and the second end of the circuit board (figure 3, paragraph 0085, element 76 is the circuit board with a first end [left end] and a second end [right side] where the the first end is the injection gateare located at the first [left] end and second [right] end as well as the intermediate portion between the first and second end).
[claim 8] The method according to claim 5, wherein the circuit board has a first end and a second end opposite to each other, the first end facing the injection gate, and an intermediate region between the first end and the second end, and the plurality of flow velocity control pins is provided at the first end, the second end, and in the intermediate region of the circuit board (figure 3, paragraph 0085, where elements 92 and 94 contain the flow velocity control pins and element 76 is the circuit board with a first end [left end] and a second end [right side] where the pins are located at the first [left] end and second [right] end as well as the intermediate portion between the first and second end).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the present application to have modified the teachings of Sung et al to incorporate the teachings of Yamada et al in order to adequately cool and control the flow of any coolant or other liquid under the circuit board to maximize efficiency.
Regarding claims 4 and 10,
Sung et al as modified teaches all of the limitations of the parent claims, claims 1 and 5, however it does not specifically disclose
[claim 4] The semiconductor device according to claim 1, wherein a material of the plurality of flow velocity control pins is a resin with an elastic modulus lower than an elastic modulus of the sealing resin.
[claim 10] The method according to claim 5, wherein a material of the plurality of flow velocity control pins is a resin having an elastic modulus lower than an elastic modulus of the sealing resin.
However, According to MPEP 2144.05 Obviousness of Similar and Overlapping Ranges, Amounts, and Proportions [R-01.2024]
See MPEP § 2131.03 for case law pertaining to rejections based on the anticipation of ranges under 35 U.S.C. 102 and 35 U.S.C. 102 /103.
II. ROUTINE OPTIMIZATION
A. Optimization Within Prior Art Conditions or Through Routine Experimentation
Generally, differences in concentration or temperature will not support the patentability of subject matter encompassed by the prior art unless there is evidence indicating such concentration or temperature is critical. "[W]here the general conditions of a claim are disclosed in the prior art, it is not inventive to discover the optimum or workable ranges by routine experimentation." In re Aller, 220 F.2d 454, 456, 105 USPQ 233, 235 (CCPA 1955) (Claimed process which was performed at a temperature between 40°C and 80°C and an acid concentration between 25% and 70% was held to be prima facie obvious over a reference process which differed from the claims only in that the reference process was performed at a temperature of 100°C and an acid concentration of 10%.); see also Peterson, 315 F.3d at 1330, 65 USPQ2d at 1382 ("The normal desire of scientists or artisans to improve upon what is already generally known provides the motivation to determine where in a disclosed set of percentage ranges is the optimum combination of percentages."); In re Hoeschele, 406 F.2d 1403, 160 USPQ 809 (CCPA 1969) (Claimed elastomeric polyurethanes which fell within the broad scope of the references were held to be unpatentable thereover because, among other reasons, there was no evidence of the criticality of the claimed ranges of molecular weight or molar proportions.). For more recent cases applying this principle, see Merck & Co. Inc. v. Biocraft Lab. Inc., 874 F.2d 804, 809, 10 USPQ2d 1843, 1848 (Fed. Cir. 1989), cert. denied, 493 U.S. 975 (1989)(Claimed ratios were obvious as being reached by routine procedures and producing predictable results); In re Kulling, 897 F.2d 1147, 1149, 14 USPQ2d 1056, 1058 (Fed. Cir. 1990)(Claimed amount of wash solution was found to be unpatentable as a matter of routine optimization in the pertinent art, further supported by the prior art disclosure of the need to avoid undue amounts of wash solution); and In re Geisler, 116 F.3d 1465, 1470, 43 USPQ2d 1362, 1366 (Fed. Cir. 1997)(Claims were unpatentable because appellants failed to submit evidence of criticality to demonstrate that that the wear resistance of the protective layer in the claimed thickness range of 50-100 Angstroms was "unexpectedly good"); Smith v. Nichols, 88 U.S. 112, 118-19 (1874) (a change in form, proportions, or degree "will not sustain a patent"); In re Williams, 36 F.2d 436, 438, 4 USPQ 237 (CCPA 1929) ("It is a settled principle of law that a mere carrying forward of an original patented conception involving only change of form, proportions, or degree, or the substitution of equivalents doing the same thing as the original invention, by substantially the same means, is not such an invention as will sustain a patent, even though the changes of the kind may produce better results than prior inventions."). See also KSR Int’l Co. v. Teleflex Inc., 550 U.S. 398, 416, 82 USPQ2d 1385, 1395 (2007) (identifying "the need for caution in granting a patent based on the combination of elements found in the prior art.").
It would have been obvious to one of ordinary skill in the art before the effective filing date of the present application to have modified the teachings of Sung et al as modified to ensure that the material of plurality of flow velocity control pins is a resin having an elastic modulus lower than elastic modulus of the sealing resin through routine optimization of the device. There are three possible options, the velocity flow pins could have an elastic modulus lower than, equal to or greater than an elastic modulus of the sealing resin. In the present case, there are three discrete options, and choosing one of the three to optimize the device would be obvious to anyone seeking to optimize the efficiency of the device.
Regarding claim 11,
Sung et al teaches all of the limitations of the parent claim, claim 5, but does not specifically disclose
[claim 11] The method according to claim 5, wherein a shape of a cross-section of each of the plurality of flow velocity control pins is an elliptical shape with a major axis oriented parallel to the direction of the flow of the sealing resin.
However, according to MPEP 2144.04 IV. CHANGES IN SIZE, SHAPE, OR SEQUENCE OF ADDING INGREDIENTS
B. Changes in Shape
In re Dailey, 357 F.2d 669, 149 USPQ 47 (CCPA 1966) (The court held that the configuration of the claimed disposable plastic nursing container was a matter of choice which a person of ordinary skill in the art would have found obvious absent persuasive evidence that the particular configuration of the claimed container was significant.).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the present application to have modified the teachings of Sung et al as modified to change the shape of the flow velocity control pins to an elliptical shape rather than a rectangular shape. Each shape provides similar surface area and unless there is specific detail to the surface area (which is proportional to the drag force used on liquids), each shape would be a matter of specific choice for each specific use case to maximize efficiency but is still used for the same purpose unless otherwise specified.
Allowable Subject Matter
Claim 9 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Wu et al (US 20220278087), Yu et al (US 20190295912), and Kohl et al (US 20110147911) as examples of stackable substrates with circuits boards and semiconductor die.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to ANDREW ZABEL whose telephone number is (703)756-4788. The examiner can normally be reached M-F 9-5PM ET.
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/ANDREW JOHN ZABEL/Examiner, Art Unit 2818
/JEFF W NATALINI/Supervisory Patent Examiner, Art Unit 2818
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