Prosecution Insights
Last updated: October 01, 2026
Application No. 18/646,440

METHODS AND APPARATUS TO DETERMINE ELECTRICAL PROPERTIES OF COMPONENTS

Final Rejection §103
Filed
Apr 25, 2024
Examiner
FREDERIKSEN, DAVID B
Art Unit
2858
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Texas Instruments Incorporated
OA Round
2 (Final)
86%
Grant Probability
Favorable
3-4
OA Rounds
1m
Est. Remaining
99%
With Interview

Examiner Intelligence

Grants 86% — above average
86%
Career Allowance Rate
419 granted / 486 resolved
+18.2% vs TC avg
Moderate +13% lift
Without
With
+12.7%
Interview Lift
resolved cases with interview
Typical timeline
2y 6m
Avg Prosecution
22 currently pending
Career history
505
Total Applications
across all art units

Statute-Specific Performance

§101
5.4%
-34.6% vs TC avg
§103
53.9%
+13.9% vs TC avg
§102
17.7%
-22.3% vs TC avg
§112
14.6%
-25.4% vs TC avg
Black line = Tech Center average estimate • Based on career data from 486 resolved cases

Office Action

§103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Response to Amendment This Office Action is in response to the Amendment filed on the date: July 08, 2026. Claims 1-6 and 9-20 are currently pending. Claims 1, 9, 14-17 and 19-20 have been amended. Claims 7-8 have been cancelled. No claims are new. Response to Arguments Rejections under 35 U.S.C. § 103 The applicant has argued that the combination of the prior arts Koyanagi and Coimbra fail to teach all of the claim limitations of independent claim 16 (see REMARKS pages 6-7). The examiner respectfully disagrees with the applicant’s argument. Coimbra teaches the argued claim limitations of “a resistor decoder configured to output a voltage based on a resistance of the first pull-up resistor, wherein the controller is configured to determine the threshold based on the voltage,” (see rejection below). Coimbra teaches a state decoder that will output a voltage based on the resistance of a selected resistive value of a resistor associated with a respective threshold temperature (see para [0083]). Thus, the voltage through resistance value of the first pull-up resistor will be known and the threshold temperature is determined by the voltage through the resistance value of the first pull-up resistor. Therefore, Coimbra teaches the limitations as claimed and the rejection of claim 16 is maintained. Rejections under 35 U.S.C. § 112(b) Applicant’s arguments, see REMARKS page 7, with respect to the rejection of claims 1-8 have been fully considered and are persuasive. The rejection of claims 1-8 has been withdrawn. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim(s) 16-20 is/are rejected under 35 U.S.C. 103 as being unpatentable over Koyanagi et al. US2006/0082944 (called Koyanagi hereinafter and previously cited) in view of Coimbra et al. US2020/0173862 (called Coimbra hereinafter and previously cited). Regarding independent claim 16, Koyanagi teaches a system (Fig. 14) comprising: a controller (Fig. 14; ECU2 92) configured to output an indication to a first input pin (Fig. 14; any point from 80c and to the right of it) based on a comparison of a temperature to a threshold (para [0093]; determination of a suitable voltage Va); a first pull-up resistor (Fig. 14; pull-up resistor 94) having a first terminal coupled to the first input pin (Fig. 14; bottom of resistor 94) and a second terminal coupled to a voltage supply (Fig. 14; battery 7). Koyanagi fails to teach a resistor decoder configured to output a voltage based on a resistance of the first pull-up resistor, wherein the controller is configured to determine the threshold based on the voltage. Coimbra teaches a resistor decoder (para [0083]; state machine) configured to output a voltage based on a resistance of the first pull-up resistor (para [0083]), wherein the controller is configured to determine the threshold based on the voltage (para [0083]). Therefore, it would have been obvious to one skilled in the art before the effective filing date of the claimed invention to modify the structure as described by Koyanagi with the programmable array of resistors as described by Coimbra for the purpose of adjusting the threshold temperature to be detected to determine if a die/device is within a safe operating temperature (para [0013 and 0083]). Regarding claim 17, Koyanagi and Coimbra teach the system of claim 16, Koyanagi further teaches wherein the controller is configured to cause the first input pin to be coupled to a common terminal if the temperature exceeds the threshold (Fig. 14; the input of 80c is coupled to a ground through other components in the circuit of Figure 14). Regarding claim 18, Koyanagi and Coimbra teach the system of claim 16, Koyanagi further teaches further including a second pull-up resistor (Fig. 14; resistor to the right of component 80j) having a first terminal coupled to a second input terminal (Fig. 14; right side of the resistor to the right of component 80j coupled to the input of gate driver 80k), the second input terminal coupled to the resistor decoder (Fig. 14; left side of the resistor to the right of component 80j). Regarding claim 19, Koyanagi and Coimbra teach the system of claim 16, Koyanagi further teaches further including a microcontroller (Figs. 11 and 14; ECU 70) coupled to the first input pin, the microcontroller configured to receive an indication if the temperature exceeds the threshold (Figs. 11 and 14; temperature sensor 90 coupled to ECU 70). Regarding claim 20, Koyanagi and Coimbra teach the system of claim 16, wherein the controller is configured to store a lookup table that correlates a resistance of the first pull-up resistor with a temperature threshold (para [0083]; array of resistors so that when one resistor is activated it is associated with a respective threshold temperature). Allowable Subject Matter Claims 1-6 and 9-15 are indicated as allowable subject matter. The following is a statement of reasons for the indication of allowable subject matter: Regarding independent claim 1, the prior arts of record taken alone or in combination fail to teach or suggest: “a second switch having a first terminal and a second terminal, the first terminal coupled to the output terminal of the differential amplifier; and a transistor having a first current terminal, a second current terminal, and a control terminal, the control terminal coupled to the second terminal of the second switch, the first current terminal coupled to a first input/output pin and the first terminal of the capacitor, and the second current terminal coupled to the first terminal of the resistor,” when used in combination with all other limitations of claim 1. Claims 2-6 are indicated as allowable subject matter for depending on claim 1. Regarding independent claim 9, the prior arts of record taken alone or in combination fail to teach or suggest: “a second switch having a first terminal and a second terminal, the first terminal coupled to the output terminal of the differential amplifier; and a transistor having a first current terminal, a second current terminal, and a control terminal, the control terminal coupled to the second terminal of the second switch, the first current terminal coupled to the first input/output pin and the first terminal of the capacitor, and the second current terminal coupled to the first terminal of the resistor,” when used in combination with all other limitations of claim 1. Claims 10-15 are indicated as allowable subject matter for depending on claim 9. Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Yanamandra et al. discloses “Short detection circuit” (see US11531070) Shannon et al. discloses “Electrical over-stress detection circuit” (see US2010/0271742) Schemm discloses “Methods and apparatus to trim temperature sensors” (see US2021/0199515) THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to DAVID B FREDERIKSEN whose telephone number is (571)272-8152. The examiner can normally be reached M-F 8am - 5pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Huy Phan can be reached at (571)272-7924. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /DAVID B FREDERIKSEN/Examiner, Art Unit 2858 /RAUL J RIOS RUSSO/Examiner, Art Unit 2858
Read full office action

Prosecution Timeline

Apr 25, 2024
Application Filed
Apr 08, 2026
Non-Final Rejection mailed — §103
Jul 08, 2026
Response Filed
Sep 18, 2026
Final Rejection mailed — §103 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

3-4
Expected OA Rounds
86%
Grant Probability
99%
With Interview (+12.7%)
2y 6m (~1m remaining)
Median Time to Grant
Moderate
PTA Risk
Based on 486 resolved cases by this examiner. Grant probability derived from career allowance rate.

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