DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim 1, 8-16 are rejected under 35 U.S.C. 102 A1 as being anticipated by XU(US20210384182A1).
Regarding Claim 1, FIG 6D, FIG 7 and FIG 9 disclose a display panel comprising:
a substrate (FIG 6D; 690; ¶[0170]); and
a plurality of pixels (FIG 7; 700; 710; 720; 730; ¶[0171]) on the substrate (FIG 1B; 104; ¶[0171]), each of the plurality of pixels (FIG 7; 700; 710; 720; 730; ¶[0171]) comprising a plurality of sub-pixels (FIG 9 with annotations; ¶[0426]) coaxially stacked, each of the plurality of sub-pixels comprising a conductive layer (FIG 9; 410 and 414; 428 and 432, 434 and 438; ¶[0300] ¶[0310] ¶[0311] ¶[0321] ¶[0322]), a light-emitting layer (FIG 9; 412, 430, 436; ¶[0289] ¶[0290] ¶[0291]) electrically connected to the conductive layer (FIG 9; conductive layers (410 and 414; 428 and 432, 434 and 438) in contact with light-emitting layers 412, 430, 436), and a base layer (FIG 9; 409 and 415, 427 and 433, 435 and 439; ¶[0302] ¶[0314] ¶[0324]) the plurality of pixels (FIG 7 with annotations; ¶[0171]; direction of plurality of pixels) arranging in an array on a plane vertical to a stacking direction of the plurality of sub-pixels (FIG 7 with annotations; ¶[0171]; direction of stacking sub-pixels);
wherein the conductive layer is configured to transmit an electrical signal (FIG 9; ¶[0300]); to improve conductivity), the light-emitting layer is configured to emit light in response to the electrical signal (FIG 9; ¶[0179]; emits a distinct color), and the plurality of sub-pixels is stacked in a sequence (FIG 9 with annotations; ¶[0426]), along the stacking direction, the base layers of the sub-pixels with a same sequence are connected with each other (FIG 9; Base layers (409 and 415, 427 and 433, 435) connected by 416, 418, 420, 440; ¶[0286]).
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Regarding Claim 8, FIG 9 discloses the display panel according to claim 1, wherein the plurality of sub-pixels (FIG 9 with annotations; ¶[0426]) in each of the plurality of pixels emit light of different colors (FIG 9; ¶[0179]; emits a distinct color).
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Regarding Claim 9, FIG 1B and FIG 9 disclose The display panel according to claim 8, wherein the light-emitting layer is configured to emit red light (FIG 1B translates to FIG 9; 109 and 115 translates to 409 and 415); the reflective layers reflect the light emitting layer; ¶[0250]), green light (FIG 1B translates to FIG 9; 127 and 133 translates to 427 and 433); the reflective layers reflect the light emitting layer; ¶[0250]), or blue light (FIG 1B translates to FIG 9; 135 and 139 (not shown) translates to 435 and 439 (not shown)); the reflective layers reflect the light emitting layer; ¶[0231] ¶[0324] ¶[0250]) according to the electrical signal.
Regarding Claim 10, ¶[0180] discloses The display panel according to claim 1, wherein the light from the light-emitting layer (¶[0180] In some embodiments, the light emitted from the single pixel multi-color LED device is from the top surfaces of each of the LED structures within the single pixel multi-color LED device) transmits along the stacking direction away from the substrate.
Regarding Claim 11, FIG 9 discloses The display panel according to claim 1, wherein the base layer of the sub-pixel at the top (FIG 9; 439 (not shown); ¶[0324]) covers the light-emitting layer (FIG 9; 436; ¶[0324]) of the sub-pixel at the top.
Regarding Claim 12, Fig 9 discloses the display panel according to claim 1, wherein each of the plurality of pixels comprises a first sub-pixel (FIG 9 with annotations; First sub-pixel; direction of stacking sub-pixels) and a second sub-pixel (FIG 9 with annotations; Second sub-pixel; direction of stacking sub-pixels) coaxially stacked along the stacking direction; and
the base layers (FIG 9; 409 and 415; ¶[0338] ¶[0301]; base layers are connected by 412, 414 and 410) of the first sub-pixels of the plurality of pixels are connected with each other, and the base layers (FIG 9; 427 and 433; ¶[0290]) of the second sub-pixels of the plurality of pixels are connected with each other.
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Regarding Claim 13, FIG 9 discloses the display panel according to claim 12, wherein each of the plurality of pixels further comprises a third sub-pixel (FIG 9 with annotations; Third sub-pixel; direction of stacking sub-pixels) on a side of the second sub-pixel (FIG 9 with annotations; Second sub-pixel) away from the first sub-pixel (FIG 9 with annotations; First sub-pixel), the first sub-pixel, the second sub-pixel, and the third sub-pixel are coaxially stacked along the stacking direction (FIG 9 with annotations; First sub-pixel, Second sub-pixel, Third-sub pixel; direction of stacking sub-pixels); and
the base layers (FIG 9; 435 and 439; ¶[0324]; base layers are connected by 434, 436 and 438) of the third sub-pixels of the plurality of pixels are connected with each other.
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Regarding Claim 14, FIG 1B and FIG 9 discloses the display panel according to claim 12, wherein the first sub-pixel is configured to emit red light (FIG 9 with annotations; FIG 1B translates to FIG 9; 109 and 115 translates to 409 and 415); the reflective layers reflect the light emitting layer; ¶[0250]), and the second sub-pixel is configured to emit green light (FIG 9 with annotations; FIG 1B translates to FIG 9; 127 and 133 translates to 427 and 433); the reflective layers reflect the light emitting layer; ¶[0250]); or
the first sub-pixel is configured to emit green light, and the second sub-pixel is configured to emit red light.
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Regarding Claim 15, FIG 1B and FIG 9 discloses the display panel according to claim 12, wherein the first sub-pixel is configured to emit a first light (FIG 9 with annotations; FIG 1B translates to FIG 9; 109 and 115 translates to 409 and 415); the reflective layers reflect the light emitting layer; ¶[0250]), and the second sub-pixel is configured to emit a second light (FIG 9 with annotations; FIG 1B translates to FIG 9; 127 and 133 translates to 427 and 433); the reflective layers reflect the light emitting layer; ¶[0250]); and
the first light passes through the second sub-pixel to show an image (¶[0385]; an image of a single pixel is formed at a certain distance).
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Regarding Claim 16, FIG 1B and FIG 9 disclose the display panel according to claim 12, wherein the first light is red light (FIG 9 with annotations; FIG 1B translates to FIG 9; 109 and 115 translates to 409 and 415); the reflective layers reflect the light emitting layer; ¶[0250]) and the second light is green light (FIG 9 with annotations; FIG 1B translates to FIG 9; 127 and 133 translates to 427 and 433); the reflective layers reflect the light emitting layer; ¶[0250]); or
The first light is green light and the second light is red light.
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Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 2 and 3 are rejected under 35 U.S.C. 103 as being unpatentable over Xu(US20210384182A1) and Kim(US20230275071A1).
Regarding Claim 2, Xu teaches in FIG 1B, FIG 7 and Fig 9 discloses the display panel according to claim 1,
each of the plurality of pixels ((FIG 7 and FIG 9; 700; 710; 720; 730 and 900 (single pixel); ¶[0171] ¶[0426]) comprises a plurality of metal circuit layers (FIG 1B; 406; ¶[0286]) on a side of the base layer (FIG 9; 409 ; ¶[0289]) away from the light-emitting layer (FIG 9; 412; ¶[0289]), the plurality of metal circuit layers connect the conductive layer of an adjacent pixel (FIG 9; 406; ¶[0286]; The circuitry on substrate 404 includes contacts to each individual driver circuit 406), a part of the base layer (FIG 9; 427; ¶[0290]) contact at least one of the plurality of metal circuit layers (FIG 9; contact with 426, 424 and 422 to reach 406; ¶[0311]) and not contact the light-emitting layer is formed with a plurality of through holes (FIG 9; ¶[0307]), at least one pulse conducting electrode (FIG 9; 426; ¶[0286]) is on a side of the base layer (FIG 9; 427; ¶[0290]) away from the plurality of metal circuit layers (FIG 9; 406; ¶[0298]; driver circuit 406 on the substrate 404), and the at least one pulse conducting electrode (FIG 9; 422, 424, 426; ¶[0286]) connects to at least one of the plurality of metal circuit layers (FIG 9; 406; ¶[0298]; driver circuit 406 on the substrate 404) through at least one of the plurality of through holes (FIG 9; ¶[0307]).
Xu does not teach wherein the conductive layer comprises a first conducting electrode and a second conducting electrode on a same side of the light-emitting layer, and the base layer contacts a side of the light-emitting layer away from the conductive layer; and
Kim teaches in FIG 4 wherein the conductive layer comprises a first conducting electrode (FIG 4; 32a; ¶[0104]) and a second conducting electrode (FIG 4; 32b; ¶[0104]) on a same side of the light-emitting layer (FIG 4; active layer A; ¶[0112]), and the base layer (FIG 4; S2; ¶[0112]) contacts a side of the light-emitting layer (FIG 4; active layer A; ¶[0112]) away from the conductive layer (FIG 4; 32a and 32b; ¶[0104]); and
It is obvious to one with ordinary skill in the art before the effective filing date of the invention to combine the prior art of Xu, a semiconductor display device with the pixel on a substrate comprised of subpixels stacked in a vertical direction, and the prior art of Kim a semiconductor device with the sub-pixels comprised of a conductive layer comprising a first electrode and a second electrode on a side of the light emitting layer away from the base layer. This combination produces semiconductor display device with the pixel on a substrate comprised of subpixels stacked in a vertical direction and the sub-pixels comprised of a conductive layer comprising a first electrode and a second electrode on a side of the light emitting layer away from the base layer. This arrangement with of the electrodes in relation to the light emitting layer and base layer allows for the electrons and holes to recouple in the active layer and emit light (Kim ¶[0115]).
Regarding Claim 3, Xu teaches in FIG 9 the display panel according to claim 2, wherein the substrate comprises a driving substrate (FIG 9; 404; ¶[0286]);
the driving substrate (FIG 9; 404; ¶[0286]) is at a side of the conductive layer (FIG 9; 410; ¶[0300]) of the sub-pixel (FIG 9; 409, 410, 412, 414, 415) at the bottom away from the light-emitting layer (FIG 9; 412; ¶[0289]); and
the driving substrate (FIG 9; 404; ¶[0286]) connects the conductive layer (FIG 9; 404; 404 is connected to metal bonding layer 408, reflective layer 409 and conductive layer 410) and is configured to send electrical signals (¶[0286]; contacts to each individual driver circuit 406 (which is part of 404)) to the plurality of sub-pixels to drive the plurality of sub-pixels to emit light (FIG 9; ¶[0286]; individual pixel drivers to control the operation of the individual single pixel tri-color LED device).
Claims 17 and 18 are rejected under 35 U.S.C. 103 as being unpatentable over XU(US20210384182A1).
Regarding Claim 17, Xu teaches the display panel according to claim 1.
Xu does not teach wherein the plurality of sub-pixels have a same size on the plane vertical to the stacking direction.
However, the ordinary artisan would have recognized the size and shape of the plurality of sub-pixels to be a result effective variable affecting image display quality. Thus, it would have been obvious to limit the sub-pixel size within the claimed range, since optimum or workable ranges of such variables are discoverable through routine experimentation. see MPEP 2144.05 II.B
Regarding Claim 18, Xu discloses in FIG 6D, FIG 7 and FIG 9 a display panel comprising:
a substrate (FIG 6D; 690; ¶[0170]); and
a plurality of pixels (FIG 7; 700; 710; 720; 730; ¶[0171]) on the substrate (FIG 6D; 690; ¶[0170]), each of the plurality of pixels (FIG 7; 700; 710; 720; 730; ¶[0171]) comprising a plurality of sub-pixels (FIG 9 with annotations; ¶[0426]) coaxially stacked, each of the plurality of sub-pixels comprising a conductive layer (FIG 9; 410 and 414; 428 and 432, 434 and 438; ¶[0300] ¶[0310] ¶[0311] ¶[0321] ¶[0322]), a base layer (FIG 9; 409 and 415, 427 and 433, 435 and 439; ¶[0302] ¶[0314] ¶[0324]) and a light-emitting layer (FIG 9; 412, 430, 436; ¶[0289] ¶[0290] ¶[0291]) connected between the conductive layer (FIG 9; 410 and 414; 428 and 432, 434 and 438; ¶[0300] ¶[0310] ¶[0311] ¶[0321] ¶[0322]) and the base layer (FIG 9; 409 and 415, 427 and 433, 435 and 439; ¶[0302] ¶[0314] ¶[0324]), the plurality of pixels arranging in an array on a plane vertical to a stacking direction of the plurality of sub-pixels (FIG 7 with annotations; ¶[0171]; direction of stacking sub-pixels); wherein
the conductive layer is configured to transmit an electrical signal (FIG 9; ¶[0300]); to improve conductivity), the light-emitting layer is configured to emit light (FIG 9; ¶[0179]; emits a distinct color) according to the electrical signal, and
Xu does not teach the plurality of sub-pixels have a same size on the plane vertical to the stacking direction.
However, the ordinary artisan would have recognized the size and shape of the plurality of sub-pixels to be a result effective variable affecting image display quality. Thus, it would have been obvious to limit the sub-pixel size within the claimed range, since optimum or workable ranges of such variables are discoverable through routine experimentation. see MPEP 2144.05 II.B
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Allowable Subject Matter
Claims 4, 5, 6 and 7 are objected to as being dependent upon a rejected base claim, but would
be allowable if rewritten in independent form including all of the limitations of the base claim and any
intervening claims.
Regarding Claim 4, the closest prior art XU(US20210384182A1) either singularly or in combination, does not disclose or suggest the combination of limitations including, each of the plurality of pulse conducting electrode is configured to send the electrical signal to the plurality of sub-pixels in each of the plurality of pixels except for a bottommost sub-pixel.
Xu discloses wherein the driving substrate connects at least one of the plurality of pulse conducting electrodes
Regarding Claim 5, the closest prior art XU(US20210384182A1) either singularly or in combination, does not disclose or suggest the combination of limitations including, during different periods by pulse modulation.
Xu discloses the driving substrate is configured to control the plurality of sub-pixels to emit light
Regarding Claim 6, the closest prior art XU(US20210384182A1) either singularly or in combination, does not disclose or suggest the combination of limitations including, driving substrate comprises one driving circuit.
Xu discloses wherein the driving circuit to control the plurality of sub-pixels
Regarding Claim 7, the closest prior art XU(US20210384182A1) either singularly or in combination, does not disclose or suggest the combination of limitations including, wherein the driving substrate comprises a plurality of driving circuits to control the plurality of sub-pixels.
Xu discloses wherein the driving substrate comprises a plurality of driving circuits
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant’s
disclosure:
Armitage (US20230420627A1); This reference teaches a semiconductor device RGB light emitting diode
Aziz(US20230299119A1); This reference teaches the method of forming a light emitting layer on a substrate
Any inquiry concerning this communication or earlier communications from the examiner should be directed to BASEEMAH QADEER RUCKER whose telephone number is (571)272-0380. The examiner can normally be reached Monday-Friday 7:30-5:00.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Eliseo Ramos-Feliciano can be reached at 5712727925. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/B.Q.R./Examiner, Art Unit 2817
/ELISEO RAMOS FELICIANO/Supervisory Patent Examiner, Art Unit 2817
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