Prosecution Insights
Last updated: October 27, 2026
Application No. 18/646,834

SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE SAME

Non-Final OA §102§103
Filed
Apr 26, 2024
Priority
Jul 21, 2023 — RE 10-2023-0095615
Examiner
HATFIELD, MARSHALL MU-NUO
Art Unit
2897
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Samsung Electronics Co., Ltd.
OA Round
1 (Non-Final)
93%
Grant Probability
Favorable
1-2
OA Rounds
10m
Est. Remaining
97%
With Interview

Examiner Intelligence

Grants 93% — above average
93%
Career Allowance Rate
89 granted / 96 resolved
+24.7% vs TC avg
Minimal +4% lift
Without
With
+4.4%
Interview Lift
resolved cases with interview
Typical timeline
3y 4m
Avg Prosecution
23 currently pending
Career history
119
Total Applications
across all art units

Statute-Specific Performance

§103
49.5%
+9.5% vs TC avg
§102
34.1%
-5.9% vs TC avg
§112
16.0%
-24.0% vs TC avg
Black line = Tech Center average estimate • Based on career data from 96 resolved cases

Office Action

§102 §103
Detailed Action Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Election/Restriction Applicant’s election of Species I, Sub-species A, Figs. 2 and 5A, claims 1-20 without traverse is acknowledged. Claim Rejections - 35 USC § 102 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. (a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention. Claim(s) 11, 16 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Ko et al.(US 20200105694 A1, hereafter Ko). Regarding Claim 11, Ko discloses: A semiconductor package(Fig. 19), comprising: a first redistribution substrate(Fig. 19 [140]) having a multi-layered first redistribution line(Fig. 19 [142]); a semiconductor chip(Fig. 19 [121]) on the first redistribution substrate(Fig. 19 [140]); a sealing material(Fig. 19 [130]) on the first redistribution substrate(Fig. 19 [140]) and over the semiconductor chip(Fig. 19 [121]); a through post(Fig. 19 [110]) on the first redistribution substrate(Fig. 19 [140]) extending into the sealing material(Fig. 19 [130]) and spaced laterally from the semiconductor chip(Fig. 19 [121]); a second redistribution substrate(Fig. 19 [180]) on the sealing material(Fig. 19 [130]) and having at least one second redistribution line(Fig. 19 [182]); and an upper package(Fig. 19 [30]) on the second redistribution substrate(Fig. 19 [180]) and electrically connected to the second redistribution substrate(Fig. 19 [180]) through an inter-substrate connection terminal(Fig. 19 [182]), wherein an opening(Fig. 19 [190h]) exposing a portion of the at least one second redistribution line(Fig. 19 [182]) is on an upper surface of the second redistribution substrate(Fig. 19 [180]), and an uppermost second redistribution line of the at least one second redistribution line exposed through the opening(Fig. 19 [190h]) has a multi-metal-layered structure(Fig. 19 [P]). Regarding Claim 16, Ko discloses: A semiconductor package(Fig. 19), comprising: a first redistribution substrate(Fig. 19 [140]) having a multi-layered first redistribution line(Fig. 19 [142]); a semiconductor chip(Fig. 19 [121]) on the first redistribution substrate(Fig. 19 [140]); a through post(Fig. 19 [110]) on the first redistribution substrate(Fig. 19 [140]) and spaced laterally from the semiconductor chip(Fig. 19 [121]); and a second redistribution substrate(Fig. 19 [180]) on the semiconductor chip(Fig. 19 [121]) and through post(Fig. 19 [110]) and having at least one second redistribution line(Fig. 19 [182]); wherein an opening(Fig. 19 [190h]) exposing a portion of the at least one second redistribution line(Fig. 19 [182]) is on an upper surface of the second redistribution substrate(Fig. 19 [180]), and an uppermost second redistribution line(Fig. 19 [182]) exposed through the opening(Fig. 19 [190h]) comprises a lower metal layer of copper(See paragraph 0115), and an upper metal layer(Fig. 19 [P]) of nickel(See paragraph 0116). Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim(s) 1, 6-10 is/are rejected under 35 U.S.C. 103 as being unpatentable over Hwang et al.(US 20220037294 A1, hereafter Hwang) in view of Fujita(US 20220328390 A1, hereafter Fujita). Regarding Claim 1, Ko discloses: A first redistribution substrate(Fig. 1a [100]) having a multi-layered first redistribution line(Fig. 1A [150]); a semiconductor chip(Fig. 1A [200]) on the first redistribution substrate(Fig. 1A [100]); a through post(Fig. 1A [310]) extending vertically on the first redistribution substrate(Fig. 1A [100]) and spaced laterally from the semiconductor chip(Fig. 1A [200]); and a second redistribution substrate(Fig. 1A [400]) on the semiconductor chip(Fig. 1A [200]) and the through post(Fig. 1A [200]) and having at least one second redistribution line(Fig. 1A [450]), wherein a first pad region(Fig. 1A [420]) and a second pad region(Fig. 1A See figure below) are defined on an upper surface of the second redistribution substrate(Fig. 1A [400]), the first pad region(Fig. 1A [420]) including a first opening(Fig. 1A See figure below) exposing a first portion of the at least one second redistribution line(Fig. 1A [450]) and position at a central portion of the second redistribution substrate(Fig. 1A [400]), and the second pad region(Fig. 1A See figure below) extending around the first pad region(Fig. 1A [420]) and including a second opening(Fig. 1A See figure below) exposing a second portion of the at least one second redistribution line(Fig. 1A [450]) and a first-type pad(Fig. 1A See figure below) is on the at least one second redistribution line(Fig. 1A [450]) in the first opening(Fig. 1A See figure below), and a second-type pad(Fig. 1A See figure below) having an outer protruding portion is on the at least one second redistribution line in the second opening(Fig. 1A See figure below). Hwang does not teach or disclose the first-type pad having a planar shape. In the same field of endeavor, Fujita discloses a first-type pad(Fig. 4E [103]) having a planar shape. It would have been obvious to one of ordinary skill in the art at the time the application at hand was filed to modify the device disclosed by Hwang along the lines of Fujita. One might have been motivated to provide a pad of a planar shape in order to form a desirable attachment to an external component, as disclosed by Fujita(See paragraph 0057). Performing this modification would have generated a predictable result in a modified version of Hwang’s package with a planar-shaped package as disclosed by Fujita. Regarding Claim 6, Hwang further discloses: The second-type pad(Fig. 1A See figure below) is on an uppermost second redistribution line(Fig. 1A [450]) in the second opening(Fig. 1A See figure below), and The uppermost second redistribution line(Fig. 1A See figure below) is not exposed around the second-type pad(Fig. 1A See figure below). Regarding Claim 7, Hwang further discloses: The second redistribution substrate(Fig. 1A [400]) comprises a body insulating layer(Fig. 1A [403]) over the at least one second redistribution line(Fig. 1A [450]), the second opening(Fig. 1A See figure below) has a structure extending vertically into a portion of an upper portion of the body insulating layer(Fig. 1A [403]) and having a bottom surface of the uppermost second redistribution line(Fig. 1A [450]) and side surfaces of the body insulating layer(Fig. 1A [403]), and the second-type pad(Fig. 1A See figure below) has a structure extending from the uppermost second redistribution line(Fig. 1A [450]) onto the side surfaces and an upper surface of the body insulating layer(Fig. 1A [403]). Regarding Claim 8, Hwang further discloses: A portion of the second-type pad(Fig. 1A See figure below) extending onto the upper surface of the body insulating layer(Fig. 1A [403]) constitutes the outer protruding portion of the second-type pad(Fig. 1A See figure below). Regarding Claim 9, Hwang further discloses: An upper package(Fig. 1A [500]) on the second redistribution substrate(Fig. 1A [400]), wherein the semiconductor chip(Fig. 1A [200]) comprises an application processor(AP) chip(See paragraph 0070, “a memory circuit, a logic circuit, or a combination thereof”), and the upper package(Fig. 1A [500]) comprises at least one memory chip(See paragraph 0047). Regarding Claim 10, Hwang further discloses: A sealing material(Fig. 1A [300]) at least partially filling the space between the first redistribution substrate(Fig. 1A [100]) and the second redistribution substrate(Fig. 1A [400]) and on the semiconductor chip(Fig. 1A [200]), wherein the through post(Fig. 1A [310]) extends into the sealing material(Fig. 1A [300]) and electrically connects the first redistribution substrate(Fig. 1A [100]) to the second redistribution substrate(Fig. 1A [400]). Claim(s) 2 is/are rejected under 35 U.S.C. 103 as being unpatentable over Hwang and Fujita, further in view of Ko. Regarding Claim 2, Hwang discloses the first-type pad and the second-type pad(Fig. 1A See figure below) on the metal layer of the redistribution line(Fig. 1A [450]). Neither Hwang nor Fujita teach or disclose the uppermost second redistribution line of the at least one second redistribution line exposed from the first opening and the second opening has a multi-metal-layered structure. In the same field of endeavor, Ko discloses a multi-metal-layered structure(Fig. 19 [182/P]) of the at least one second redistribution line(Fig. 19 [180]) exposed from the opening(Fig. 19 [190h]) has a multi-metal-layered structure(Cu and Au, See paragraphs 0115-0116), The uppermost second redistribution line(Fig. 19 [180]) comprises a lower metal layer(Fig. 19 [182]) of copper(See paragraph 0115) and an upper metal layer(Fig. 19 [P]) of nickel(See paragraph 0116). It would have been obvious to one of ordinary skill in the art at the time the application at hand was filed to modify the device disclosed by Hwang and Fujita along the lines of Ko. One might have been motivated to provide Ko’s surface processing layer to improve adhesion between the pad and the redistribution line. Performing this modification would have generated a predictable result in the creation of a modified form of Hwang’s device with Fujita’s pad structure alongside Ko’s surface processing layer. Claim(s) 3 is/are rejected under 35 U.S.C. 103 as being unpatentable over Hwang and Fujita, further in view of Ko and Chung et al.(US 20210202423 A1, hereafter Chung). Regarding Claim 3, Ko describes the lower metal layer of Cu and an upper metal layer of Ni(See rejection of claim 2). However, neither Hwang nor Fujita teach or disclose a first cross-sectional thickness of the upper metal layer is about 0.1 microns or more, and the lower metal layer has a second cross-sectional thickness equal to or greater than the first cross-sectional thickness of the upper metal layer. In the same field of endeavor, Chung describes an upper metal layer(Fig. 1 [153]) which is greater than 0.1 µm in thickness(See paragraph 0045) and lesser in thickness when compared to a lower metal layer(Fig. 1 [151]). It would have been obvious to one of ordinary skill in the art to further modify the device disclosed by Hwang along the lines of Chung. When producing a modified version of Hwang’s device, one of ordinary skill in the art would require a set of dimensions by which to produce the relevant components of Hwang’s device. For this, the prior art of Chung, which lays out the dimensions of respective metal layers, would be necessary. Performing this modification would have generated a Predictable result in the creation of a modified form of Hwang’s device with Fujita’s pad structure alongside Ko’s surface processing layer. Claim(s) 4-5 is/are rejected under 35 U.S.C. 103 as being unpatentable over Hwang and Fujita, further in view of Lam(US 20180294186 A1, hereafter Lam). Regarding Claim 4, Hwang discloses: The first-type pad(Fig. 1A See figure below) is on an uppermost second redistribution line(Fig. 1A [450]) of the at least one second redistribution line(Fig. 1A [450]) in the first opening(Fig. 1A See figure below). Hwang does not teach or disclose the uppermost second redistribution line is exposed around the first-type pad. In the same field of endeavor, Lam discloses an exposed redistribution line(Fig. 2A [30]) around a first pad(Fig. 2A [160]). It would have been obvious to one of ordinary skill in the art at the time the application at hand was filed to further modify the device disclosed by Hwang along the lines of Lam. One might have been motivated to provide exposed portions of the second redistribution layer in order to provide an accessible terminal for testing away from the existing pad and structure connected to it. Performing this modification would have generated a predictable result in the creation of Hwang’s device with an exposed portion of a redistribution layer. Regarding Claim 5, Hwang further discloses: The second redistribution substrate(Fig. 1A [400]) comprises a body insulating layer(Fig. 1A [403]) over the at least one second redistribution line(Fig. 1A [450]), the first opening(Fig. 1A See figure below) has a structure extending vertically into a portion of an upper portion of the body insulating layer to expose a portion of the uppermost second redistribution line(Fig. 1A See figure below), an entirety of the uppermost second redistribution line has a first width in a first direction parallel to an upper surface of the first redistribution substrate(Fig. 1A [100]), a portion of the uppermost second redistribution line(Fig. 1A See figure below), which is exposed through the first opening(Fig. 1A See figure below) has a second width that is less than the first width in the first direction, and the body insulating layer(Fig. 1A [403]) is over an outer portion of the uppermost second redistribution line(Fig. 1A See figure below). Claim(s) 12-15, 17-19 is/are rejected under 35 U.S.C. 103 as being unpatentable over Ko in view of Yu et al.(US 20210035890 A1, hereafter Yu). Regarding Claim 12, Ko does not teach or disclose a first pad region and a second pad region defined on the upper surface of the second redistribution substrate or the limitations therein. In the same field of endeavor, Yu discloses: A first pad region(Fig. 5 [S3]) and a second pad region(Fig. 5 [S1]) defined on an upper surface of the second redistribution substrate(Fig. 5 [170]), the first pad region(Fig. 5 [S3]) positioned at a central portion of the second redistribution substrate(Fig. 5 [170]), and the second pad region(Fig. 5 [S1]) extending around the first pad region(Fig. 5 [S3]), The opening(Fig. 5 [S1/S2/S3]) comprises a first opening(Fig. 5 [S3]) in the first pad region(Fig. 5 [S3]) and a second opening(Fig. 5 [S1]) in the second pad region(Fig. 5 [S1]), a first-type pad(Fig. 5 [1743]) having a planar shape is on the uppermost second redistribution line(Fig. 5 [172]) of the at least one second redistribution line in the first opening(Fig. 5 [S3]), and a second-type pad(Fig. 5 [1741]) having an outer protruding portion is on the uppermost second redistribution line(Fig. 5 [172]) in the second opening(Fig. 5 [S1]). It would have been obvious to one of ordinary skill in the art at the time the application at hand was filed to modify the device disclosed by Ko along the lines of Yu. One might have been motivated to apply Yu’s pad structure in order to improve layout flexibility and reliability of the package(See paragraph 0029 of Yu). Performing this modification would have generated a predictable result in the creation of Ko’s device with a pad structure as disclosed by Yu. Regarding Claim 13, Ko discloses the uppermost second redistribution line(Fig. 19 [182/P]) comprises a lower metal layer(Fig. 19 [182]) of copper and an upper metal layer(Fig. 19 [P]) of Nickel(See paragraphs 0115-0116). Ko does not teach or disclose a first-type pad on an upper metal layer in the first opening. In the same field of endeavor, Yu discloses a first-type pad(Fig. 5 [1743]) on an upper metal layer(Fig. 5 [172]) in the first opening(Fig. 5 [S3]). It would have been obvious to one of ordinary skill in the art at the time the application at hand was filed to modify the device disclosed by Ko along the lines of Yu. One might have been motivated to apply Yu’s pad structure in order to improve layout flexibility and reliability of the package(See paragraph 0029 of Yu). Performing this modification would have generated a predictable result in the creation of Ko’s device with a pad structure as disclosed by Yu. Furthermore, Ko does not teach or disclose the upper metal layer is exposed around the first-type pad. In the same field of endeavor, Yu disclose a first-type pad(Fig. 5 [1743]) which exposes the layer beneath it(See Fig. 5). In addition, Yu describes the metallization layer(Fig. 5 [174]) of which the first-type pad is a part of as being electrically connected to the metallization layer below it(Fig. 5 [172]). It would have been obvious to one of ordinary skill in the art at the time the application at hand was filed to arrive at the limitations of the claim at hand by applying the prior art of Yu to the prior art of Ko. In connecting the first pad(Fig. 5 [1743]) to the metallization layer below it(Fig. 5 [172]), one of ordinary skill in the art would be presented with a handful of ways by which to do so, one of which being the placement of the pad atop the metallization layer in such a way that it makes a direct contact with the metallization in a space wider than the pad itself, thus exposing a portion of this metallization layer. One might have been motivated to apply Yu’s pad structure in order to improve layout flexibility and reliability of the package(See paragraph 0029 of Yu). Performing this modification would have generated a predictable result in the creation of Ko’s device with a pad structure as disclosed by Yu. Regarding Claim 14, Ko further discloses the uppermost second redistribution line(Fig. 19 [182]) of the at least one second redistribution line(Fig. 19 [182]) comprises a lower metal layer of copper and an upper metal layer of nickel(See paragraph 0115-0116). While Ko does not disclose that the second-type pad is on the upper metal layer in the second opening and the upper metal layer is not exposed around the second-type pad, one of ordinary skill in the art who applies the prior art of Yu to Ko’s device would have naturally arrived at the limitations at hand, due to the deposition of the pads(Fig. 5 [174]) atop the first redistribution line(Fig. 5 [172]). Regarding Claim 15, Ko further discloses: The second redistribution substrate(Fig. 19 [180]) comprises a body insulating layer(Fig. 19 [190]) on the at least one second redistribution line(Fig. 19 [182]), the second opening(Fig. 19 [190h]) has a structure extending vertically into a portion of an upper portion of the body insulating layer(Fig. 19 [190]) and defined by a bottom surface of the upper metal layer(Fig. 19 [P]) and side surfaces of the body insulating layer(Fig. 19 [190]). Ko does not teach or disclose the second-type pad has a structure extending from the upper metal layer onto the side surfaces and an upper surface of the body insulating layer. In the same field of endeavor, Yu discloses the second-type pad(Fig. 5 [S1]) has a structure extending from the upper metal layer(Fig. 5 [172]) It would have been obvious to one of ordinary skill in the art at the time the application at hand was filed to modify the device disclosed by Ko along the lines of Yu. One might have been motivated to apply Yu’s pad structure in order to improve layout flexibility and reliability of the package(See paragraph 0029 of Yu). Performing this modification would have generated a predictable result in the creation of Ko’s device with a pad structure as disclosed by Yu. Regarding Claim 17, Ko does not teach or disclose a first pad region and a second pad region defined on the upper surface of the second redistribution substrate or the limitations therein. In the same field of endeavor, Yu discloses: A first pad region(Fig. 5 [S3]) and a second pad region(Fig. 5 [S1]) defined on an upper surface of the second redistribution substrate(Fig. 5 [170]), the first pad region(Fig. 5 [S3]) positioned at a central portion of the second redistribution substrate(Fig. 5 [170]), and the second pad region(Fig. 5 [S1]) extending around the first pad region(Fig. 5 [S3]), The opening(Fig. 5 [S1/S2/S3]) comprises a first opening(Fig. 5 [S3]) in the first pad region(Fig. 5 [S3]) and a second opening(Fig. 5 [S1]) in the second pad region(Fig. 5 [S1]), a first-type pad(Fig. 5 [1743]) having a planar shape is on the uppermost second redistribution line(Fig. 5 [172]) of the at least one second redistribution line in the first opening(Fig. 5 [S3]), and a second-type pad(Fig. 5 [1741]) having an outer protruding portion is on the uppermost second redistribution line(Fig. 5 [172]) in the second opening(Fig. 5 [S1]). It would have been obvious to one of ordinary skill in the art at the time the application at hand was filed to modify the device disclosed by Ko along the lines of Yu. One might have been motivated to apply Yu’s pad structure in order to improve layout flexibility and reliability of the package(See paragraph 0029 of Yu). Performing this modification would have generated a predictable result in the creation of Ko’s device with a pad structure as disclosed by Yu. Regarding Claim 18, Ko does not teach or disclose a first-type pad on an upper metal layer in the first opening. In the same field of endeavor, Yu discloses a first-type pad(Fig. 5 [1743]) on an upper metal layer(Fig. 5 [172]) in the first opening(Fig. 5 [S3]). It would have been obvious to one of ordinary skill in the art at the time the application at hand was filed to modify the device disclosed by Ko along the lines of Yu. One might have been motivated to apply Yu’s pad structure in order to improve layout flexibility and reliability of the package(See paragraph 0029 of Yu). Performing this modification would have generated a predictable result in the creation of Ko’s device with a pad structure as disclosed by Yu. Furthermore, Ko does not teach or disclose the upper metal layer is exposed around the first-type pad. In the same field of endeavor, Yu disclose a first-type pad(Fig. 5 [1743]) which exposes the layer beneath it(See Fig. 5). In addition, Yu describes the metallization layer(Fig. 5 [174]) of which the first-type pad is a part of as being electrically connected to the metallization layer below it(Fig. 5 [172]). It would have been obvious to one of ordinary skill in the art at the time the application at hand was filed to arrive at the limitations of the claim at hand by applying the prior art of Yu to the prior art of Ko. In connecting the first pad(Fig. 5 [1743]) to the metallization layer below it(Fig. 5 [172]), one of ordinary skill in the art would be presented with a handful of ways by which to do so, one of which being the placement of the pad atop the metallization layer in such a way that it makes a direct contact with the metallization in a space wider than the pad itself, thus exposing a portion of this metallization layer. One might have been motivated to apply Yu’s pad structure in order to improve layout flexibility and reliability of the package(See paragraph 0029 of Yu). Performing this modification would have generated a predictable result in the creation of Ko’s device with a pad structure as disclosed by Yu. Regarding Claim 19, Ko further discloses: The second redistribution substrate(Fig. 19 [180]) comprises a body insulating layer(Fig. 19 [190]) on the at least one second redistribution line(Fig. 19 [182]), the second opening(Fig. 19 [190h]) has a structure extending vertically into a portion of an upper portion of the body insulating layer(Fig. 19 [190]) and defined by a bottom surface of the upper metal layer(Fig. 19 [P]) and side surfaces of the body insulating layer(Fig. 19 [190]). Ko does not teach or disclose the second-type pad has a structure extending from the upper metal layer onto the side surfaces and an upper surface of the body insulating layer. In the same field of endeavor, Yu discloses the second-type pad(Fig. 5 [S1]) has a structure extending from the upper metal layer(Fig. 5 [172]) It would have been obvious to one of ordinary skill in the art at the time the application at hand was filed to modify the device disclosed by Ko along the lines of Yu. One might have been motivated to apply Yu’s pad structure in order to improve layout flexibility and reliability of the package(See paragraph 0029 of Yu). Performing this modification would have generated a predictable result in the creation of Ko’s device with a pad structure as disclosed by Yu. Claim(s) 20 is/are rejected under 35 U.S.C. 103 as being unpatentable over Ko. Regarding Claim 20, Ko discloses an upper package(Fig. 19 [30]) on the second redistribution substrate(Fig. 19 [180]), wherein the semiconductor chip(Fig. 19 [121]) comprises an application processor(AP) chip(See paragraph 0102). Ko does not explicitly teach or disclose the upper package comprises at least one memory chip, instead stating that it may be an integrated circuit die(See paragraph 0077). However, Ko then states that an integrated circuit die may include a memory chip(See paragraph 0102). It would have been obvious to arrive at the claimed limitation based on the disclosure by Ko, because Ko describes the upper package as an integrated circuit, layer presenting that an integrated circuit may be a memory chip. One might have been motivated to produce such a package as to transport, test, or interface a memory chip with an application processor chip. Performing this modification would have generated a predictable result in the generation of an embodiment of Ko’s device. PNG media_image1.png 841 1159 media_image1.png Greyscale Above: Fig. 1 of Hwang with first and second-type pads, first and second openings, first and second pad regions, and uppermost first and second redistribution lines denoted by examiner. Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Kim et al.(US 20220165778 A1) discloses a package substrate. Kwon(US 20220068731 A1) discloses a package structure with a through post and pads. Kang et al.(US 20220013465 A1) discloses a pad structure. Any inquiry concerning this communication or earlier communications from the examiner should be directed to MARSHALL MU-NUO HATFIELD whose telephone number is (703)756-1506. The examiner can normally be reached Mon-Thus 11:00 AM-9:00PM EST. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Fernando Toledo can be reached at 571-272-1867. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /FERNANDO L TOLEDO/Supervisory Patent Examiner, Art Unit 2897 /MARSHALL MU-NUO HATFIELD/Examiner, Art Unit 2897
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Prosecution Timeline

Apr 26, 2024
Application Filed
Sep 29, 2026
Non-Final Rejection mailed — §102, §103 (current)

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Prosecution Projections

1-2
Expected OA Rounds
93%
Grant Probability
97%
With Interview (+4.4%)
3y 4m (~10m remaining)
Median Time to Grant
Low
PTA Risk
Based on 96 resolved cases by this examiner. Grant probability derived from career allowance rate.

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