Prosecution Insights
Last updated: October 04, 2026
Application No. 18/648,207

CHIP MODULE, CIRCUIT BOARD AND ELECTRONIC DEVICE

Non-Final OA §102§103§112
Filed
Apr 26, 2024
Priority
Oct 26, 2021 — CN 202111246470.2 +1 more
Examiner
MANDALA, MICHELLE
Art Unit
Tech Center
Assignee
BITMAIN TECHNOLOGIES INC.
OA Round
1 (Non-Final)
91%
Grant Probability
Favorable
1-2
OA Rounds
0m
Est. Remaining
99%
With Interview

Examiner Intelligence

Grants 91% — above average
91%
Career Allowance Rate
924 granted / 1015 resolved
+31.0% vs TC avg
Moderate +8% lift
Without
With
+7.9%
Interview Lift
resolved cases with interview
Typical timeline
2y 2m
Avg Prosecution
21 currently pending
Career history
1027
Total Applications
across all art units

Statute-Specific Performance

§101
0.8%
-39.2% vs TC avg
§103
51.5%
+11.5% vs TC avg
§102
31.6%
-8.4% vs TC avg
§112
10.1%
-29.9% vs TC avg
Black line = Tech Center average estimate • Based on career data from 1015 resolved cases

Office Action

§102 §103 §112
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Rejections - 35 USC § 112 The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention. Claims 4, 11 and 19 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. It is confusing and unclear the meaning of “回”-word. The examiner inspected the specification but no definition has been given. Claim Rejections - 35 USC § 102 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claim(s) 1, 8, 15 and 16 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Zhai et al. (CN109065504). Re claim 1, Zhai et al. (Figs. 1-3 & [0002], [0029-0035]) disclose a chip; a heat-dissipating metal sheet (metal shielding layer); a thermal conductive layer (thermal interface) located between the chip and the heat-dissipating metal sheet, wherein a thermal conductive material included in the thermal conductive layer is a phase change material or a thermal conductive paste (phase change material, thermal conductive gel, thermally conductive silicon e grease, silicone pad, thermally conductive mud). Re claim 8, Zhai et al. disclose a printed circuit board (PCB) ([0018]); a plurality of chip modules, wherein each of the chip modules comprises a chip; a heat-dissipating metal sheet (shielding layer); and a thermal conductive layer (thermal interface) located between the chip and the heat-dissipating metal sheet, wherein a thermal conductive material included in the thermal conductive layer is a phase change material or a thermal conductive paste (phase change material, thermal conductive gel, thermally conductive silicon e grease, silicone pad, thermally conductive mud); wherein, one side of each of the chip modules away from the heat-dissipating metal sheet is fixed on the PCB (Fig. 2). Re claim 15, Zhai et al. disclose wherein the circuit board further comprises: a heat sink connected with the heat-dissipating metal sheet ([0034]). Re claim 16, Zhai et al. disclose a circuit board comprising a printed circuit board (PCB) ([0018]); a plurality of chip modules, wherein each of the chip modules comprises a chip; a heat-dissipating metal sheet (shielding layer); and a thermal conductive layer (thermal interface) located between the chip and the heat-dissipating metal sheet, wherein a thermal conductive material included in the thermal conductive layer is a phase change material or a thermal conductive paste (phase change material, thermal conductive gel, thermally conductive silicon e grease, silicone pad, thermally conductive mud); wherein, one side of each of the chip modules away from the heat-dissipating metal sheet is fixed on the PCB (Fig. 2). Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim(s) 2-6, 9-13, 15 and 17-20 are rejected under 35 U.S.C. 103 as being unpatentable over Zhai et al. as applied to claims 1, 8, 15 and 16 above, and further in view of Chen (TWM615231 U). Re claim 2, 9 and 17, Zhai et al. does not clearly disclose wherein the chip module further comprises: a connection layer located in an edge area of the chip, which fixes the heat-dissipating metal sheet and the chip; the thermal conductive layer is at least located in a middle area of the chip; and wherein the edge area is located outside the middle area. Chen discloses wherein the chip module further comprises: a connection layer (19) located in an edge area of the chip (22~ electronic component), which fixes the heat-dissipating metal sheet (122) and the chip (22); the thermal conductive layer (11) is at least located in a middle area of the chip (22); and wherein the edge area is located outside the middle area (Figs. 3 & 4). It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to combine Zhai et al. and Chen to include a connection layer (19) located in an edge area of the chip in Zhai et al. as taught by Chen to secure the heat dissipating metal sheet and the chip. Re claims 3, 10 and 18, Chen discloses the connection layer (19) is: an adhesive layer including a glue (colloid containing adhesive layer), wherein the adhesive layer (122) adheres the heat-dissipating metal sheet and the chip. Re claims 4, 11 and 19, Chen discloses wherein the connection layer is in the form of a back layer (Fig. 6). Re claims 5, 12 and 20, Chen discloses wherein the glue (19) is an elastic glue (is a high temperature resistant foam belonging to the elastic colloid of the present invention). One of ordinary skill in the art would have been led to the recited thickness through routine experimentation to achieve a desired adhesive strength. In addition, the selection of thickness, it's obvious because it is a matter of determining optimum process conditions by routine experimentation with a limited number of species of result effective variables. These claims are prima facie obvious without showing that the claimed ranges achieve unexpected results relative to the prior art range. In re Woodruff, 16 USPQ2d 1935, 1937 (Fed. Cir. 1990). See also In re Huang, 40 USPQ2d 1685, 1688 (Fed. Cir. 1996)(claimed ranges or a result effective variable, which do not overlap the prior art ranges, are unpatentable unless they produce a new and unexpected result which is different in kind and not merely in degree from the results of the prior art). See also In re Boesch, 205 USPQ 215 (CCPA) (discovery of optimum value of result effective variable in known process is ordinarily within skill or art) and In re Aller, 105 USPQ 233 (CCPA 1995) (selection of optimum ranges within prior art general conditions is obvious). Note that the specification contains no disclosure of either the critical nature of the claimed thickness or any unexpected results arising therefrom. Where patentability is said to be based upon particular chosen thickness or upon another variable recited in a claim, the Applicant must show that the chosen thickness is critical. In re Woodruf, 919 F.2d 1575, 1578, 16 USPQ2d 1934, 1936 (Fed. Cir. 1990). Re claims 6 and 13, Chen discloses wherein the connection layer (19) is the adhesive layer including the glue (it’s a high temperature resistant foam~ adhesive comprising colloids) ([0018]), and the chip is a bare chip (obvious depending on practical needs for the resultant structure). Re claims 7 and 14, the presence of process limitations on product claims, which product does not otherwise patentably distinguish over prior art, cannot impart patentability to the product. In re Stephens 145 USPQ 656 (CCPA 1965). Citation of Pertinent Prior Art The following prior art made of record and not relied upon is considered pertinent to applicant's disclosure: US 2021/0029855 A1 disclose a similar configuration for a chip module including a heat dissipating metal sheet. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to MICHELLE MANDALA whose telephone number is (571)272-1858. The examiner can normally be reached 8:00-5:00 PM. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Sue Purvis can be reached at 571-272-1236. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /MICHELLE MANDALA/Primary Examiner, Art Unit 2893 August 31, 2026
Read full office action

Prosecution Timeline

Apr 26, 2024
Application Filed
Sep 02, 2026
Non-Final Rejection mailed — §102, §103, §112 (current)

Precedent Cases

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
91%
Grant Probability
99%
With Interview (+7.9%)
2y 2m (~0m remaining)
Median Time to Grant
Low
PTA Risk
Based on 1015 resolved cases by this examiner. Grant probability derived from career allowance rate.

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