Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Election/Restrictions
Applicant’s election without traverse of Group II (drawn to a method of manufacturing an IC device) in the reply filed on 8/3/2026 is acknowledged.
Information Disclosure Statement
The information disclosure statements (IDS) submitted on 4/29/2024, 5/2/2024, and 9/16/2025 are in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statements are being considered by the examiner.
Claim Objections
Claim 9 is objected to because of the following informalities: line 1 reads “The method of claim 1, the plurality of conductive interconnect structures . . .” The examiner notes that “wherein” or equivalent language was likely intended in order to render the claim dependent on claim 1. Appropriate correction is required.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 1-9 and 16 is/are rejected under 35 U.S.C. 103 as being unpatentable over Liu (US 7049246 B1) in view of Shor (US 7935627 B1).
Regarding claim 1, Liu teaches, in FIG. 3 , a method for fabricating integrated-circuit (IC) devices, comprising: providing a semiconductor wafer (“semiconductor substrate” 14) containing a plurality of IC devices (FIG. 3 shows area 54 in which “the area of semiconductor die 10 referred to by numeral 54 is used as a part of a digital circuit” the examiner notes that a digital circuit inherently processes a plurality of IC devices); and forming an interconnect structure (see FIG. 2A, wherein the trenches containing copper 32 are called “interconnect trenches” 28, 30) over the plurality of IC devices on the semiconductor wafer which comprises a plurality of conductive interconnect structures (32) formed over an first region (54) and a plurality of capacitor-terminal structures (16) are formed over a second region (58) by selectively implanting a dielectric constant-changing implant species into one or more inter-layer dielectric (ILD) layers located over the second region, but not into the one or more ILD layers located over the second region (paragraph 22 states: “As seen in FIG. 3, photoresist 16 prevents area 54 of semiconductor die 10 from being exposed to E-beams or I-beams 18. Thus, inter-layer dielectric 12 located under photoresist 16 remains unconverted and maintains a low dielectric constant since the portion of inter-layer dielectric 12 under photoresist 16 remains unexposed to E-beams 18 or I-beams 18. However, inter-layer dielectric 12 situated in the area 56 of semiconductor die 10 is not protected by photoresist 16 and is converted to a higher dielectric constant material after exposure to E-beams 18 or I-beams 18”) so that the one or more ILD layers located over the first region have a different dielectric constant than the one or more layers located over the second region. The examiner notes that the “E-beams or I-beams” are a dielectric constant-changing implant species (see paragraph 11). The examiner further notes that paragraph 14: “that there is a serious need in the art for a way to achieve high density capacitors for the analog areas of a semiconductor die while at the same time achieving a low capacitance digital area.” The examiner further notes that Liu teaches the use of a mask to selectively implant one portion of a dielectric layer with a dielectric constant-changing implant but not the other region, which could easily be performed on the first region but not the second region if a means of reducing the dielectric constant (as opposed to increasing the dielectric constant) of the dielectric area were available to achieve the same results, as is obvious to one having ordinary skill in the art.
Liu does not teach that a dielectric constant changing implant species is implanted into the first region but not the second region.
Shor teaches, in FIG. 3, a dielectric 14 which is “bombarded” (paragraph 15 states “the term "bombardment" includes any process that propels ions into a surface including ion implanting, sputtering, bombarding, or energetic deposition, as in the case of the use of an HDP deposition tool . . .”) and paragraph 18 teaches: “. . . the [bombarded] dielectric material along the periphery of the metal lines 20 may be of a desirably lower dielectric constant, . . . The remainder of the dielectric may maintain sufficient strength in the bulk of the material that was not damaged by ion bombardment . . .” The examiner notes that this teaches the utilization of an implant species to decrease the dielectric constant of a dielectric layer. Paragraph 24 also teaches (referring to FIG. 8) a method utilizing bombardment before the formation of trenches to ensure “the bulk of the dielectric layer 14 has good mechanical strength, but the region proximate to the metal lines 20 exhibits a low dielectric constant.” The examiner further notes that paragraph 5 acknowledges a link between lower dielectric constant dielectric layers and a decrease in mechanical strength.
It would have been obvious to one having ordinary skill in the art at the effective filing date to modify the method taught by Liu such that the first area is selectively implanted with a dielectric constant-changing implant species, as taught by Shor, and the second area is not (using the photoresist taught by Liu). The examiner notes that this can be achieved in two ways; by utilizing the low dielectric constant layer taught by Liu or replacing the low-dielectric layer with the high dielectric constant layer taught by Shor. One having ordinary skill in the art is motivated to utilize the dielectric constant-reducing implant species taught by Shor on the dielectric layer of the first region taught by Liu because, for example, Liu teaches the problem: “there is a serious need in the art for a way to achieve high density capacitors for the analog areas of a semiconductor die while at the same time achieving a low capacitance digital area.” (see above) and Shor teaches: “implants may be done in a way that provide the desired low dielectric constant in certain critical areas” (Shor, 11), as lower capacitances than that of the unmodified low-dielectric layer are still beneficial in reducing IC capacitance. One having ordinary skill in the art is motivated to utilize the high-dielectric constant dielectric layer of Shor in place of the low-dielectric constant layer of Liu (and subsequently implanting the first region, in the manner taught by Shor, for a lower capacitance in that region) so that, for example, “the bulk of the dielectric layer has good mechanical strength, but the region proximate to the metal lines [of the IC] exhibits a low dielectric constant” (Shor, paragraph 24). The examiner notes that the choice between these implementations depends on desired device specifications (such as a need for lower overall device capacitance, or for higher mechanical strength).
Regarding claim 2, Liu further teaches, in FIG. 1A the formation of an interconnect structure (see above, final product is labeled 32 in FIG. 3), depositing, for the level of the interconnect structure, a dielectric layer having a first dielectric constant (see paragraph 13: “the dielectric constant of the initial dielectric material is referred to as a ‘first dielectric constant’ and the dielectric constant of the ‘converted’ dielectric material is referred to as a ‘second dielectric constant.’”) over the first region and the second region, forming an implant mask (paragraph 21: “FIG. 3 shows photoresist 16 patterned over interconnect trenches 28 and 30, which are situated in the area . . . used as a part of a digital circuit. photoresist 16 does not cover capacitor trenches . . .”) which exposes the dielectric layer over the second region but not over the first region; and implanting the dielectric constant-changing implant species into the dielectric layer through the defined opening of the implant mask to form an implanted dielectric layer having a second dielectric constant value that is larger than the first dielectric constant value (see above and FIG. 3).
Liu does not teach that the implant mask exposes the dielectric layer over the first region but not over the second region.
As explained above, Shor teaches the implantation of a dielectric constant changing species into a dielectric layer to decrease its dielectric constant, and that this is desired in an area containing interconnects.
It would have been obvious to one having ordinary skill in the art at the effective filing date to modify the method It would have been obvious to one having ordinary skill in the art at the effective filing date to modify the method taught by Liu such that the first area is selectively implanted with a dielectric constant-changing implant species, as taught by Shor, and the second area is not (using the photoresist taught by Liu) by placing the photomask over the second area and exposing the first area. One having ordinary skill in the art is motivated to do so because, for example, Liu teaches in paragraph 23 that the photomask can be used to prevent the implantation of the dielectric constant changing species in one are but not another, and one having ordinary skill in the art would have easily been able to implement this concept to cover the second area but not the first, utilizing the teaching of Shor to lower the dielectric constant of the uncovered region, for the reasons taught above.
Regarding claim 3, Shor further teaches, in paragraph 12: “A dielectric layer 14 may be formed over the etch stop layer 12. The dielectric layer 14 may be silicon dioxide . . .”
It would have been obvious to one of ordinary skill in the art to further modify the device taught by Liu such that depositing the dielectric layer comprises depositing a layer of silicon dioxide to a predetermined thickness, as taught by Shor. One having ordinary skill in the art is motivated to do so because, for example, silicon dioxide has very well-known advantageous mechanical properties. See KSR Int'l Co. v. Teleflex Inc., 550 U.S. 398 (2007).
Regarding claim 4, as explained above, Liu teaches the implementation of a photomask to expose the second area and cover a first are from a dielectric constant changing implant species.
It would have been obvious to one having ordinary skill in the art at the effective filing date to modify the method taught by Liu such that forming the implant mask comprises coating, developing and exposing a photoresist (PR) layer to form a patterned PR implant mask on the dielectric layer with the defined opening that exposes the dielectric layer over the first region but not over the second region for the reasons stated above.
Regarding claim 5, Shor further teaches, in paragraph 19: “In some embodiments, in addition to carbon bombardment, the exposed dielectric surface may also be bombarded by inert species, such as argon or xenon, on an implanter or an HDP tool . . . The inert species bombardment may occur before, during, or after the carbon bombardment. However, advantageously, it occurs before or during the carbon or fluorine bombardment . . . The inert species bombardment may cause damage to the dielectric layer, reducing its dielectric constant.”
It would have been obvious to one having ordinary skill in the art at the effective filing date to further modify the method taught by Liu such that the implanting of the dielectric constant changing implant species comprising implanting at least one of argon or xenon (as taught by Shor) into the opening of the implant mask. One having ordinary skill in the art is motivated to do so because, for example, the inert species bombardment reduces the dielectric constant of the dielectric layer (see above).
Regarding claim 6, Shor further teaches, in FIG. 5, that, for the level of the interconnect, “In accordance with another embodiment, the structure shown in FIG. 1 is formed. Thereafter, a mask 22 is patterned and defined on the upper surface of the dielectric 14. For example, the mask 22 may be photoresist, designed to shield the region between two proximate trenches 16 in part, but not in whole, so that only the part of this region proximate to the trenches 16 is subjected to bombardment J, shown in FIG. 5” FIG. 8 and paragraph 24 teach the subsequent formation of components on the ILD.
It would have been obvious to one having ordinary skill in the art at the effective filing date to further modify the method taught by Liu such that the dielectric constant changing implant species are implanted into an ILD layer prior to forming elements above it, as taught by Shor. One having ordinary skill in the art is motivated to do so because, for example, in doing so “the bulk of the dielectric layer 14 has good mechanical strength, but the region proximate to the metal lines 20 exhibits a low dielectric constant” (Shor, paragraph 24).
Regarding claim 7, Liu teaches, in FIG. 1A-3, that for the level of the interconnect structure, the dielectric constant-changing implant species are implanted into an ILD layer after forming the plurality of conductive interconnect structures and the plurality of capacitor-terminal structures in the ILD layer (see FIG. 3 for the implantation step and FIG. 1A–2A for manufacturing of the plurality of the conductive interconnect structures and the plurality for the conductive capacitor-terminal structures in the ILD layer).
Regarding claim 8, as explained above, Liu and Shor teach the selective implantation of the ILD layer over the first region with a dielectric constant changing implant species while protecting the ILD layer over the second region from the dielectric constant changing implant species.
It would have been obvious to one having ordinary skill in the art at the effective filing date to modify the method taught by Liu such that the first area is selectively implanted with a dielectric constant-changing implant species, as taught by Shor, and the second area is not (using the photoresist taught by Liu). The examiner notes that this can be achieved in two ways; by utilizing the low dielectric constant layer taught by Liu or replacing the low-dielectric layer with the high dielectric constant layer taught by Sho for the reasons stated above.
Regarding claim 9, as explained above, Liu teaches that the plurality of conductive interconnect structures and the plurality of capacitor-terminal structures are formed in each of the one or more ILD layers before or after selectively implanting each of the ILD layer.
Regarding claim 16, Liu teaches a method comprising forming a plurality of integrated-circuit (IC) devices (FIG. 3 shows area 54 in which “the area of semiconductor die 10 referred to by numeral 54 is used as a part of a digital circuit” the examiner notes that a digital circuit inherently processes a plurality of IC devices) on a semiconductor substrate 14; forming a dielectric layer 12 over the semiconductor substrate to cover the plurality of IC devices (the examiner notes that the existence of the dielectric layer 12 means it must be formed and that paragraph 9 refers to “digital circuits in the semiconductor chip” meaning that the plurality of IC devices are covered by the dielectric layer); selectively implanting a capacitance-increasing implant species into a second region (56) of the dielectric layer while protecting a first region (54) of the dielectric layer from implantation by the capacitance-reducing implant species (see FIG. 3, paragraph 15 states “the term "bombardment" includes any process that propels ions into a surface including ion implanting, sputtering, bombarding, or energetic deposition, as in the case of the use of an HDP deposition tool . . .” and paragraph 18 teaches: “. . . the [bombarded] dielectric material along the periphery of the metal lines 20 may be of a desirably lower dielectric constant, . . . The remainder of the dielectric may maintain sufficient strength in the bulk of the material that was not damaged by ion bombardment . . .” also note photomask 16 for protection), thereby forming the first region of the dielectric layer with a first dielectric constant value and the second region of the dielectric layer with a second dielectric constant value that is larger than the first dielectric constant value; and forming one or more conductive structures (copper structures 32) in the first and second regions of the dielectric layer. The examiner further notes that paragraph 5 acknowledges a link between lower dielectric constant dielectric layers and a decrease in mechanical strength.
Liu does not teach selectively implanting a capacitance-reducing implant species into a first region of the dielectric layer while protecting a second region of the dielectric layer.
Shor teaches, in FIG. 3, a dielectric 14 which is “bombarded” (paragraph 15 states “the term "bombardment" includes any process that propels ions into a surface including ion implanting, sputtering, bombarding, or energetic deposition, as in the case of the use of an HDP deposition tool . . .”) and paragraph 18 teaches: “. . . the [bombarded] dielectric material along the periphery of the metal lines 20 may be of a desirably lower dielectric constant, . . . The remainder of the dielectric may maintain sufficient strength in the bulk of the material that was not damaged by ion bombardment . . .”
It would have been obvious to one having ordinary skill in the art at the effective filing date to modify the method taught by Liu such that the selective implanting step utilizes a capacitance-reducing implant species, as taught by Shor, to be utilized in the first region while protecting the second region. The examiner notes that this can be achieved in two ways; by utilizing the low dielectric constant layer taught by Liu or replacing the low-dielectric layer with the high dielectric constant layer taught by Shor. One having ordinary skill in the art is motivated to utilize the dielectric constant-reducing implant species taught by Shor on the dielectric layer of the first region taught by Liu because, for example, Liu teaches the problem: “there is a serious need in the art for a way to achieve high density capacitors for the analog areas of a semiconductor die while at the same time achieving a low capacitance digital area.” (Liu, paragraph 14) and Shor teaches: “implants may be done in a way that provide the desired low dielectric constant in certain critical areas” (Shor, 11), as lower capacitances than that of the unmodified low-dielectric layer are still beneficial in reducing IC capacitance. One having ordinary skill in the art is motivated to utilize the high-dielectric constant dielectric layer of Shor in place of the low-dielectric constant layer of Liu (and subsequently implanting the first region, in the manner taught by Shor, for a lower capacitance in that region) so that, for example, “the bulk of the dielectric layer has good mechanical strength, but the region proximate to the metal lines [of the IC] exhibits a low dielectric constant” (Shor, paragraph 24). The examiner notes that the choice between these implementations depends on desired device specifications (such as a need for lower overall device capacitance, or for higher mechanical strength).
Claim(s) 17-20 is/are rejected under 35 U.S.C. 103 as being unpatentable over Liu (US 7049246 B1) in view of Shor (US 7935627 B1) in further view of Yang (US 20100096726 A1).
Regarding claim 17, Liu further teaches, in FIG. 1A, that the dielectric layer is formed over the first region and the second region with a first dielectric constant (see paragraph 13: “the dielectric constant of the initial dielectric material is referred to as a ‘first dielectric constant’ and the dielectric constant of the ‘converted’ dielectric material is referred to as a ‘second dielectric constant’”), and that selectively implanting the capacitance-increasing implant species comprises: forming, for the level the interconnect structure, an implant mask (16 see FIG. 3) on the dielectric layer with a defined opening which exposes the dielectric layer over the second region 56 but not over the first region 54, and implanting the capacitance-increasing implant species into the dielectric layer through the defined opening of the implant mask to form an implanted dielectric layer having a second dielectric constant value that is smaller than the first dielectric constant value (see above, in addition, noted paragraph 22 states that “E beams or I beams” are used to bombard the second region to decrease its dielectric constant).
Liu does not teach a multi-level interconnect structure or that the first region is exposed while the second region is covered to apply a dielectric constant reducing implant species.
Shor teaches, as explained above, the utilization of a dielectric constant reducing species to reduce the dielectric constant of a dielectric layer.
Shor does not teach a multi-level structure.
Yang teaches, in [0021], “a treatment 60 is performed to make the dielectric constant of the dielectric layer 10 in the second region 30 higher than the dielectric constant of the dielectric layer 10 in the first region 20” and in [0022]: “The treatment 60 may . . . an ion implantation.” Further, FIG. 5 shows a multilevel structure: “As shown in FIG. 5, the metal interconnection 22 and the metal capacitor 34 are formed in the n.sup.th, (n+1).sup.th . . . (n+m).sup.th layer. After that, a mask such as a photomask 50 is formed on the (n+m).sup.th layer. Then, the treatment 60 is performed.” The examiner notes that this teaches the treatment of a dielectric layer with a dielectric constant changing implant species for each level of a multi-level interconnect structure (also note interconnects 22 and capacitor electrodes 32 in FIG. 5).
It would have been obvious to one having ordinary skill in the art at the effective filing date to further modify the method taught by Liu such that the dielectric constant changing implant species is implanted on each level of a multi-level interconnect structure, as taught by Yang. One having ordinary skill in the art is motivated to do so because, for example, a multi-level interconnect structure enables more components to be formed (by increasing the volume available for components), increasing computational power, digital storage volume, and/or total capacitance.
Regarding claim 18, Shor further teaches, in paragraph 12: “A dielectric layer 14 may be formed over the etch stop layer 12. The dielectric layer 14 may be silicon dioxide . . .”
It would have been obvious to one of ordinary skill in the art to further modify the device taught by Liu such that depositing the dielectric layer comprises depositing a layer of silicon dioxide to a predetermined thickness, as taught by Shor. One having ordinary skill in the art is motivated to do so because, for example, silicon dioxide has very well-known advantageous mechanical properties. See KSR Int'l Co. v. Teleflex Inc., 550 U.S. 398 (2007).
Regarding claim 19, Shor further teaches, in paragraph 19: “In some embodiments, in addition to carbon bombardment, the exposed dielectric surface may also be bombarded by inert species, such as argon or xenon, on an implanter or an HDP tool . . . The inert species bombardment may occur before, during, or after the carbon bombardment. However, advantageously, it occurs before or during the carbon or fluorine bombardment . . . The inert species bombardment may cause damage to the dielectric layer, reducing its dielectric constant.”
It would have been obvious to one having ordinary skill in the art at the effective filing date to further modify the method taught by Liu such that the implanting of the dielectric constant changing implant species comprising implanting at least one of argon or xenon (as taught by Shor) into the opening of the implant mask. One having ordinary skill in the art is motivated to do so because, for example, the inert species bombardment reduces the dielectric constant of the dielectric layer (see above).
Regarding claim 20, Liu further teaches, in FIGs. 1A-2A, that the forming one or more conductive structures comprises forming a plurality of conductive interconnect structures in the first region of the dielectric layer (copper 32 formed in interconnect trenches 28 and 30) and a plurality of capacitor-terminal structures (16, 18, 20 , 22, 24, 26) in the second region of the dielectric layer (note that FIG. 3 shows the first area 54 and second area 56 explicitly).
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure:
Grill (US 6437443 B1) – Low K SiCOH dielectric with “nano-voids” which decrease the dielectric constant.
Gore (US 6391932 B1) – Porous polyimide dielectric constants achieved via thermal treatment.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to GABRIEL S MINNEY whose telephone number is (571)272-9688. The examiner can normally be reached Monday Friday, 8:30 a.m. 5 p.m. ET..
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Jacob Choi can be reached at (469) 295-9060. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/G.S.M./Examiner, Art Unit 2897
/JACOB Y CHOI/Supervisory Patent Examiner, Art Unit 2897
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