DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Information Disclosure Statement
The information disclosure statement (IDS) submitted on 05/29/2024 was filed before the first action on the merits. The submission is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claim(s) 13 and 14 are rejected under 35 U.S.C. 102(a)(2) as being anticipated by Yang et al. (2024/0274710).
Re claim 13, Yang teaches a vertical field-effect transistor structure (Fig. 4), comprising: a semiconductor body (19, 10, 11, 13) having a first terminal zone (19), a drift zone (11), and a second terminal zone (13) of a first conductivity type (N); a channel zone (12, [41]), arranged between the first (19) and the second terminal zone (13), the channel zone (12, [41]) being of the first conductivity type or of a second conductivity type (P, [43]) complementary to the first conductivity type (N, [41]); a plurality of first trenches ([41-43], Fig. 4) extending into the semiconductor body, the first trenches extend from the second terminal zone (13) into the drift zone (11) and form fins of the channel zone and of the second terminal zone [41-43]; a control electrode (14) arranged in the first trenches [41], the control electrode (14) being arranged adjacent to the channel zone (12) and insulated (15, 16, 17) from the semiconductor body (19, 10, 11, 13); and a first current path connected between the first (19) and the second (13) terminal zone and in parallel with the channel zone (12), which first current path has at least one Schottky junction [53] and is configured to conduct when a reverse voltage between the first and the second terminal zone is reached [52-54], wherein the Schottky junction is arranged in the drift zone (11) and is formed between a highly conductive region (20) buried in the drift zone and the drift zone, wherein the highly conductive region (20) is electrically connected to the second terminal zone (13); and a second current path [48, 53] connected between the first (19) and the second terminal zone (13) and in parallel with the channel zone (12), wherein the second current path has at least one pn junction (20, 11, [48]) and is configured to conduct when a reverse voltage between the first (19) and the second (13) terminal zone is reached [48, 53]; wherein the pn junction (20, 11) is arranged in the drift zone (11) and is formed between a region of the second conductivity type (P) arranged in the drift zone (11) and the drift zone, wherein the region of the second conductivity type (P) is electrically connected to the second terminal zone (13).
Re claim 14, Yang teaches the vertical field-effect transistor structure according to claim 13, wherein a specific terminal contact (22) is provided on the highly conductive region (20) and the region of the second conductivity type (P), and a contact metallization extends into the first trenches, which electrically connects the specific terminal contact and the second terminal zone (13).
Claim(s) 18-19 and 23 are rejected under 35 U.S.C. 102(a)(2) as being anticipated by Yang et al. (2024/0274710).
Re claim 18, Yang teaches a method for producing a vertical field-effect transistor structure (Figs. 8a-k), comprising the following steps: providing semiconductor body (19, 10, 11, 13) having a first terminal zone (19), a drift zone (11), and a second terminal zone (13) of a first conductivity type (N) forming a channel zone (12, [41]), arranged between the first (19) and the second terminal zone (13), the channel zone (12, [41]) being of the first conductivity type or of a second conductivity type (P, [43]) complementary to the first conductivity type (N, [41]); forming plurality of first trenches ([41-43], Fig. 4) extending into the semiconductor body, the first trenches extend from the second terminal zone (13) into the drift zone (11) and form fins of the channel zone and of the second terminal zone [41-43]; a control electrode (14) arranged in the first trenches [41], the control electrode (14) being arranged adjacent to the channel zone (12) and insulated (15, 16, 17) from the semiconductor body (19, 10, 11, 13); and forming a first current path connected between the first (19) and the second (13) terminal zone and in parallel with the channel zone (12), which first current path has at least one Schottky junction [53] and is configured to conduct when a reverse voltage between the first and the second terminal zone is reached [52-54], wherein the Schottky junction is arranged in the drift zone (11) and is formed between a highly conductive region (20) buried in the drift zone and the drift zone, wherein the highly conductive region (20) is electrically connected to the second terminal zone (13); and forming a second current path [48, 53] connected between the first (19) and the second terminal zone (13) and in parallel with the channel zone (12), wherein the second current path has at least one pn junction (20, 11, [48]) and is configured to conduct when a reverse voltage between the first (19) and the second (13) terminal zone is reached [48, 53]; wherein the pn junction (20, 11) is arranged in the drift zone (11) and is formed between a region of the second conductivity type (P) arranged in the drift zone (11) and the drift zone, wherein the region of the second conductivity type (P) is electrically connected to the second terminal zone (13). Re claim 19, Yang teaches the method for producing a vertical field-effect transistor structure according to claim 18, wherein a specific terminal (22) contact is provided on the highly conductive region (20) and the region of the second conductivity type (P), and a contact metallization is formed which extends into the first trenches and electrically connects the specific terminal contact and the second terminal zone (13).
Re claim 23, Yang teaches the method for producing a vertical field-effect transistor structure according to claim 18, wherein the highly conductive region (20) is formed such that second trenches (Fig. 8c), which are filled with the highly conductive region (20), are formed in the drift region (11).
Allowable Subject Matter
Claims 15-17, 20-22 and 24 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Re claim 15, Yang teaches the vertical field-effect transistor structure according to claim 13, yet remains explicitly silent to wherein a superjunction region of the second conductivity type is arranged in the drift zone between the highly conductive region and the first terminal zone, wherein the superjunction region electrically connects the highly conductive region to the first terminal zone.
Re claim 16, Yang teaches the vertical field-effect transistor structure according to claim 13, yet remains explicitly silent to wherein a second superjunction region of the second conductivity type is arranged in the drift zone between the region of the second conductivity type and the first terminal zone, the second superjunction region electrically connects the region of the second conduction type to the first terminal zone.
Re claim 17, Yang teaches the vertical field-effect transistor structure according to claim 13, wherein the drift region (11) is formed of silicon carbide [43].
Yang does not explicitly teach wherein the highly conductive region is formed of polysilicon.
Re claim 20, Yang teaches the method for producing a vertical field-effect transistor structure according to claim 18, yet remains explicitly silent to wherein a first superjunction region of the second conductivity type is arranged in the drift zone between the highly conductive region and the first terminal zone, the first superjunction region electrically connecting the highly conductive region to the first terminal zone.
Re claim 21, Yang teaches the method for producing a vertical field-effect transistor structure according to claim 18, yet remains explicitly silent to wherein a second superjunction region of the second conductivity type is arranged in the drift zone between the region of the second conductivity type and the first terminal zone, which second superjunction region electrically connects the region of the second conduction type to the first terminal zone.
Re claim 22, Yang teaches the method for producing a vertical field-effect transistor structure according to claim 18, wherein the drift region (11) is formed of silicon carbide [43].
Yang does not explicitly teach wherein the highly conductive region is formed of polysilicon.
and the highly conductive region is formed of polysilicon.
Re claim 24, Yang teaches the method for producing a vertical field-effect transistor structure according to claim 23, yet remains explicitly silent to wherein a first superjunction region of the second conductivity type is arranged in the drift zone between the highly conductive region and the first terminal zone, the first superjunction region electrically connecting the highly conductive region to the first terminal zone, wherein a second superjunction region of the second conductivity type is arranged in the drift zone between the region of the second conductivity type and the first terminal zone, which second superjunction region electrically connects the region of the second conduction type to the first terminal zone, and wherein the first and/or second superjunction region of the second conductivity type is formed before the filling of the second trenches by an implantation step directed into the second trenches.
Conclusion
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/FERNANDO L TOLEDO/Supervisory Patent Examiner, Art Unit 2897
/ADAM S BOWEN/Examiner, Art Unit 2897
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