DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
1. Claims 1-12 are elected and present for examination.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
2. Claims 2 & 8 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claim 2, line 2, for purpose of clarity the “different states” should be revised to read as “different stored states’ to be consistent with claim 1.
Claim 8, line 2, “a maximum state” should also be revised to read as “a maximum stored state” for sake of language clarity.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
3. Claims 1-6 are rejected under 35 U.S.C. 102(a)(2) as being anticipated by Chan et al (US 5,872,731).
Regarding independent claim 1, Chan et al (see Fig. 1) discloses a multi-state memory cell (2) comprising of at least one or more Josephson junction/devices (10 & 12) as claimed “superconducting devices “and also one or more inductive devices (magnetic/L coils 6, 8 , 18 & 20) as claimed “inductive devices”, such storage loop is also configured to maintain a quantized magnetic field representing a stored state (or stored value) for the multistate memory cell, and the stored states could be from among a set of three or more distinct digital states (i.e., 0, 1 , 2, etc.).
For example, col. 1 (lines 56-67) stated that “.. the present invention provides a multi-state Josephson memory that capable of storing multiple memory states in a single SQUID memory cell with current from a Josephson junction device, etc.”, and by the Wiki definition (from Google Web/AI) below, “ a Josephson junction is used as a circuit element in a superconducting loops, and circuits with Josephson junctions are used to make superconducting devices such as QUIDS, etc.” see Fig. 2 and below excerpts:
[AltContent: textbox (Each SQUID/memory cell can store up to 8 distinct/logic states (0 to 7), each state jumps between 2 values)][AltContent: arrow][AltContent: arrow]
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Claim 2, Chan (Fig. 4) shows at least three address lines (or rows 76, 78 & 80( are applied with different currents to force the magnetic fields in each storage loops of each row and columns to be detected and quantized by a “quantum counters“ 112 & 114 so as to represent the output bits plurality for different storage states.
Claim 3, each Josephson junction is a superconducting device as already shown above.
Claim 4, Fig. 4 also shows each SQIUD cell has its respective Josephson junction is connected to each selected row with a parallel resistor (102).
[AltContent: arrow][AltContent: arrow][AltContent: arrow][AltContent: textbox (Plural storage loops
each loop = 1 cell)][AltContent: arrow][AltContent: arrow][AltContent: arrow][AltContent: arrow][AltContent: arrow][AltContent: textbox (3 row/address lines)]
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[AltContent: textbox (Quantum counters 112 & 114 output the total quantized magnetic field (sum by each row/column), and accessed by 3 different address lines 76, 76 & 80))]
Claims 5-6, Fig. 4 the quantum counters (112 & 114) store its data bits in a non-destructive read out bits, and its read out loop is inductively coupled to the storage loops from each row with the current Icon.
4. Claims 7 & 9-12 contain allowable subjected matter over the prior arts of record for reciting other novel/detail limitations which are not clearly suggested by the existing prior arts nor seen elsewhere at this time. For example, the independent claim 7 recites usage of a “reset pulse to reset the stored state and a circuitry to increment the stored state using the “increment pulses”, etc.
5. Any inquiry concerning this communication or earlier communications from the examiner should be directed to VIET Q NGUYEN whose telephone number is (571)272-1788. The examiner can normally be reached M-F 7:30-3PM EST.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Amir Zarabian can be reached at 571-272-1852. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/VIET Q NGUYEN/Primary Examiner, Art Unit 2827
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