Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Election/Restrictions
Election was made without traverse in the reply filed on 8/19/2026. Applicant has elected Group II, corresponding to claims 1-8 and 16-20. Invention group I, corresponding to claims 9-15, is withdrawn from further consideration.
Specification
The specification submitted 4/29/2024 has been accepted by the examiner.
Drawings
The drawings submitted on 4/29/2024 have been accepted by the examiner.
Information Disclosure Statement
The information disclosure statements (IDS) submitted up to this point have been considered by the examiner.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claims 1-2, 4-8, and 16-20 are rejected under 35 U.S.C. 102(a)(1)/(a)(2) as being anticipated by Jao-677 (US # 20220359677).
Regarding Claim 1, Jao-667 teaches a semiconductor structure (Figs. 1, [0011]) comprising:
a dielectric contact cut (150) between a first source/drain (S/D) contact (120S) of a first transistor (GAA device of fin 322 in Fig. 1E) and a second S/D contact (120S) of a second transistor (device of fin 323); and
a dielectric gate cap (295) on top of a gate structure (200C), the first transistor and the second transistor sharing the gate structure ([0034] describes the sharing),
wherein a top surface of the dielectric contact cut is substantially coplanar with a top surface of the dielectric gate cap (see Fig. 1B).
Regarding Claim 2, Jao-677 teaches the semiconductor structure of claim 1, further comprising a gate contact (184, see Fig. 1B) that is in contact with the gate structure shared by the first and the second transistor, wherein a lower portion of the gate contact is separated from the dielectric contact cut by a gate spacer (41).
Regarding Claim 4, Jao-677 teaches the semiconductor structure of claim 2, wherein the gate contact (184) is positioned in an extension of the dielectric contact cut (150; see Fig. 1A, 184 overlaps the feature 150 in the X direction), the extension being in a direction along a length of the gate structure shared by the first and the second transistor (X direction).
Regarding Claim 5, Jao-677 teaches the semiconductor structure of claim 2, wherein a top surface of the gate contact (184) is above the top surface of the dielectric contact cut (150; see Fig. 1B).
Regarding Claim 6, Jao-677 teaches the semiconductor structure of claim 1, wherein the top surface of the dielectric contact cut (150) is substantially coplanar with top surfaces of the first and the second S/D contact (120S) of the first and the second transistor (see Fig. 1E).
Regarding Claim 7, Jao-677 teaches the semiconductor structure of claim 1, wherein the dielectric contact cut (150) is horizontally between a first S/D region (82) underneath the first S/D contact of the first transistor (corresponds to fin 322) and a second S/D region (82) underneath the second S/D contact of the second transistor (corresponds to fin 323; see Fig. 1E).
Regarding Claim 8, Jao-677 teaches the semiconductor structure of claim 1, wherein the dielectric contact cut (150) has a depth that is below a top surface of a first S/D region (82) of the first transistor and below a top surface of a second S/D region of the second transistor (the bottommost surface of 150 is below the topmost surface of 82; see Fig. 1E).
Regarding Claim 16, Jao-677 teaches a semiconductor structure comprising:
a dielectric contact cut (150) between a first source/drain (S/D) contact (120S) of a first transistor (see fin 322) and a second S/D contact (120S) of a second transistor (fin 323);
a gate structure (200C; see Fig. 1B and [0034]) shared by the first and the second transistor; and
a gate cap (295) on top of the gate structure,
wherein a top surface of the dielectric contact cut (150) is substantially coplanar with a top surface of the gate cap (295; shown in Fig, 1B) and substantially coplanar with top surfaces of the first S/D contact and the second S/D contact (see Fig. 1E).
Regarding Claim 17, Jao-677 teaches the semiconductor structure of claim 16, further comprising a gate contact (184) in contact with the gate structure shared by the first and the second transistor ([0033]), wherein the gate structure includes a first gate of the first transistor and a second gate of the second transistor (200C wraps around fins 322 and 323), and wherein the gate contact is insulated from the dielectric contact cut by a gate spacer (41).
Regarding Claim 18, Jao-677 teaches the semiconductor structure of claim 17, wherein the gate contact (184) is formed in a position at an extension of the dielectric contact cut (150; see Fig. 1A, 184 overlaps the feature 150 in the X direction), the extension being in a direction along a length of the gate structure shared by the first and the second transistor (X direction).
Regarding Claim 19-20, these are rejected for essentially the same reasons as claims 5 and 8 above.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claim 3 is rejected under 35 U.S.C. 103 as being unpatentable over Jao-677 (US # 20220359677).
Regarding Claim 3, Jao-677 teaches the semiconductor structure of claim 2, further comprising a first via (source/drain via 183; [0033]; FIG. 1B) in contact with
Although Jao-677 discloses much of the claimed invention, it does not explicitly teach a first via "in contact with the first S/D contact" and a second via "in contact with the second S/D contact". More specifically, Jao-677 draws its source/drain vias 183 landing on the source/drain contacts 120M ([0033]; FIG. 1B) and does not draw a via landing on either of the two source/drain contacts 120S that the source/drain contact isolation structure 150 separates. Jao-677 is not silent as to connecting those contacts, however: it teaches that the contacts 120M and 120S are alike formed over the source/drain regions 82 and are "collectively referred to as 'source drain contacts 120'" ([0027]), and that "an interconnect structure may then be formed over the source/drain contacts 120 and the gate contacts 184," that structure including "conductive traces and conductive vias, which form electrical connection between devices on the substrate 110" ([0084]). The difference is therefore one of what Jao-677 illustrates, not of what it contemplates.
A person having ordinary skill in the art before the effective filing date of the claimed invention would have landed a source/drain via 183 on each of the two source/drain contacts 120S flanking the isolation structure 150, in the manner Jao-677 shows for the source/drain contacts 120M in FIG. 1B. The rationale is Jao-677's own: the isolation structure 150 "completely electrically isolates the source drain contact 120S on a first side of the source/drain contact isolation structure 150 from the source drain contact 120S on a second opposite side of the source/drain contact isolation structure 150" ([0029]), so each isolated contact 120S reaches the interconnect structure that Jao-677 forms "over the source/drain contacts 120" only through a via of the kind Jao-677 already provides ([0033], [0084]). Placing that via in the dielectric layer 181 that already holds the gate via 184 and the vias 183 yields the recited coplanar top surfaces, as FIG. 1B shows for the vias 183 and 184 already present ([0033]).
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to CHRISTOPHER A JOHNSON whose telephone number is (571)272-9475. The examiner can normally be reached normally working Monday to Friday between 9 am and 6 pm Eastern Time.
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/CHRISTOPHER A JOHNSON/ Primary Examiner, Art Unit 2899
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