DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Specification
1. The specification is objected because of the following reasons:
The title of the invention is not descriptive. A new title is required that is clearly indicative of the invention to which the claims are directed.
In par. [0001]: insert US Patent no. 11,984,446.
Appropriate correction is required.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
2. Claims 1-8 are rejected under 35 U.S.C. 103 as being unpatentable over Rhie (US 2016/0155744) in view of Lin et al. (US 2013/0283913).
Re claim 1, Rhie teaches, under BRI, Figs. 1, 6, 10 & 11, [0014, 0016, 0022, 0025, 0029], a semiconductor device comprising:
-a first capacitor (102) located at a first height from one surface (of 100); and
-a second capacitor (103) spaced apart (e.g., by 126, 136) from the first capacitor (102) and located at a second height from the one surface (of 100), the second height being different from the first height (e.g., 103 located higher than 102),
wherein each of the first and second capacitors (102, 103) includes a lower electrode (132A, 134B in capacitor 102; 142A in capacitor 103), an upper electrode (125 in capacitor 102; 146A in capacitor 103) and a dielectric layer (130A in capacitor 102; 144A in capacitor 103) between the lower electrode and the upper electrode.
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Rhie does not explicitly teach
wherein a selected one of the lower and upper electrodes includes:
a first portion having a cylindrical shape including a closed lower surface and an opened upper surface; and
a second portion vertically extended from the first portion of the selected one,
wherein a selected another one of the lower and upper electrodes includes:
a first portion having a bar shape extended into the first portion of the selected one;
a second portion vertically extended from the first portion of the selected another one; and
a third portion having a disc shape between the first portion and the second portion in the selected another one.
Lin teaches, under BRI, portion of Fig. 1, [0023],
wherein a selected one of the lower and upper electrodes (lower portion) includes:
a first portion (34, 36) having a cylindrical shape including a closed lower surface and an opened upper surface (defined by 34, 36); and
a second portion (78) vertically extended from the first portion of the selected one,
wherein a selected another one of the lower and upper electrodes (upper portion) includes:
a first portion (32) having a bar shape extended into the first portion (34, 36) of the selected one;
a second portion (78) vertically extended from the first portion (32) of the selected another one; and
a third portion (flat portion extends from 78) having a disc shape between the first portion and the second portion in the selected another one (in vertical direction).
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As taught by Lin, one of ordinary skill in the art would utilize & modify the above teaching into Rhie to obtain first/second portions of a selected one and first/second/third portions of selected another one as claimed, because it aids in reducing sizes in the formed device, and achieving high integrated structure. Further, a change in shape is generally recognized as being within the level of ordinary skill in the art. In re Dailey, 357 F.2d 669, 149 USPQ 47 (CCPA 1966) & it has been held that that rearranging part of an invention involves only routine skill in the art. In re Japikse, 86 USPQ 70.
Thus, it would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to employ the teaching as taught by Lin in combination Rhie due to above reason.
Re claim 2, in combination cited above, Lin teaches, Fig. 1, [0018], wherein the dielectric layer (one or more dielectric layers) is disposed between the first portion (34, 36) of the selected one and the first portion (32) of the selected another one, and between the first portion (34, 36) of the selected one and the third portion (portion extends from 78) of the selected another one.
Re claim 3, Rhie teaches, Fig. 1, wherein the first portion (32) of the selected another one (upper portion) includes a first width, the second portion (78) of the selected another one includes a second width larger than the first width (of 32), and the third portion (extends from 78) of the selected another one includes a third width lager than the second width (of 78).
Re claim 4, Rhie teaches, Fig. 11, wherein a shape of the second capacitor (203) is substantially same with a shape of the first capacitor (202).
Re claim 5, in combination cited above, Lin teaches, Fig. 1, [0018], wherein the first dielectric layer (based on one or more dielectric layers) is disposed between the first portion (34) of the second lower electrode and the first (32) and third portions (extends from 78) of the second upper electrode. (See also Rhie’s Fig. 1, dielectric layer 130B, in x-axis).
Re claim 6, Rhie teaches, Fig. 1, wherein the first lower electrode (132B, 134B) and the second lower electrode (142B) are partially overlapped with each other in a planar view.
Re claim 7, Rhie teaches, Fig. 11, [0029], a third capacitor spaced (204) apart from the first capacitor (202) and the second capacitor (203), the third capacitor (203) including a third lower electrode (242B), a third upper electrode (246B) and a third dielectric layer (244B) disposed between the third lower electrode and the third upper electrode at a third height from the one surface, and the third height is different from the first and second heights (204 located higher than 202, 203).
Re claim 8, Rhie teaches, Fig. 11, wherein the first lower electrode (234B), the second lower electrode (240B) and the third lower electrode (242B) are partially overlapped with each other in a planar view.
3. Claim 10 is rejected under 35 U.S.C. 103 as being unpatentable over Rhie (US 2016/0155744) in view of Lin et al. (US 2013/0283913) and Miyazawa (US 2003/0183884).
Re claim 10, Rhie teaches, under BRI, Fig. 11, [0014, 0016, 0022, 0025-0029], a semiconductor device comprising:
-a first capacitor (202) located at a first height from one surface (of 200); and
-a second capacitor (203) located at a second height from the one surface (of 200) to be insulated (via 226, 235) from the first capacitor (202), the second height being different from the first height (e.g., 203 located higher than 202),
wherein a shape of the first capacitor (202) is substantially same with a shape of the second capacitor (203),
wherein each of the first and second capacitors includes a lower electrode (232B, 234B or 239B, 240B), an upper electrode (235 or 236), and a dielectric layer (230B or 238B) between the lower electrode (232B, 234B or 239B, 240B) and the upper electrode (235 or 236).
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Rhie does not explicitly teach wherein a selected one of the lower and the upper electrodes includes a cylinder including a closed surface and an opened surface, and a first bar connected to the closed surface of the cylinder, and
wherein a selected another one of the lower and upper electrodes includes a second bar inserted into the opened surface of the cylinder of the selected one.
Lin teaches, Fig. 1, [0023], wherein a selected one of the lower and the upper electrodes (lower portion) includes a cylinder (formed by 34, 36) including a closed surface and an opened surface, and a first bar (78) connected to the closed surface of the cylinder, and
wherein a selected another one of the lower and upper electrodes (upper portion) includes a second bar (32) inserted into the opened surface of the cylinder (formed by 34, 36) of the selected one.
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As taught by Lin, one of ordinary skill in the art would utilize & modify the above teaching into Rhie to obtain a selected one of the lower and the upper electrodes includes a cylinder including a closed surface and an opened surface, and a first bar connected to the closed surface of the cylinder, and a selected another one of the lower and upper electrodes includes a second bar inserted into the opened surface of the cylinder of the selected one as claimed, because it aids in reducing sizes in the formed device, and achieving high integrated structure. Further, a change in shape is generally recognized as being within the level of ordinary skill in the art. In re Dailey, 357 F.2d 669, 149 USPQ 47 (CCPA 1966) & it has been held that that rearranging part of an invention involves only routine skill in the art. In re Japikse, 86 USPQ 70.
Thus, it would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to employ the teaching as taught by Lin in combination Rhie due to above reason.
Rhie/Lin does not explicitly teach wherein at least one of the first and second bars includes a variable width.
Miyazawa teaches “the first and second electrode portions including electrode fingers that have at least one of different widths” [0016].
As taught by Miyazawa, one of ordinary skill in the art would utilize & modify the above teaching to obtain at least one of the first and second bars includes a variable width as claimed, because it aids in achieving interdigital capacitor having reduced capacitance. Further, a change in size is generally recognized as being within the level of ordinary skill in the art. In re Rose, 105 USPQ 237 (CCPA 1955).
Thus, it would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to employ the teaching as taught by Miyazawa in combination Rhie/Lin due to above reason.
4. Claim 1 is, in alternative consideration, rejected under 35 U.S.C. 103 as being unpatentable over Rhie (US 2016/0155744) in view of Lin et al. (US 2013/0283913) and Tatekawa (US 2012/0217615).
Re claim 1, Rhie teaches, under BRI, Figs. 1, 6, 10 & 11, [0014, 0016, 0022, 0025, 0029], a semiconductor device comprising:
-a first capacitor (102) located at a first height from one surface (of 100); and
-a second capacitor (103) spaced apart (e.g., by 126, 136) from the first capacitor (102) and located at a second height from the one surface (of 100), the second height being different from the first height (e.g., 103 located higher than 102),
wherein each of the first and second capacitors (102, 103) includes a lower electrode (132A, 134B in capacitor 102; 142A in capacitor 103), an upper electrode (125 in capacitor 102; 146A in capacitor 103) and a dielectric layer (130A in capacitor 102; 144A in capacitor 103) between the lower electrode and the upper electrode.
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Rhie does not explicitly teach
wherein a selected one of the lower and upper electrodes includes:
a first portion having a cylindrical shape including a closed lower surface and an opened upper surface; and
a second portion vertically extended from the first portion of the selected one,
wherein a selected another one of the lower and upper electrodes includes:
a first portion having a bar shape extended into the first portion of the selected one;
a second portion vertically extended from the first portion of the selected another one; and
a third portion between the first portion and the second portion in the selected another one.
Lin teaches, under BRI, portion of Fig. 1, [0023],
wherein a selected one of the lower and upper electrodes (lower portion) includes:
a first portion (34, 36) having a cylindrical shape including a closed lower surface and an opened upper surface (defined by 34, 36); and
a second portion (78) vertically extended from the first portion of the selected one,
wherein a selected another one of the lower and upper electrodes (upper portion) includes:
a first portion (32) having a bar shape extended into the first portion (34, 36) of the selected one;
a second portion (78) vertically extended from the first portion (32) of the selected another one; and
a third portion (flat portion extends from 78) between the first portion and the second portion in the selected another one (in vertical direction).
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As taught by Lin, one of ordinary skill in the art would utilize & modify the above teaching into Rhie to obtain first/second portions of a selected one and first/second/third portions of selected another one as claimed, because it aids in reducing sizes in the formed device, and achieving high integrated structure. Further, a change in shape is generally recognized as being within the level of ordinary skill in the art. In re Dailey, 357 F.2d 669, 149 USPQ 47 (CCPA 1966) & it has been held that that rearranging part of an invention involves only routine skill in the art. In re Japikse, 86 USPQ 70.
Thus, it would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to employ the teaching as taught by Lin in combination Rhie due to above reason.
Rhie/Lin does not explicitly teach the third portion having a disc shape.
Tatekawa teaches “the semiconductor ceramic capacitor has a substantially thin-plate shape, such as a substantially disc shape” [0050].
As taught by Tatekawa, one of ordinary skill in the art would utilize & modify the above teaching to obtain the third portion having a disc shape as claimed, because a change in shape is generally recognized as being within the level of ordinary skill in the art. In re Dailey, 357 F.2d 669, 149 USPQ 47 (CCPA 1966).
Thus, it would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to employ the teaching as taught by Tatekawa in combination Rhei/Lin due to above reason.
Double Patenting
5. The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969).
A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP § 2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b).
The filing of a terminal disclaimer by itself is not a complete reply to a nonstatutory double patenting (NSDP) rejection. A complete reply requires that the terminal disclaimer be accompanied by a reply requesting reconsideration of the prior Office action. Even where the NSDP rejection is provisional the reply must be complete. See MPEP § 804, subsection I.B.1. For a reply to a non-final Office action, see 37 CFR 1.111(a). For a reply to final Office action, see 37 CFR 1.113(c). A request for reconsideration while not provided for in 37 CFR 1.113(c) may be filed after final for consideration. See MPEP §§ 706.07(e) and 714.13.
The USPTO Internet website contains terminal disclaimer forms which may be used. Please visit www.uspto.gov/patent/patents-forms. The actual filing date of the application in which the form is filed determines what form (e.g., PTO/SB/25, PTO/SB/26, PTO/AIA /25, or PTO/AIA /26) should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about eTerminal Disclaimers, refer to www.uspto.gov/patents/apply/applying-online/eterminal-disclaimer.
Claims 1-10 are provisionally rejected on the ground of nonstatutory double patenting as being unpatentable over claims 1-10 of copending Application No. 18/629,936 (reference application). Although the claims at issue are not identical, they are not patentably distinct from each other because they both claim and require similar limitations such as first/second capacitors at different heights, each capacitor includes lower electrode, upper electrode & dielectric layer, first/second portion of a selected one and first/second/third portions of selected another one, overlapped electrodes, and third capacitor etc.
This is a provisional nonstatutory double patenting rejection because the patentably indistinct claims have not in fact been patented.
Current Application 18/650,124
1. A semiconductor device comprising:
a first capacitor located at a first height from an one surface; and
a second capacitor spaced apart from the first capacitor and located at a second height from the one surface, the second height being different from the first height,
wherein each of the first and second capacitor includes a lower electrode, an upper electrode and a dielectric layer between the lower electrode and the upper electrode,
wherein a selected one of the lower and upper electrodes includes:
a first portion having a cylindrical shape including a closed lower surface and an opened upper surface; and
a second portion vertically extended from the first portion of the selected one,
wherein a selected another one of the lower and upper electrodes includes:
a first portion having a bar shape extended into the first portion of the selected one;
a second portion vertically extended from the first portion of the selected another one; and
a third portion having a disc shape between the first portion and the second portion in the selected another one.
10. A semiconductor device comprising:
a first capacitor located at a first height from one surface; and
a second capacitor located at a second height from the one surface to be insulated from the first capacitor, the second height being different from the first height,
wherein a shape of the first capacitor is substantially same with a shape of the second capacitor,
wherein each of the first and second capacitors includes a lower electrode, an upper electrode, and a dielectric layer between the lower electrode and the upper electrode,
wherein a selected one of the lower and the upper electrodes includes a cylinder including a closed surface and an opened surface, and a first bar connected to the closed surface of the cylinder, and
wherein a selected another one of the lower and upper electrodes includes a second bar inserted into the opened surface of the cylinder of the selected one,
wherein at least one of the first and second bars includes a variable width.
Copending Application 18/629,936
1. A semiconductor device comprising:
a first capacitor located at a first height from one surface; and
a second capacitor spaced apart from the first capacitor and located at a second height from the one surface, the second height being different from the first height,
wherein each of the first and second capacitors includes a lower electrode, an upper electrode and a dielectric layer between the lower electrode and the upper electrode,
wherein a selected one of the lower and upper electrodes includes:
a first portion having a cylindrical shape including a closed lower surface and an opened upper surface; and
a second portion vertically extended from the first portion of the selected one,
wherein a selected another one of the lower and upper electrodes includes:
a first portion having a bar shape extended into the first portion of the selected one;
a second portion vertically extended from the first portion of the selected another one; and
a third portion having a cylindrical shape including a closed upper surface and an opened lower surface between the first portion and the second portion in the selected another one and the third portion configured to surround the first portion of the selected one.
10. A semiconductor device comprising:
a first capacitor located at a first height from a one surface; and
a second capacitor located at a second height from the one surface to be insulated from the first capacitor, the second height being different from the first height,
wherein a shape of the first capacitor is substantially same with a shape of the second capacitor,
wherein each of the first and second capacitors includes a lower electrode, an upper electrode, and a dielectric layer between the lower electrode and the upper electrode,
wherein the lower electrodes and the upper electrodes include a cylindrical shape, respectively, and
wherein the lower electrode and the upper electrode of the first capacitor are arranged to interdigitate each other.
Allowable Subject Matter
6. Claim 9 would be allowable if rewritten to overcome the rejection(s) under Double Patenting, set forth in this Office action and to include all of the limitations of the base claim and any intervening claims.
Conclusion
7. Any inquiry concerning this communication or earlier communications from the examiner should be directed to DUY T.V. NGUYEN whose telephone number is (571)270-7431. The examiner can normally be reached Monday-Friday, 7AM-4PM, alternative Friday off.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, EVA MONTALVO can be reached at (571) 270-3829. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/DUY T NGUYEN/Primary Examiner, Art Unit 2818 6/8/26
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