Prosecution Insights
Last updated: August 16, 2026
Application No. 18/650,603

HALL ELEMENT

Non-Final OA §102§103
Filed
Apr 30, 2024
Priority
May 08, 2023 — JP 2023-076581
Examiner
PARVEZ, AZM A
Art Unit
Tech Center
Assignee
Rohm Co., Ltd.
OA Round
1 (Non-Final)
78%
Grant Probability
Favorable
1-2
OA Rounds
9m
Est. Remaining
99%
With Interview

Examiner Intelligence

Grants 78% — above average
78%
Career Allowance Rate
511 granted / 652 resolved
+18.4% vs TC avg
Strong +27% interview lift
Without
With
+27.0%
Interview Lift
resolved cases with interview
Typical timeline
3y 1m
Avg Prosecution
18 currently pending
Career history
663
Total Applications
across all art units

Statute-Specific Performance

§101
0.8%
-39.2% vs TC avg
§103
49.7%
+9.7% vs TC avg
§102
22.7%
-17.3% vs TC avg
§112
23.3%
-16.7% vs TC avg
Black line = Tech Center average estimate • Based on career data from 652 resolved cases

Office Action

§102 §103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claim(s) 1-3, 5-6 and 10-12 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by ZHU, CN 113759296. Regarding claim 1, ZHU discloses; a Hall element, comprising: a first semiconductor layer that is conductive and defined on both faces by a first face and a second face opposed to each other (Fig. 1A-B and Page 4; substrate 10 include a gallium arsenide substrate, has top and bottom face. The IC in the substrate is a circuit of a plurality of circuit elements formed on the substrate or in the substrate); a first magneto-sensitive layer of a conductive semiconductor in a mesa shape arranged above the first face of the first semiconductor layer and having a bottom face opposed to the first face (Fig. 1A-B and Page 5; magneto-resistive film 30 at the center can sense the magnetic field change output represents the magnetic field change of the electric signal, and comprises any suitable semiconductor thin film material such as InSb, GaAs, InAs, InGaAs or InGaP has bottom face above top face of substrate 10) ; and a second magneto-sensitive layer of a conductive semiconductor in a mesa shape arranged in a position at a distance from the first magneto-sensitive layer above the first face and having a bottom face opposed to the first face (Fig. 1A-B and Page 5; magneto-resistive film 30 at the left of the center film 30 can sense the magnetic field change output represents the magnetic field change of the electric signal, and comprises any suitable semiconductor thin film material such as InSb, GaAs, InAs, InGaAs or InGaP has bottom face above top face of substrate 10). Regarding claim 2, ZHU discloses; in each of the first magneto-sensitive layer and the second magneto-sensitive layer, a direction from the bottom face to a top face opposed to the bottom face intersects the first face (Fig. 1A-B and Page 5; magneto-resistive film 30 at the center and at the left of the center film has perpendicular direction from bottom face to the top face above the top face of the substrate 10). Regarding claim 3, ZHU discloses; a first main electrode arranged on an upper face of the first magneto-sensitive layer; and a second main electrode arranged on an upper face of the second magneto-sensitive layer (Fig. 1A-B and Page 4; electrode part 40 on top of magneto-resistive film 30 at the center and at the left of the center film). Regarding claim 5, ZHU discloses; two second magneto-sensitive layers of the second magneto-sensitive layer are arranged across the first magneto-sensitive layer (Fig. 1A-B and Page 5; magneto-resistive film 30 at the left and right across of the center magneto-resistive film). Regarding claim 6, ZHU discloses; the bottom face of the first magneto-sensitive layer and the bottom face of the second magneto-sensitive layer contact with the first face of the first semiconductor layer (Fig. 1A-B and Page 5; magneto-resistive film 30 at the center and at the left of the center film has bottom face contact with the top face of the substrate 10). Regarding claim 10, ZHU discloses; a side face of the first magneto-sensitive layer and a side face of the second magneto-sensitive layer extend in a direction perpendicular to the first face of the first semiconductor layer (Fig. 1A-B and Page 5; magneto-resistive film 30 at the center and at the left of the center film has side face perpendicular to the top face of the substrate 10). Regarding claim 11, ZHU discloses; a material of the first magneto-sensitive layer and the second magneto-sensitive layer includes a compound semiconductor (Fig. 1A-2B and Page 5; magneto-resistive film 30 at the center and at the left of the center film formed using a patterning process from the compound semiconductor film 60). Regarding claim 12, ZHU discloses; the material of the first magneto-sensitive layer and the second magneto-sensitive layer includes a gallium arsenide (Fig. 1A-B and Page 5; magneto-resistive film 30 at the center and at the left of the center film comprises any suitable semiconductor thin film material such as GaAs). Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim(s) 7 and 8 are rejected under 35 U.S.C. 103 as being unpatentable over ZHU, CN 113759296 as applied to claims 1-3, 5-6 and 10-12 above, and further in view of GOTO, JP 2009206357. Regarding claims 7 and 8, ZHU substantially discloses the invention including a magnetoresistive sensor integrated circuit comprises a substrate containing an IC circuit and a magneto-resistive film, but is silent about the first magneto-sensitive layer and the second magneto-sensitive layer are arranged on a top face of a protrusion portion formed on the first face of the first semiconductor layer in claim 7 and a second semiconductor layer disposed between the first and second magneto-sensitive layers and the first face of the first semiconductor layer, and having a composition different from the first and second magneto-sensitive layers in claim 8. However, GOTO teaches about infrared sensors uses a compound semiconductor having a protrusion portion InSb layer 2 formed on the GaAs substrate 1 and InSb layer 2 formed on the GaAs substrate 1 has different semiconductor composition than the layer 3, 4 and 5 (Fig. 1; Page 5). It would have been obvious to one with ordinary skill in the art before the effective filing date of the claimed invention to modify ZHU by providing the first magneto-sensitive layer and the second magneto-sensitive layer are arranged on a top face of a protrusion portion formed on the first face of the first semiconductor layer in claim 7 and a second semiconductor layer disposed between the first and second magneto-sensitive layers and the first face of the first semiconductor layer, and having a composition different from the first and second magneto-sensitive layers in claim 8, so that to provide a compound semiconductor device with high reliability that maintains stable characteristics for a long period without being affected by an operation environment (Page 1; abstract). Claim 13 is rejected under 35 U.S.C. 103 as being unpatentable over ZHU, CN 113759296 as applied to claims 1-3, 5-6 and 10-12 above, and further in view of FUJIMOTO, JP 2012204539. Regarding claim 13, ZHU substantially discloses the invention including a magnetoresistive sensor integrated circuit comprises a substrate containing an IC circuit and a magneto-resistive film, but is silent about an insulating substrate connected to the second face of the first semiconductor layer. However, FUJIMOTO teaches that the magnetoresistive element 1 includes three rows of magnetosensitive portions 12 formed in a meander shape on an insulating substrate 11 (Fig. 2D and Page 2). It would have been obvious to one with ordinary skill in the art before the effective filing date of the claimed invention to modify ZHU by providing an insulating substrate connected to the second face of the first semiconductor layer, so that to enhance environmental resistance without lowering the output of a magnetoresistive element (Page 1; abstract). Allowable Subject Matter Claims 4 and 9 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to AZM PARVEZ whose telephone number is (571)272-1447. The examiner can normally be reached M-F 9-6 EST. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, DREW RICHARDS can be reached at (571)272-1736. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /AZM PARVEZ/ Examiner Art Unit 2892 /NORMAN D RICHARDS/Supervisory Patent Examiner, Art Unit 2892
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Prosecution Timeline

Apr 30, 2024
Application Filed
Jul 16, 2026
Non-Final Rejection mailed — §102, §103 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
78%
Grant Probability
99%
With Interview (+27.0%)
3y 1m (~9m remaining)
Median Time to Grant
Low
PTA Risk
Based on 652 resolved cases by this examiner. Grant probability derived from career allowance rate.

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