CTNF 18/651,292 CTNF 99490 DETAILED ACTION Notice of Pre-AIA or AIA Status 07-03-aia AIA 15-10-aia The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA. Information Disclosure Statement The information disclosure statement (IDS) submitted on 04/30/2024 is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner. Specification 06-11 AIA The title of the invention is not descriptive. A new title is required that is clearly indicative of the invention to which the claims are directed. Claim Rejections - 35 USC § 112 07-30-02 AIA The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. The following is a quotation of 35 U.S.C. 112 (pre-AIA), second paragraph: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention. 07-34-05 AIA Claim 3 recites the limitation " the scanning line", “the data line”, and the “reset line ” in lines 6-7 and 10-11 . There is insufficient antecedent basis for this limitation in the claim. Claim Rejections - 35 USC § 102 07-07-aia AIA 07-07 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – 07-08-aia AIA (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. 07-06 AIA 15-10-15 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. 07-15 AIA Claim s 1-2, 9, and 17-19 are rejected under 35 U.S.C. 102( a)(1 ) as being anticipated by Cheng et al. (CN Publication 111128080/Machine Translation Document 06/09/2026) . Regarding independent claim 1 , Cheng teaches a display panel (fig. 1A, 20), comprising: a substrate (fig. 2C, 101) comprising a plurality of sub-pixels (fig. 1A, 100); wherein the plurality of sub-pixels are arranged in an array along a first direction and a second direction (fig. 1A); the display panel further comprises a plurality of power lines (fig. 2A, 250), wherein the power line provides a power signal to two sub-pixels adjacent along the second direction (machine translation, page 13 paragraph 6). Regarding independent claim 17 , Cheng teaches a display apparatus (fig. 9, 40), comprising a display panel (30), wherein the display panel comprises: a substrate (fig. 2C, 101) comprising a plurality of sub-pixels (fig. 1A, 100); wherein the plurality of sub-pixels are arranged in an array along a first direction and a second direction (fig. 1A); the display panel further comprises a plurality of power lines (fig. 2A, 250), wherein the power line provides a power signal to two sub-pixels adjacent along the second direction (machine translation, page 13 paragraph 6). Regarding dependent claims 2 and 18 , Cheng teaches the display panel according to claim 1/display apparatus according to claim 17, wherein sub-pixel comprises a driving transistor (fig. 1C, T1); a first electrode of the driving transistor is electrically connected with the power line (fig. 1C, first electrode connected to VDD), and a second electrode of the driving transistor is electrically connected with a light emitting element (120). Regarding dependent claims 9 and 19 , Cheng teaches the display panel according to claim 2/display apparatus according to claim 17, wherein the display panel further comprises a plurality of data lines (fig. 1A, 12), and the plurality of sub-pixels are divided into a plurality of column groups (fig. 1A); wherein two data lines corresponding to each column group have a column symmetry axis in the first direction (fig. 1A), and orthographic projections of pixel circuits in a same column group of sub-pixels on the substrate are symmetrical about the column symmetry axis (fig. 2A) . Claim Rejections - 35 USC § 103 07-20-aia AIA The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. 07-21-aia AIA Claim s 3-8, 10, and 13-16 are rejected under 35 U.S.C. 103 as being unpatentable over Cheng in view of Wang et al. (CN Publication 111179828) . Regarding dependent claim 3 , Cheng teaches the display panel according to claim 2, wherein sub-pixel further comprises a storage capacitor (fig. 1C, Cst), a data writing transistor (T2), and a reset transistor (T6); a first conductive plate (Cb) of the storage capacitor is electrically connected with a gate of the driving transistor (fig. 1C, Cb connected to gate of T1), and a second conductive plate (Ca) of the storage capacitor is electrically connected with the second electrode of the driving transistor (fig. 1C, Ca connected to second electrode of T1 via T4); a gate of the data writing transistor is electrically connected with the scanning line (fig. 1C, Ga1 corresponds to scanning line 11), a first electrode of the data writing transistor is electrically connected with the data line (fig. 1C, Vd corresponds to data line 12), and a second electrode of the data writing transistor is electrically connected with the gate of the driving transistor (fig. 1C, second electrode of T2 connected to gate of T2 via N2). Cheng does not teach a gate of the reset transistor is electrically connected with the scanning line, a first electrode of the reset transistor is electrically connected with the reset line, and a second electrode of the reset transistor is electrically connected with the second electrode of the driving transistor. Wang teaches a gate of the reset transistor (fig. 1, T3 occupies space for reset transistor of Cheng) is electrically connected with the scanning line (Sn1), a first electrode of the reset transistor is electrically connected with the reset line (Se occupies space for reset line of Cheng), and a second electrode of the reset transistor is electrically connected with the second electrode of the driving transistor (T3 connected to T1 via C). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to combine the display panel of Cheng and the position of the reset transistor of Wang in order to compensate for the threshold voltage (machine translation, page 8 paragraph 6). Regarding dependent claim 4 , Cheng further teaches the display panel according to claim 3, wherein in the sub-pixel, an orthographic projection of the first conductive plate of the storage capacitor (fig. 2C, Cb) on the substrate has an overlapping region with an orthographic projection of a channel zone of an active zone of the driving transistor (fig. 2C, T1a) on the substrate; and in the sub-pixel, the channel zone of the active zone of the driving transistor comprises a first driving channel zone ( fig. 2B, T1s) and a second driving channel zone (T1d) connected with each other. Cheng in view of Wang does not explicitly teach wherein the first driving channel zone extends in a first direction, the second driving channel zone extends in a third direction, and an included angle β between the first direction and the third direction satisfies 0°<β≤90°, however, figure 2B of Cheng discloses the first driving channel zone of T2 (T2d) to extend in a first direction, and the second driving channel zone of T3 (T2s) to extend in a third direction, in which an included angle between the first and third directions is between 0° and 90°. It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to rearrange the channel zones of the driving transistor (T1) and the data writing transistor (T2) such that the first driving channel zone extends in a first direction, the second driving channel zone extends in a third direction, and an included angle between the first direction and the third direction is between 0° and 90°, since it has been held that rearranging parts of an invention involves only routine skill in the art. In re Japikse , 86 USPQ 70. Regarding dependent claim 5 , Cheng further teaches the display panel according to claim 4, wherein an active zone of the reset transistor (fig. 2B, area where T6d and T6s are) extends in the first direction, and the active zone of the reset transistor is located at a side of the second driving channel zone of the driving transistor facing away from the first driving channel zone (fig. 2B); and in a same sub-pixel, a conducting drain zone of the active zone of the reset transistor (T6d) is connected with the second driving channel zone of the driving transistor (fig. 2B, T6d connected to T1d through active zone of T3). Regarding dependent claim 6 , Cheng further teaches the display panel according to claim 5, wherein an active zone of the data writing transistor (fig. 2B, area where T2d and T2s are) is spaced from the active zone of the reset transistor and the active zone of the driving transistor respectively (fig. 2B), wherein the active zone of the data writing transistor extends in the first direction (fig. 2B, active zone of T2 extends vertically); and in the same sub-pixel, an orthographic projection of the active zone of the data writing transistor in a second direction is located at a side of an orthographic projection of the second driving channel zone of the driving transistor in the second direction facing away from an orthographic projection of the active zone of the reset transistor in the second direction (fig. 2B). Regarding dependent claim 7 , Cheng further teaches the display panel according to claim 6, wherein in the same sub-pixel, a channel zone of the active zone of the data writing transistor and a channel zone of the active zone of the reset transistor are arranged in the second direction (fig. 2B, channel zone of the active zone of T6 and T2 extends horizontally). Regarding dependent claim 8 , Cheng further teaches the display panel according to claim 6, wherein the display panel further comprises a plurality of scanning lines (fig. 1A, 11); wherein one row of the sub-pixels correspond to one scanning line (fig. 1A); and in the same sub-pixel, the orthographic projection of the scanning line (fig. 2B, 210 and 220 corresponds to 11) on the substrate has an overlapping region with each of the channel zone of the active zone of the data writing transistor and the channel zone of the active zone of the reset transistor (fig. 2B). Regarding dependent claim 10 , Cheng teaches the display panel according to claim 9, wherein the column group comprises sub-pixels in two adjacent lines in the first direction and two adjacent lines in the second direction (fig. 1A), different column groups comprises different sub-pixels (machine translation, page 11 paragraph 3). Cheng does not teach and the same column group of sub-pixels share one power line; orthographic projections of pixel circuits located in the same column and at two sides of the power line on the substrate are symmetrical about the orthographic projection of the power line on the substrate. Wang teaches and the same column group of sub-pixels share one power line (fig. 2, VSS); orthographic projections of pixel circuits located in the same column and at two sides of the power line on the substrate are symmetrical about the orthographic projection of the power line on the substrate (fig. 2). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to combine the display panel of Cheng and the column groups of Wang in order to eliminate signal delate and ensure display uniformity (machine translation, page 11 paragraph 4). Regarding dependent claim 13 , Cheng teaches the display panel according to claim 9, wherein multiple column groups adjacent along the second direction constitute one row group (fig. 1A), and different row groups comprise different sub-pixels (machine translation, page 11 paragraph 3); wherein the display panel further comprises a plurality of scanning lines (fig. 1A, 11), and two scanning lines corresponding to each row group have a row symmetry axis in the second direction (fig. 1A). Cheng does not teach and orthographic projections of pixel circuits in the sub-pixels of the same row group on the substrate are symmetrical about the row symmetry axis. Wang teaches and orthographic projections of pixel circuits in the sub-pixels of the same row group on the substrate are symmetrical about the row symmetry axis (fig. 9-1). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to combine the display panel of Cheng and the row group orthographic projections of Wang in order to eliminate signal delate and ensure display uniformity (machine translation, page 11 paragraph 4). Regarding dependent claim 14 , Cheng further teaches the display panel according to claim 13, further comprising a plurality of reset lines (fig. 2A, 220); wherein two adjacent rows of sub-pixels located in different row groups share one reset line (fig. 2A) and orthographic projections of pixel circuits located in the same column and at two sides of the reset line on the substrate are arranged symmetrically with respect to the orthographic projection of the reset line on the substrate (fig. 2A, see also machine translation, page 11 paragraph 3, orthographic projections of pixel circuits in the same column can be arranged symmetrically per MPEP 2144.04). Regarding dependent claim 15 , Cheng further teaches the display panel according to claim 13, further comprising a plurality of reset adaptor parts (fig. 2A, 232), wherein a conductive layer where the plurality of reset lines are located and a conductive layer where the plurality of reset adaptor parts are located are different and insulated with each other (fig. 2A); wherein the reset line is connected with a reset transistor of the sub-pixel via the reset adaptor part (machine translation, page 13 paragraph 4, reset adaptor can be rearranged to connect to 220 instead of 240 per MPEP 2144.04); for two rows of sub-pixels sharing the same reset line, two adjacent columns of sub-pixels in the two rows of sub-pixels share one reset adaptor part (fig. 2A, pixels can be rearranged to share 232 per MPEP 2144.04). Regarding dependent claim 16 , Cheng further teaches the display panel according to claim 15, wherein the orthographic projection of the reset line on the substrate covers an orthographic projection of the reset adaptor part electrically connected with the reset line on the substrate (fig. 2A) . 07-22-aia AIA Claim s 11-12 are rejected under 35 U.S.C. 103 as being unpatentable over Cheng in view of Wang as applied to claim 10 above, and further in view of Numata et al. (US Publication 20170076667) . Regarding dependent claim 11 , Cheng in view of Wang teaches the display panel according to claim 10 Cheng in view of Wang does not teach further comprising a plurality of power adaptor parts, wherein a conductive layer where the plurality of power lines are located and a conductive layer where the plurality of power adaptor parts are located are different and electrically insulated with each other; wherein the power line is connected with the driving transistor via the power adaptor part; driving transistors in the same column group of sub-pixels share one power adaptor part. Numata teaches further comprising a plurality of power adaptor parts (fig. 3, BCT), wherein a conductive layer where the plurality of power lines (118) are located and a conductive layer where the plurality of power adaptor parts are located are different and electrically insulated with each other (fig. 3); wherein the power line is connected with the driving transistor (DRT) via the power adaptor part (paragraph 0030); driving transistors in the same column group of sub-pixels share one power adaptor part (driving transistors in the same column group can be rearranged to share one BCT per MPEP 2144.04). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to combine the display panel of Cheng in view of Wang and the power adaptor part of Numata in order to connect the driving transistor to the light emitting element (Numata paragraph 0032). Regarding dependent claim 12 , Numata further teaches the display panel according to claim 11, wherein the orthographic projection of the power line on the substrate covers an orthographic projection of the power adaptor part electrically connected with the power line on the substrate (fig. 3). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to combine the display panel of Cheng in view of Wang and the orthographic projections of Numata per the reason(s) stated above in claim 11. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to GRACE Y CHA whose telephone number is (703)756-5393. The examiner can normally be reached Monday - Thursday 8:00 am - 5:00 pm and every other Friday 8:00 am - 4:00 pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Jacob Choi can be reached at (469) 295-9060. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /GRACE CHA/Examiner, Art Unit 2897 /JACOB Y CHOI/Supervisory Patent Examiner, Art Unit 2897 Application/Control Number: 18/651,292 Page 2 Art Unit: 2897 Application/Control Number: 18/651,292 Page 3 Art Unit: 2897 Application/Control Number: 18/651,292 Page 4 Art Unit: 2897 Application/Control Number: 18/651,292 Page 5 Art Unit: 2897 Application/Control Number: 18/651,292 Page 6 Art Unit: 2897 Application/Control Number: 18/651,292 Page 7 Art Unit: 2897 Application/Control Number: 18/651,292 Page 8 Art Unit: 2897 Application/Control Number: 18/651,292 Page 9 Art Unit: 2897 Application/Control Number: 18/651,292 Page 10 Art Unit: 2897 Application/Control Number: 18/651,292 Page 11 Art Unit: 2897 Application/Control Number: 18/651,292 Page 12 Art Unit: 2897 Application/Control Number: 18/651,292 Page 13 Art Unit: 2897 Application/Control Number: 18/651,292 Page 14 Art Unit: 2897
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