DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Priority
Acknowledgment is made of applicant's claim for foreign priority under 35 U.S.C. 119(a)-(d).
Information Disclosure Statement
The information disclosure statements filed on 05/01/2024 and 06/02/2026 have been acknowledged and signed copy of the PTO-1449 are attached herein.
Claim Objections
Claims 1, 2, 13, 17 and 18 are objected to because of the following informalities:
Claim 1 line 14: “such as to cover the terminal electrode”;
Claim 2 line 6: “such as to cover …”; and
Claim 13 line 7: “such as to cover the terminal electrode.”
Incorrect use of a phrase, examiner suggested “so as to.”
Claim 17 line 3: “a plurality of fillers.” Filler is a mass noun, “a plurality of filler particles” is a better phrasing.
Claim 18 line 3: “the sealant includes flexible agent.” Missing indefinite article, should be “a flexible agent.”
. Appropriate correction is required.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claim 1, 7 and 12 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claim 1 recites the limitation “a frame portion demarcating an opening portion … and configuring to overlap a peripheral edge portion of the main surface.” As written, the frame portion performs an act of configuring, which is not what is intended here. If reads as intended (“configured to”), it is a functional recitation of the frame’s arrangement, the subsequent clause already recites the arranging step clearly. The phrase adds confusion and appropriate correction is required.
Claim 7 recites the limitation "less than the thickness of the sealing insulator" in lines 4-5. Neither claim 1 nor claim 6 recites any thickness of the sealing insulator. There is insufficient antecedent basis for this limitation in the claim.
Claim 12 recites “a step of forming, on the conductor film, a mask that exposes a part of the conductor film” and “removing the mask.” Two distinct masking structures are now in the claim with confusingly similar names, and “the mask” in the final step could arguably refer back to “the mask member” of claim 1. Examiner suggest that “a second mask” or “plating mask.”
Claims 1-5, 8, and 10-17 are rejected under 35 U.S.C. 103 as being unpatentable over Kuwabara (USPN 6472249 B1, hereinafter “Kuwabara”) in view of Fukasawa (USPN 7586185 B2, hereinafter “Fukasawa”).
In regards to claim 1, Kuwabara discloses (See, for example, Figs. 1-4, 8 and 9) a manufacturing method for a semiconductor device comprising:
a step of preparing a wafer structure (11) that includes a wafer (“wafer”, See for example, Col. 4 line 19) having a main surface, and
a main surface electrode (100/103) arranged on the main surface;
a step of forming a terminal electrode (12) on the main surface electrode (100/103);
a step of preparing a mask member (16, See Figs. 1/8) that has a frame portion (16a, See Figs. 1/8) demarcating an opening portion (16b, See Figs. 1/8) exposing an inner portion of the main surface and configuring to overlap a peripheral edge portion of the main surface (See, Fig. 1), and arranging the mask member (16) on the main surface such that the frame portion (16a) overlaps the peripheral edge portion of the main surface (peripheral portion of the substrate 11);
a step of supplying a sealant (18) including a liquid thermosetting resin (“epoxy resin”, See Col. 5 lines 22-26) into the opening portion such as to cover the terminal electrode (12); and
a step of forming a sealing insulator (18, See Fig. 3) by thermally curing the sealant (“…sealing resin was dried and cured.”, Col. 8 lines 5-6; “…the sealing film 18 after curing …” See Col. 5 lines 52-53; “cooling for curing”, See Col. 5 lines 41-44).
Kuwabara is silent about thermally curing the sealant.
Fukasawa while disclosing a semiconductor device teaches (See, for example, Figs. 23(a)-(D)) thermally curing the sealant (“the seal resin on the front side …of the wafer may be photo-curing resin…”, See Col. 13 lines 1-3).
Therefore, it would have been obvious to one having ordinary skill in the art before the effective filing date of the invention to have cured the epoxy based sealing resin of Kuwabara by heating, as taught by Fukasawa, because thermal cure is conventional and expected cure mechanism for a thermosetting epoxy resin, and doing so would yield the predictable result of a fully crosslinked, mechanically robust sealing film.
In regards to claim 2, Kuwabara as modified above discloses (See, for example, Figs. 1-4, 8 and 9) wherein the mask member (16) has the frame portion (16a, See Fig. 1) that is thicker than the terminal electrode (12., See Fig. 1), and the step of supplying the sealant includes a step of supplying the sealant (18, See Fig. 2) into the opening portion (16b, See Fig. 2) such as to cover a whole region of the terminal electrode (12, See Fig. 2 ).
In regards to claim 3, Kuwabara discloses (See, for example, Figs. 1-4, 8 and 9) further comprising: a step of partially removing (See, Figs. 2 and 3) the sealing insulator (18) until a part of the terminal electrode (12, See Fig. 3) is exposed, after the step of forming the sealing insulator (18, See Fig. 3).
In regards to claim 4, Kuwabara discloses (See, for example, Figs. 1-4, 8 and 9) wherein the step of supplying the sealant (“…a liquid sealing resin is printed within the opening 16b…”, See Col. 5 line18-19) includes a step of forming a liquid film of the sealant (18, See, Fig. 2) within the opening portion (16b), and the step of forming the sealing insulator (18, See Fig. 3)) includes a step of thermally curing the liquid film (“…sealing resin was dried and cured.”, Col. 8 lines 5-6; “…the sealing film 18 after curing …” See Col. 5 lines 52-53; “cooling for curing”, See Col. 5 lines 41-44).
In regards to claim 5, Kuwabara discloses (See, for example, Figs. 1-4, 8 and 9) wherein the step of supplying the sealant includes a step of squeezing (“…sealing film 18 after cured … controlled by controlling the pushing amount of the squeegee 17.”, See Col. 8 lines 21-25) and extending the sealant into the opening portion (16b) by a squeegee member (17).
In regards to claim 8, Kuwabara discloses (See, for example, Figs. 1-4, 8 and 9) further comprising: a step of removing the mask member (See, Figs. 2 and 3) after the step of forming the sealing insulator (18).
In regards to claim 10, Kuwabara discloses (See, for example, Figs. 1-4, 8 and 9) wherein the step of forming the sealing insulator includes a step of forming the sealing insulator (18) in a fully cured state by thermally and completely curing the sealant (“…sealing resin was dried and cured.”, Col. 8 lines 5-6; “…the sealing film 18 after curing …” See Col. 5 lines 52-53; “cooling for curing”, See Col. 5 lines 41-44)..
In regards to claim 11, Kuwabara discloses (See, for example, Figs. 1-4 and 8 and 9) wherein the step of forming the sealing insulator includes a step of forming the sealing insulator in a semi-cured state by thermally and partially curing the sealant (“the liquid sealing resin has a very high viscosity, i.e., about 500,000 to 1,500,000 cPS.”, See Col. 5 lines 24-26; “…heating, the viscosity of the liquid sealing resin is lowered to about 50,000 to 200,000 cPS.”, See Col. 5 lines 30-32; “The viscosity of the sealing film 18 is brought back to the original level of about 500,000 to 1,500,000 cPS after completion of the printing and the subsequent cooling for curing. The printed sealing resin can be cooled forcedly or naturally by allowing the printed sealing resin to stand under the flow of the cooled air atmosphere.”, See Col. 5 lines 38-44).
In regards to claim 12, Kuwabara as modified above discloses (See, for example, Figs. 8(a)-8(F), Fukasawa) wherein the step of forming the terminal electrode includes:
a step of forming a conductor film (14) that covers the main surface electrode (15/21/22));
a step of forming, on the conductor film (14), a mask (25) that exposes a part of the conductor film (14) that covers the main surface electrode (15/21/22);
a step of depositing a conductor (17a) on a part of the conductor film (14) that is exposed through the mask (25); and,
a step of removing the mask (See processing Steps 8€ and 8(F)) after the step of depositing the conductor (17a).
In regards to claim 13, Kuwabara discloses (See, for example, Figs. 1-4, 8 and 9) further comprising: a step of forming an insulating film that partially covers the main surface electrode before the step of forming the terminal electrode (Sealing film 18 printed over the entire main surface within the opening 16b, thereby covering both the columnar/terminal electrodes 12 and the underlying films, See Fig. 2) , wherein the step of supplying the sealant includes a step of supplying the sealant into the opening portion such as to cover the terminal electrode and the insulating film (passivation film 101/102 formed on a surface of substrate 11a covering the peripheral portion of each electrode pad 100 and including openings 101a and including openings 102a; See Fig. 8).
In regards to claim 14, Kuwabara discloses (See, for example, Figs. 1-4, 8 and 9) wherein the step of forming the terminal electrode includes a step of forming the terminal electrode (12, Fig. 8) that has a portion directly covering the insulating film (101/102, Fig. 8).
In regards to claim 15, Kuwabara discloses (See, for example, Figs. 1-4, 8 and 9) wherein the step of forming the insulating film includes a step of forming the insulating film (101/102, See Fig. 8) that includes either or both of an inorganic insulating film (101) and an organic insulating film (102).
In regards to claim 16, Kuwabara discloses (See, for example, Figs. 1-4, 8 and 9) further comprising: a step of cutting the wafer and the sealing insulator after the step of forming the sealing insulator (“…a solder ball 19 is formed … the columnar electrode 12 … followed dicing the semiconductor substrate 11 so as to obtain individual semiconductor devices.”, See Col. 5 lines 49-51 and See Fig. 4).
In regards to claim 17, Kuwabara discloses (See, for example, Figs. 1-4, 8 and 9) wherein the sealant includes a plurality of fillers (“The liquid sealing resin is prepared by mixing 50 to 80% by weight of silica particles, which serve to lower the thermal expansion coefficient, with an epoxy resin. “, See Col. 5 lines 22-24).
Claim 6 is rejected under 35 U.S.C. 103 as being unpatentable over Kuwabara in view of Fukasawa as applied to claim 1 above, and further in view of Yamano et al. (USPN 7811857 B2, hereinafter “Yamano”).
In regards to claim 6, Kuwabara as modified above discloses all limitations of claim 1 except that further comprising: a step of thinning the wafer after the step of forming the sealing insulator.
Yamano while disclosing a method of manufacturing a semiconductor device teaches (See, for example, Figs. 10A-10C) a step of thinning the wafer (See, Fig. 10C) after the step of forming the sealing insulator (19).
Therefore, it would have been obvious to one having ordinary skill in the art before the effective filing date of the invention to perform thinning operation after resin sealing because this would help a wafer back grinding process to be realized without wafer cracking, and almost all steps can be performed in a thick-wafer state, so that the risk of wafer cracking is reduced.
Claim 7 is rejected under 35 U.S.C. 103 as being unpatentable over Kuwabara in view of Fukasawa as applied to claim 1 above, and further in view of Yamano and Kurita (USPN 6753238 B2, hereinafter “Kurita”)
In regards to claim 7, Kuwabara as modified above discloses all limitations of claim 6 except wherein the step of thinning the wafer includes a step of thinning the wafer until the wafer has a thickness less than the thickness of the sealing insulator.
Kurita while disclosing a semiconductor device teaches (See, for example, Figs. 6D and 7A-7B) a step of thinning the wafer until the wafer has a thickness less than the thickness of the sealing insulator (“rear portion of the semiconductor wafer 1 is ground using a grind stone 8 … to form extremely thin semiconductor wafer 21 having a thickness approximately 10um.”, See Col. 6 lines 45-50; “…a resin is sealed with the sealing resin 25 having a thickness of approximately 30 .mu.m …”, See Col. 6 lines 58-61).
Therefore, it would have been obvious to one having ordinary skill in the art before the effective filing date of the invention to further modify Kuwabara as modified above with Kurita because thinning the wafer below a thickness of the overlying sealing insulator would help obtain reduced package profile to achieve high-density packaging of semiconductor chips, and reliability of the packaging of semiconductor devices would largely be improved.
Claim 9 is rejected under 35 U.S.C. 103 as being unpatentable over Kuwabara in view of Fukasawa as applied to claim 1 above, and further in view of Tsai et al. (US 2014/0252597 A1, hereinafter “Tsai”).
In regards to claim 9, Kuwabara as modified above discloses all limitations of claim 1 except further comprising: a step of removing the mask member before the step of forming the sealing insulator.
Tsai while disclosing a method of manufacturing semiconductor devices teaches (See, for example, Figs. 3-7) a step of removing the mask member (46, See, Fig. 4 and Fig. 5) before the step of forming the sealing insulator (62, See, Fig. 7).
Therefore, it would have been obvious to one having ordinary skill in the art before the effective filing date of the invention to remove the mask while the sealant remains in a liquid or uncured state avoids the adhesion of cured resin to the mask body, eliminates the mask-cleaning and residue removal operations.
Claim 18 is rejected under 35 U.S.C. 103 as being unpatentable over Kuwabara in view of Fukasawa as applied to claim 1 above, and further in view of Usui et al. (USPN 6288169 B1, hereinafter “Usui”).
In regards to claim 18, Kuwabara as modified above discloses all limitations of claim 1 except that wherein the sealant includes flexible agent.
Usui while disclosing the addition of a flexibilizing particulate phase to a semiconductor encapsulating resin teaches the sealant includes flexible agent (“The epoxy resin composition according to the present invention comprises (A) an epoxy resin, (B) a phenolic resin, and (C) specific butadiene rubber particles.”, See Col. 2 lines 48-51; “component (C ) is uniformly dispersed in the composition without forming coarse agglomerates to secure low stress properties”, See Abstract).
Therefore, it would have been obvious to one having ordinary skill in the art before the effective filing date of the invention to add a flexible agent to the epoxy sealing resin of Kuwabara because this would help lower the elastic modulus of the cured sealing film and reduce the thermal stress transmitted to the underlying wafer and electrodes.
Claims 19-20 are rejected under 35 U.S.C. 103 as being unpatentable over Kuwabara in view of Fukasawa as applied to claim 1 above, and further in view of Utsumi et al. (USPN 10319824 B2, hereinafter “Utsumi”)
In regards to claims 19 and 20, Kuwabara as modified above discloses all limitations of claim 1 except that wherein the wafer has a laminated structure that includes a substrate and an epitaxial layer, and has the main surface that is formed by the epitaxial layer; and wherein the wafer includes a monocrystal of a wide bandgap semiconductor.
Utsumi while disclosing a semiconductor device teaches (See, for example, Fig. 1) the wafer (“the silicon carbide substrate (semiconductor wafer) 10”, See Col. 9 lines 29-30) has a laminated structure that includes a substrate (See, for example, 1, Fig. 1) and an epitaxial layer (21, 22, 23, See Fig. 1), and has the main surface that is formed by the epitaxial layer (See, for example, Col. 4 lines 61-67); and wherein the wafer includes a monocrystal of a wide bandgap semiconductor (SiC is an epitaxial substrate in which silicon carbide layers (first to third semiconductor layers (first to third epitaxial layers))21 to 23 …” See Col. 4 lines 61-67).
Therefore, it would have been obvious to one having ordinary skill in the art before the effective filing date of the invention to modify the substrate of Kuwabara by Utsumi because this would help obtain superior breakdown voltage and switching performance.
Correspondence
Any inquiry concerning this communication or earlier communications from the examiner should be directed to ERMIAS T WOLDEGEORGIS whose telephone number is (571)270-5350. The examiner can normally be reached on Monday-Friday 8 am - 5 pm E.S.T..
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Britt Hanley can be reached on 571-270-3042. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/ERMIAS T WOLDEGEORGIS/Primary Examiner, Art Unit 2893
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