DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Information Disclosure Statement
The information disclosure statement (IDS) submitted on 5/1/24 is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the Examiner.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claim(s) 1, 2, 4, 9, 10, and 12 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Noguchi (US Patent Application Publication No. 2006/0012033)(“Noguchi”).
Regarding Claim 1, Noguchi teaches a semiconductor device, comprising: transistor devices (¶0043) disposed on a frontside of a dielectric layer (Figure 4a, item 2, ¶0043); a thermoelectric device having a cooling plate (Figure 6B, item 9) disposed on a backside of the dielectric layer (see Figure 6B); and the thermoelectric device including pillars (Figure 6B, items 11 and 12) connected to backside power rails by backside contacts (see Figure 3, note depictions and operation described in ¶0049).
Regarding Claim 2, Noguchi further teaches the cooling plate spans an area occupied by the transistor devices (see Figure 3).
Regarding Claim 4, Noguchi further teaches the backside power rails provide supply voltages to the thermoelectric device (¶0049).
Regarding Claim 9, Noguchi teaches a semiconductor device, comprising: a dielectric layer (Figure 4a, item 2, ¶0043); a component (Figure 4a, item 1’, ¶0043), disposed on the dielectric layer; a first doped pillar (Figure 3, item 12, ¶0051) disposed on the dielectric layer on a side opposite the component; a second doped pillar (Figure 3, item 11, ¶0051) disposed on the side opposite the component and apart from the first doped pillar; a cooling plate (Figure 3, item 9) electrically connected to the first doped pillar and the second doped pillar to provide a thermoelectric device (¶0049); contacts (Figure 3, item 14a and 14b) connected to each of the first doped pillar and the second doped pillar; and power rails connected to the contacts (see Figure 3 and ¶0049).
Regarding Claim 10, Noguchi further teaches the cooling plate spans an area occupied by the component (see Figure 3).
Regarding Claim 12, Noguchi further teaches the power rails are disposed on a backside of the semiconductor device (see Figure 3 and ¶0049)
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claim(s) 3 and 11 are rejected under 35 U.S.C. 103 as being unpatentable over Noguchi as applied to claims 1 and 9 above, and further in view of Kasichainula (US Patent No. 11,283,000) (“Kasichainula”).
Regarding Claim 3, Noguchi teaches Claim 1 as indicated above. Noguchi does not specifically teach the pillars are partially embedded within the cooling plate. However, Kasichainula teaches partially embedding a pillar (Figure 3, item 126) in a cooling plate (Figure 3, item 128) in a thermoelectric cooling structure for an electronic device (see Figures 1 and 2). It would have been obvious to a person having ordinary skill in the art at the time of effective filing to use the arrangement of parts in Kasichainula in the device of Noguchi, as the combination of known prior art elements according to known methods yielding predictable results is an exemplary rationale supporting a prima facie case of obviousness, see MPEP ¶2143 - KSR Int'l Co. v. Teleflex Inc., 550 U.S. 398, 415-421, 82 USPQ2d 1385, 1395-97 (2007).
Regarding Claim 11, Noguchi teaches Claim 9 as indicated above. Noguchi does not specifically teach the pillars are partially embedded within the cooling plate. However, Kasichainula teaches partially embedding a pillar (Figure 3, item 126) in a cooling plate (Figure 3, item 128) in a thermoelectric cooling structure for an electronic device (see Figures 1 and 2). It would have been obvious to a person having ordinary skill in the art at the time of effective filing to use the arrangement of parts in Kasichainula in the device of Noguchi, as the combination of known prior art elements according to known methods yielding predictable results is an exemplary rationale supporting a prima facie case of obviousness, see MPEP ¶2143 - KSR Int'l Co. v. Teleflex Inc., 550 U.S. 398, 415-421, 82 USPQ2d 1385, 1395-97 (2007).
Claims 5, 6, 13, and 14 are rejected under 35 U.S.C. 103 as being unpatentable over Noguchi as applied to Claims 1 and 9 above, and further in view of Manfrini et al. (US Patent Application Publication No. 11,765,908) (“Manfrini”).
Regarding Claim 5, Noguchi teaches Claim 1 as indicated above. Noguchi does not specifically teach the transistor devices include a field effect transistor having a source/drain region that extends through the dielectric layer. However, Manfrini teaches having a backside contact structure extending through a dielectric material to a transistor structure (see Figure 1A, note source/drain contact 110+106+124 extending through dielectric 123). It would have been obvious to a person having ordinary skill in the art at the time of effective filing to use the backside electrical contact to the S/D region as taught by Manfrini in the device of Noguchi, as doing so allows for a single power source to power all device elements and additionally stack functional elements in a way to optimize the overall functionality per device footprint.
Regarding Claim 6, Manfrini further teaches the source/drain region connects to the backside power rails by the backside contacts (see Figure 1A).
Regarding Claim 13, Noguchi teaches Claim 9 as indicated above. Noguchi does not specifically teach the transistor devices include a field effect transistor having a source/drain region that extends through the dielectric layer. However, Manfrini teaches having a backside contact structure extending through a dielectric material to a transistor structure (see Figure 1A, note source/drain contact 110+106+124 extending through dielectric 123). It would have been obvious to a person having ordinary skill in the art at the time of effective filing to use the backside electrical contact to the S/D region as taught by Manfrini in the device of Noguchi, as doing so allows for a single power source to power all device elements and additionally stack functional elements in a way to optimize the overall functionality per device footprint.
Regarding Claim 14, Manfrini further teaches the source/drain region connects to the ower rails by the contacts (see Figure 1A).
Claims 7 and 15 are rejected under 35 U.S.C. 103 as being unpatentable over Noguchi as applied to Claims 1 and 9 above, and further in view of Ahn et al. (US Patent No. 6,586,835) (“Ahn”).
Regarding Claim 7, Noguchi teaches Claim 1 as indicated above. Noguchi does not specifically teach the pillars include monocrystalline semiconductor material. However, Ahn teaches using monocrystalline silicon as the pillar material in a thermoelectric cooling structure (column 3, lines 55-60). It would have been obvious to a person having ordinary skill in the art at the time of effective filing to use the known material of monocrystalline silicon in the device of Noguchi, as it has been held that the selection of a known material based on its suitability for its intended use supported a prima facie obviousness determination in Sinclair & Carroll Co. v. Interchemical Corp., 325 U.S. 327, 65 USPQ 297 (1945). See also In re Leshin, 227 F.2d 197, 125 USPQ 416 (CCPA 1960). MPEP § 2144.07.
Regarding Claim 15, Noguchi teaches Claim 9 as indicated above. Noguchi does not specifically teach the first doped pillar and the second doped pillar are monocrystalline. However, Ahn teaches using monocrystalline silicon as the pillar material in a thermoelectric cooling structure (column 3, lines 55-60). It would have been obvious to a person having ordinary skill in the art at the time of effective filing to use the known material of monocrystalline silicon in the device of Noguchi, as it has been held that the selection of a known material based on its suitability for its intended use supported a prima facie obviousness determination in Sinclair & Carroll Co. v. Interchemical Corp., 325 U.S. 327, 65 USPQ 297 (1945). See also In re Leshin, 227 F.2d 197, 125 USPQ 416 (CCPA 1960). MPEP § 2144.07.
Claim 8 is rejected under 35 U.S.C. 103 as being unpatentable over Noguchi as applied to Claim 1 above, and further in view of Pauly (US Patent Application Publication No. 2020/0006618) (“Pauly”).
Regarding Claim 8, Noguchi teaches Claim 1 as indicated above. Noguchi does not specifically teach the pillars include a topological material. However, Pauly teaches using topological material as the pillar material in a thermoelectric cooling structure (¶0011). It would have been obvious to a person having ordinary skill in the art at the time of effective filing to use the known topological material in the device of Noguchi, as it has been held that the selection of a known material based on its suitability for its intended use supported a prima facie obviousness determination in Sinclair & Carroll Co. v. Interchemical Corp., 325 U.S. 327, 65 USPQ 297 (1945). See also In re Leshin, 227 F.2d 197, 125 USPQ 416 (CCPA 1960). MPEP § 2144.07.
Claims 16, 17, and 20 are rejected under 35 U.S.C. 103 as being unpatentable over Noguchi in view of Kasichainula and Ahn.
Regarding Claim 16, Noguchi teaches a semiconductor device, comprising: field effect transistors (¶0043) disposed on a dielectric layer (Figure 4a, item 2, ¶0043); a cooling plate (Figure 3, item 9) disposed on the dielectric layer on a side opposite the field effect transistors; an N-type pillar (Figure 3, item 11) connected to the cooling plate; a P-type pillar (Figure 3, item 12) connected to the cooling plate; a first contact (Figure 3, item 10a) connected to the N-type pillar; a second contact (Figure 3, item 10b) connected to the P-type pillar; a backside positive supply power rail (Figure 3, item 14a, and operation described in ¶0049) connected to the first contact; and a backside negative supply power rail (Figure 3, item 14b, and operation described in ¶0049) connected to the second contact.
Noguchi does not specifically teach the pillars are partially embedded within the cooling plate. However, Kasichainula teaches partially embedding a pillar (Figure 3, item 126) in a cooling plate (Figure 3, item 128) in a thermoelectric cooling structure for an electronic device (see Figures 1 and 2). It would have been obvious to a person having ordinary skill in the art at the time of effective filing to use the arrangement of parts in Kasichainula in the device of Noguchi, as the combination of known prior art elements according to known methods yielding predictable results is an exemplary rationale supporting a prima facie case of obviousness, see MPEP ¶2143 - KSR Int'l Co. v. Teleflex Inc., 550 U.S. 398, 415-421, 82 USPQ2d 1385, 1395-97 (2007).
Noguchi as modified does not specifically teach the pillars include monocrystalline semiconductor material. However, Ahn teaches using monocrystalline silicon as the pillar material in a thermoelectric cooling structure (column 3, lines 55-60). It would have been obvious to a person having ordinary skill in the art at the time of effective filing to use the known material of monocrystalline silicon in the device of Noguchi, as it has been held that the selection of a known material based on its suitability for its intended use supported a prima facie obviousness determination in Sinclair & Carroll Co. v. Interchemical Corp., 325 U.S. 327, 65 USPQ 297 (1945). See also In re Leshin, 227 F.2d 197, 125 USPQ 416 (CCPA 1960). MPEP § 2144.07.
Regarding Claim 17, Noguchi further teaches the cooling plate spans an area occupied by the field effect transistors (see Figure 3).
Regarding Claim 20, Noguchi further teaches the cooling plate includes a metal (¶0059).
Claims 18 and 19 are rejected under 35 U.S.C. 103 as being unpatentable over Noguchi as modified applied to Claim 16 above, and further in view of Manfrini.
Regarding Claim 18, Noguchi as modified teaches Claim 18 as indicated above. Noguchi does not specifically teach a field effect transistor includes a source/drain region that extends through the dielectric layer. However, Manfrini teaches having a backside contact structure extending through a dielectric material to a transistor structure (see Figure 1A, note source/drain contact 110+106+124 extending through dielectric 123). It would have been obvious to a person having ordinary skill in the art at the time of effective filing to use the backside electrical contact to the S/D region as taught by Manfrini in the device of Noguchi, as doing so allows for a single power source to power all device elements and additionally stack functional elements in a way to optimize the overall functionality per device footprint.
Regarding Claim 19, Manfrini further teaches the source/drain includes a backside connection (see Figure 1A).
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
Farahani et al. (US Patent Application Publication No. 2006/0137732)
Chen et al. (US Patent Application Publication No. 2022/0013704)
Boukai et al. (US Patent Application Publication No. 2018/0351069)
Chou et al. (US Patent No. 9,625,186)
Any inquiry concerning this communication or earlier communications from the examiner should be directed to MARK W TORNOW whose telephone number is (571)270-7534. The examiner can normally be reached M-Th 6:30-4:30 EST.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Matthew Landau can be reached at 571-272-1731. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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MARK W. TORNOW
Primary Examiner
Art Unit 2891
/MARK W TORNOW/Primary Examiner, Art Unit 2891
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