DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Double Patenting
The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969).
A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP § 2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b).
The filing of a terminal disclaimer by itself is not a complete reply to a nonstatutory double patenting (NSDP) rejection. A complete reply requires that the terminal disclaimer be accompanied by a reply requesting reconsideration of the prior Office action. Even where the NSDP rejection is provisional the reply must be complete. See MPEP § 804, subsection I.B.1. For a reply to a non-final Office action, see 37 CFR 1.111(a). For a reply to final Office action, see 37 CFR 1.113(c). A request for reconsideration while not provided for in 37 CFR 1.113(c) may be filed after final for consideration. See MPEP §§ 706.07(e) and 714.13.
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Claims 1-7 provisionally rejected on the ground of nonstatutory double patenting as being unpatentable over claim 4-10 of copending Application No. 18/680,065 (reference application, hereafter ‘065). Although the claims at issue are not identical, they are not patentably distinct from each other because they recite equivalent limitations for the disclosed invention.
Regarding claims 1, ‘065 discloses a ceramic substrate for a heat dissipation substrate, comprising: an effective area of the ceramic substrate; a dummy area of the ceramic substrate disposed outside the effective area; and a unique code marked on the dummy area of the ceramic substrate (claim 4, lines 1-4).
Regarding claims 2, ‘065 discloses a ceramic substrate wherein the unique code comprises one or more of a digital matrix code (DMC), QR code, or bar code, and wherein the unique code comprises thickness information of the ceramic substrate (claim 5, lines 1-4).
Regarding claim 3, ‘065 discloses a ceramic substrate further comprising a unique ID marked on a dummy area of the ceramic substrate (claim 6, lines 1-2).
Regarding claim 4, ‘065 discloses a ceramic substrate wherein the unique ID comprises a combination of numbers, a combination of letters, or a combination of numbers and letters (claim 7, lines 1-2).
Regarding claim 5, ‘065 discloses a ceramic substrate wherein the unique code comprises a rectangular or square shape, and wherein a vertex of the unique code and a vertex of the effective area are arranged to face each other (claim 8, lines 1-4).
Regarding claim 6, ‘065 discloses a ceramic substrate wherein the unique code comprises a rectangular or square shape, and wherein a minimum distance between the unique code and the effective area of the ceramic substrate is a distance between a vertex of the unique code and a vertex of the effective area (claim 9, lines 1-5).
Regarding claim 7, ‘065 discloses a ceramic substrate wherein the unique code comprises a rectangular or square shape, and wherein an edge of the unique code is disposed to face a vertex of an effective area closest to the unique code (claim 10, lines 1-4).
This is a provisional nonstatutory double patenting rejection because the patentably indistinct claims have not in fact been patented.
Claims 8-20 are provisionally rejected on the ground of nonstatutory double patenting as being unpatentable over claims 1-20 of copending Application No. 18/680,065 (hereafter ‘065) in view of Miyazaki et al. (2023/0108305, hereafter Miyazaki).
Regarding claim 8, ‘065 discloses a heat dissipation substrate for a power semiconductor module, comprising: a first metal plate; a substrate bonded to the first metal plate; a second metal plate bonded on the substrate, and a first unique code marked on the first metal plate or the second metal plate (claim 1, lines 2-4, 7-8).
‘065 fails to disclose specifically a ceramic substrate.
However, Miyazaki teaches an insulating substrate as a specifically ceramic substrate (par. 0021).
It would have been obvious to one of ordinary skill in the art at the time the invention was filed to modify ‘065 with Miyazaki by utilizing a specifically ceramic insulating substrate in order to provide high thermal conductivity, thus ensuring effective heat dissipation and mechanical reliability.
Regarding claim 9, ‘065 discloses a heat dissipation substrate wherein the second metal plate is electrically connected to a power semiconductor device, and wherein the first unique code is provided on the first metal plate (claim 3, lines 1-3).
Regarding claim 10, ‘065 discloses a heat dissipation substrate wherein a thickness of the first metal plate and a thickness of the second metal plate are different from each other (claim 1, lines 5-6).
Regarding claim 11, ‘065 discloses a heat dissipation substrate wherein the ceramic substrate comprises: an effective area of the ceramic substrate; a dummy area of the ceramic substrate disposed outside the effective area; and a second unique code marked on the dummy area of the ceramic substrate (claim 4, lines 1-4).
Regarding claim 12, ‘065 discloses a heat dissipation substrate wherein the first unique code comprises one or more of a digital matrix code (DMC), QR code, or bar code, and wherein the first unique code comprises thickness information of the ceramic substrate (claim 5, lines 1-4).
Regarding claim 13, ‘065 discloses a heat dissipation substrate further comprising a unique ID marked on the dummy area of the ceramic substrate (claim 6, lines 1-2).
Regarding claim 14, ‘065 discloses a heat dissipation substrate wherein the unique ID comprises a combination of numbers, a combination of letters, or a combination of numbers and letters (claim 7, lines 1-2).
Regarding claim 15, ‘065 discloses a heat dissipation substrate wherein the second unique code comprises a rectangular or square shape, and wherein a vertex of the second unique code and a vertex of the effective area are arranged to face each other (claim 8, lines 1-4).
Regarding claim 16, ‘065 discloses a heat dissipation substrate wherein the second unique code comprises a rectangular or square shape, and wherein a minimum distance between the second unique code and the effective area of the ceramic substrate is configured to correspond to a distance between the vertex of the second unique code and the vertex of the effective area (claim 9, lines 1-5).
Regarding claim 17, ‘065 discloses a heat dissipation substrate wherein the second unique code comprises a rectangular or square shape, and wherein an edge of the second unique code is disposed to face the vertex of the effective area closest to the unique code (claim 10, lines 1-4).
Regarding claim 18, ‘065 discloses a power semiconductor module, comprising: a first heat dissipation substrate; a power semiconductor device disposed on the first heat dissipation substrate; and a second heat dissipation substrate disposed on the power semiconductor device, wherein the first heat dissipation substrate or the second heat dissipation substrate comprises the heat dissipation substrate (claim 19, lines 1-6).
Regarding claim 19, ‘065 discloses a power semiconductor wherein the second metal plate is electrically connected to the power semiconductor device, and wherein the first unique code is provided on the first metal plate (claim 3, lines 1-3).
Regarding claim 20, ‘065 discloses a power semiconductor wherein a thickness of the first metal plate and a thickness of the second metal plate are different from each other (claim 1, lines 5-6).
This is a provisional nonstatutory double patenting rejection.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1-3 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Yuasa et al. (EP-4006966, hereafter Yuasa).
Regarding claim 1, Yuasa discloses a ceramic substrate for a heat dissipation substrate, comprising: an effective area (100A, Fig. 1, par. 0026) of the ceramic substrate (100, Fig. 1, par. 0024); a dummy area (10, Fig. 1, par. 0026) of the ceramic substrate disposed outside the effective area; and a unique code (12, Fig. 1, par. 0026) marked on the dummy area of the ceramic substrate.
Regarding claim 2, Yuasa discloses a ceramic substrate wherein the unique code (12) comprises one or more of a digital matrix code (DMC), QR code, or bar code (par. 0033), and wherein the unique code comprises thickness information (par. 0034) of the ceramic substrate (100, Fig. 1).
Regarding claim 3, Yuasa discloses a ceramic substrate further comprising a unique ID (11, Fig. 1, par. 0026) marked on a dummy area (10, Fig. 1) of the ceramic substrate (100, Fig. 1).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 4-9 and 11-17 are rejected under 35 U.S.C. 103 as being unpatentable over Yuasa in view of Goto et al. (2023/0042932, hereafter Goto).
Regarding claim 4, Yuasa fails to disclose a ceramic substrate wherein the unique ID comprises a combination of numbers, a combination of letters, or a combination of numbers and letters.
However, Goto teaches a ceramic substrate wherein the unique ID (150, Fig. 1) comprises a combination of numbers, a combination of letters, or a combination of numbers and letters (par. 0039).
It would have been obvious to one of ordinary skill in the art at the time the invention was filed to modify Yuasa with Goto by providing a unique ID with letters/numbers in order to accurately identify specific information related to the device.
Regarding claim 5, Yuasa fails to disclose a ceramic substrate wherein the unique code comprises a rectangular or square shape, and wherein a vertex of the unique code and a vertex of the effective area are arranged to face each other.
However, Goto teaches a ceramic substrate wherein the unique code (150, par. 0039) comprises a rectangular or square shape (Fig. 1), and wherein a vertex of the unique code and a vertex of the effective area are arranged to face each other (Fig. 1).
It would have been obvious to one of ordinary skill in the art at the time the invention was filed to modify Yuasa with Goto by providing a unique ID such that its vertex is aligned to face the vertex of the effective area in order to maximize data density while preserving space.
Regarding claim 6, Yuasa discloses a vertex of the effective area (100A, Fig. 1).
Yuasa fails to disclose a ceramic substrate wherein the unique code comprises a rectangular or square shape, and wherein a minimum distance between the unique code and the effective area of the ceramic substrate is a distance between a vertex of the unique code [and a vertex of the effective area (above)].
However, Goto teaches a ceramic substrate wherein the unique code (150, Fig. 1) comprises a rectangular or square shape (Fig.1), and wherein a minimum distance between the unique code and the effective area of the ceramic substrate (100, Fig. 1) is a distance between a vertex of the unique code (Fig. 1) [and a vertex of the effective area (above)].
It would have been obvious to one of ordinary skill in the art at the time the invention was filed to modify Yuasa with Goto by providing a unique code that is rectangular such that a minimum distance is between its vertex and that of the effective area in order to maximize data density while preserving space and providing precise coordinates for automated scanning.
Regarding claim 7, Yuasa discloses an edge of the unique code (11, Fig. 1) is disposed to face a vertex of an effective area (100A, Fig. 1) closest to the unique code (par. 0031).
Yuasa fails to disclose a ceramic substrate wherein the unique code comprises a rectangular or square shape.
However, Goto teaches a ceramic substrate wherein the unique code (150, Fig. 1) comprises a rectangular or square shape (Fig. 1).
It would have been obvious to one of ordinary skill in the art at the time the invention was filed to modify Yuasa with Goto by providing a unique code that is rectangular in order to maximize data density while preserving space.
Regarding claim 8, Yuasa discloses heat dissipation substrate for a power semiconductor module, comprising: a first metal plate (110 top, Fig. 5); a ceramic substrate (100, Fig. 5, par. 0044) bonded to the first metal plate; a second metal plate bonded (100 bottom, Fig. 5, par. 0044) on the ceramic substrate.
Yuasa fails to disclose a first unique code marked on the first metal plate or the second metal plate.
However, Goto teaches a first unique code (150, Fig. 1) marked on the first metal plate or the second metal plate (120, Fig. 1-3, par. 0031).
It would have been obvious to one of ordinary skill in the art at the time the invention was filed to modify Yuasa with Goto by providing a unique code on one of the metal plates in order to ensure the code is visible and avoids damage or disruption at thermal interface.
Regarding claim 9, Yuasa fails to disclose a heat dissipation substrate wherein the second metal plate is electrically connected to a power semiconductor device, and wherein the first unique code is provided on the first metal plate.
However, Goto teaches a heat dissipation substrate wherein the second metal plate (124, Fig. 3) is electrically connected to a power semiconductor device (par. 0044), and wherein the first unique code (150, Fig. 1) is provided on the first metal plate (122, Figs. 1, 3).
It would have been obvious to one of ordinary skill in the art at the time the invention was filed to modify Yuasa with Goto by connecting one metal plate to a power device and including a unique code on the other in order to provide an electrical circuit path as well as a heat spreader and ensure the code is visible and avoids damage or disruption at thermal interface.
Regarding claim 11, Yuasa discloses a heat dissipation substrate wherein the ceramic substrate (100, Fig. 1) comprises: an effective area (100A, Fig. 1) of the ceramic substrate; a dummy area (10, Fig. 1) of the ceramic substrate disposed outside the effective area; and a second unique code (12, Fig. 1) marked on the dummy area of the ceramic substrate.
Regarding claim 12, Yuasa fails to disclose a heat dissipation substrate wherein the first unique code comprises one or more of a digital matrix code (DMC), QR code, or bar code, and wherein the first unique code comprises thickness information of the ceramic substrate.
However, Goto teaches a heat dissipation substrate wherein the first unique code (150, Fig. 1) comprises one or more of a digital matrix code (DMC), QR code, or bar code (par. 0039), and wherein the first unique code comprises thickness information of the ceramic substrate (par. 0038).
It would have been obvious to one of ordinary skill in the art at the time the invention was filed to modify Yuasa with Goto by providing a unique code with information about the substrate in order to calculate power limits and track defects.
Regarding claim 13, Yuasa discloses a heat dissipation substrate further comprising a unique ID (11, Fig. 1, par. 0026) marked on the dummy area (10, Fig. 1) of the ceramic substrate (100, Fig. 1).
Regarding claim 14, Yuasa fails to disclose a heat dissipation substrate wherein the unique ID comprises a combination of numbers, a combination of letters, or a combination of numbers and letters.
However, Goto teaches a heat dissipation substrate wherein the unique ID (150, Fig. 1) comprises a combination of numbers, a combination of letters, or a combination of numbers and letters (par. 0039).
It would have been obvious to one of ordinary skill in the art at the time the invention was filed to modify Yuasa with Goto by providing a unique ID including numbers/letters accurately identify specific information related to the device.
Regarding claim 15, Yuasa discloses heat dissipation substrate wherein the second unique code (12, Figs. 1-2) comprises a rectangular or square shape (Figs. 1-2).
Yuasa fails to disclose a vertex of the second unique code and a vertex of the effective area are arranged to face each other.
However, Goto teaches a vertex of the second unique code and a vertex of the effective area are arranged to face each other (Fig. 1).
It would have been obvious to one of ordinary skill in the art at the time the invention was filed to modify Yuasa with Goto by providing a unique code wherein its vertex faces the vertex of the effective area in order to maximize data density while preserving space.
Regarding claim 16, Yuasa discloses a heat dissipation substrate wherein the second unique code (12, Figs. 1-2) comprises a rectangular or square shape (Figs. 1-2), and an effective area (100A, Fig. 1).
Yuasa fails to disclose a minimum distance between the second unique code and the effective area of the ceramic substrate is configured to correspond to a distance between the vertex of the second unique code and the vertex of the effective area.
However, Goto teaches a minimum distance between the second unique code and the effective area (above) of the ceramic substrate is configured to correspond to a distance between the vertex of the second unique code and the vertex of the effective area (Fig. 1).
It would have been obvious to one of ordinary skill in the art at the time the invention was filed to modify Yuasa with Goto by providing a unique code wherein the minimum distance is between the vertex of the code and that of the effective area in order to maximize data density while preserving space and providing precise coordinates for automated scanning.
Regarding claim 17, Yuasa discloses a heat dissipation substrate wherein the second unique code (12, Fig. 1) comprises a rectangular or square shape (Figs. 1-2), and wherein an edge of the second unique code is disposed to face the vertex of the effective area closest to the unique code (par. 0031).
Claim 10 is rejected under 35 U.S.C. 103 as being unpatentable over Yuasa in view of Goto as applied to claim 8 above, and further in view of Lechner et al. (2022/0415754, hereafter Lechner).
Regarding claim 10, Yuasa and Goto fails to disclose a heat dissipation substrate wherein a thickness of the first metal plate and a thickness of the second metal plate are different from each other.
However, Lechner teaches a heat dissipation substrate wherein a thickness of the first metal plate and a thickness of the second metal plate are different from each other (par. 0049).
It would have been obvious to one of ordinary skill in the art at the time the invention was filed to modify Yuasa and Goto with Lechner by providing a heat dissipating substrate wherein the first and second metal plates have different thickness in order to absorb and spread thermal spikes while also reducing bulk and thermal resistance to external heatsink.
Claims 18 and 19 are rejected under 35 U.S.C. 103 as being unpatentable over Yuasa in view of Goto as applied to claim 8 above, and further in view of Tzu (2021/0358876, hereafter Tzu).
Regarding claim 18, Yuasa and Goto fail to disclose a power semiconductor module, comprising: a first heat dissipation substrate; a power semiconductor device disposed on the first heat dissipation substrate; and a second heat dissipation substrate disposed on the power semiconductor device, wherein the first heat dissipation substrate or the second heat dissipation substrate comprises the heat dissipation substrate according to claim 8.
However, Tzu teaches a power semiconductor module, comprising: a first heat dissipation substrate (104, Fig. 1); a power semiconductor device (100, Fig. 1) disposed on the first heat dissipation substrate; and a second heat dissipation substrate (102, Fig. 1) disposed on the power semiconductor device, wherein the first heat dissipation substrate or the second heat dissipation substrate comprises the heat dissipation substrate according to claim 8 (Fig. 2B).
It would have been obvious to one of ordinary skill in the art at the time the invention was filed to modify Yuasa and Goto with Tzu by implementing a power device with two heat dissipation substrates in order to provide double-sided cooling which reduces thermal resistance, replaces fragile wires, and equalizes mechanical stress.
Regarding claim 19, Yuasa and Tzu fail to disclose the first unique code is provided on the first metal plate.
However, Goto teaches the first unique code (150, Fig. 1) is provided on the first metal plate (122, Fig. 1).
It would have been obvious to one of ordinary skill in the art at the time the invention was filed to modify Yuasa and Tzu with Goto by providing a unique code on the metal plate in order to ensure the code is visible and avoids damage or disruption at thermal interface.
Yuasa and Goto fail to disclose a power semiconductor module wherein the second metal plate is electrically connected to the power semiconductor device.
However, Tzu teaches a power semiconductor module wherein the second metal plate (504a, Fig. 5H, par. 0074) is electrically connected to the power semiconductor device (516b, Fig. 5H, par. 0077).
It would have been obvious to one of ordinary skill in the art at the time the invention was filed to modify Yuasa and Goto with Tzu by providing a metal plate connected to the power device in order to act as an electrical circuit path as well as a heat spreader.
Claim 20 is rejected under 35 U.S.C. 103 as being unpatentable over Yuasa and Goto in view of Tzu as applied to claim 18 above, and further in view of Lechner.
Regarding claim 20, Yuasa, Goto, and Tzu fail to disclose a power semiconductor module wherein a thickness of the first metal plate and a thickness of the second metal plate are different from each other.
However, Lechner teaches a power semiconductor module wherein a thickness of the first metal plate and a thickness of the second metal plate are different from each other (par. 0049).
It would have been obvious to one of ordinary skill in the art at the time the invention was filed to modify Yuasa, Goto, and Tzu with Lechner by providing metal plates with different thickness in order to absorb and spread thermal spikes while also reducing bulk and thermal resistance to external heatsink.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to CHARLES M BRECHT whose telephone number is (571)272-9634. The examiner can normally be reached Mon-Fri: 7:30am - 5pm.
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/C.M.B./Examiner, Art Unit 2817
/MARLON T FLETCHER/Supervisory Primary Examiner, Art Unit 2817
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