DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1, 2, 4, 5, and 8-12 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Kim et al (U.S. Pub #2014/0203457).
With respect to claim 1, Kim teaches an electronic component comprising:
a first device die (Figs. 9-10, 920), the first device die located in a first device level;
a first dummy die (Figs. 9-10, 970; Paragraph 49, an interposer may be a dummy die), the first dummy die located in the first device level and having at least one first pass through conductive layer (Fig. 9, 975) through the first dummy die;
a second device die (Figs. 9-10, 930) disposed in a second device level above the first device die, the second device die attached to the first device die;
a second dummy die (Figs. 9-10, 980) disposed in the second device level, the second dummy die attached to the first dummy die and having at least one second pass through conductive layer (Figs. 9-10, 983) electrically connected to the at least one first pass through conductive layer; and
a third device die (Fig. 9, 960) located in a third device level above the second device die, the third device die attached to at least one of a top surface of the second device die or a top surface of the second dummy die.
With respect to claim 2, Kim teaches that the first device die is attached to a substrate (Fig. 9, 910).
With respect to claim 4, Kim teaches that at least one of the second device die (Fig. 9, 930) and the second dummy die (Fig. 9, 980) are attached to the first device die (Fig. 9, 920) and the first dummy die (Fig. 9, 970), respectively.
With respect to claim 5, Kim teaches that the third device die (Fig. 9, 960) is attached to the second device die (Fig. 9, 930), the second dummy die (Fig. 9, 980) or both the second device die and the second dummy die.
With respect to claim 8, Kim teaches that the third device die (Fig. 9, 960) is electrically connected (Fig. 9, 961) to the second dummy die (Fig. 9, 980).
With respect to claim 9, Kim teaches that the third device die (Fig. 9, 960) is electrically connected (Fig. 9, 961) to the second dummy die (Fig. 9, 980).
With respect to claim 10, Kim teaches a first bonding layer (Fig. 9, 921) located between the substrate (Fig. 9, 910) and at least one of the first device die or first dummy die.
With respect to claim 11, Kim teaches at least one second bonding layer located between the first device die and the second device die, or between the first dummy die and the second dummy die (Fig. 9, 981).
With respect to claim 12, Kim teaches at least one second bonding layer located between the second device die and the third device die, or between the second dummy die and the third device die (Fig. 9, 961).
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 3, 6, 7, 28-33, 35, and 36 are rejected under 35 U.S.C. 103 as being unpatentable over Kim et al (U.S. Pub #2014/0203457), in view of Hu et al (U.S. Pub #2020/0343218).
With respect to claim 3, Kim does not teach that at least one of the first device die and the first dummy die are attached to the substrate by direct hybrid bonding.
Hu teaches that at least one of a first device die (Fig. 3, C1) and a first dummy die are attached to a substrate (Fig. 3, I) by direct hybrid bonding (Fig. 3 and Paragraph 78).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to attach a first device to the substrate of Kim as taught by Hu in order to reduce the package size (Paragraph 119).
With respect to claim 6, Kim does not teach that the third device die is electrically connected to the second device die with a bonding layer comprising conductive features.
Hu teaches a third die that is electrically connected to a second die (Fig. 3, devices C1) with a bonding layer comprising conductive features (Fig. 3, BS11/BS12).
It would have been obvious to one of ordinary skill in the art at the time the invention was effectively filed to electrically connect the second device die and third device die of Kim with a bonding layer as taught by Hu in order to achieve the predictable result of making functional connection between components (Paragraph 17).
With respect to claim 7, Kim teaches that the third device die is electrically connected to the substrate; but does not teach the third device die is electrically connected to the second device die.
Hu teaches a third die that is electrically connected to a second die (Fig. 3, devices C1).
It would have been obvious to one of ordinary skill in the art at the time the invention was effectively filed to electrically connect the second device die and third device die of Kim with a bonding layer as taught by Hu in order to achieve the predictable result of making functional connection between components (Paragraph 17).
With respect to claim 28, Kim teaches an electronic component comprising:
a first die stack comprising: a first device die (Figs. 9-10, 920); and a second device die (Fig. 9-10, 930);
a second die stack disposed adjacent the first die stack, the second die stack comprising: a first dummy die (Figs. 9-10, 970; Paragraph 49, an interposer may be a dummy die) having a first through substrate via (TSV) (Fig. 9, 975 and Paragraph 49); and a second dummy die (Fig. 9-10, 980) attached to the first dummy die, the second dummy die having a second TSV (Fig. 9, 983) electrically connected to the first TSV;
Kim does not teach that the second device die is hybrid bonded to the first device die;
an encapsulant at least partially encapsulating the first and second die stacks, the encapsulant disposed at least between the first and second die stacks.
Hu teaches that the encapsulant (Fig. 1, E and Paragraph 47) is disposed at least between the first and second die stacks.
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to disposed the encapsulant of Kim at least between the first and second die stacks as taught by Hu in order to achieve the predictable result of encapsulating the devices with a dielectric material (Paragraph 47).
Hu teaches that a second die is hybrid bonded to a first die (Paragraph 24). It would have been obvious to one of ordinary skill in the art before the effective filing date of use hybrid bonding to make the connection between the second die and first die of Kim as taught by Hu in order to reduce the package size (Paragraph 119).
With respect to claim 29, Kim teaches a third die stack adjacent the second die stack such that the second die stack is located between the first die stack and the third die stack, the third die stack comprising: a first device die (Fig. 9-10, 940); and a second device die (Fig. 9-10, 950) on the first device die.
Kim does not teach that the second device die is hybrid bonded to the first device die.
Hu teaches that a second die is hybrid bonded to a first die (Paragraph 24). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to use hybrid bonding to make the connection between the second die and first die of Kim as taught by Hu in order to reduce the package size (Paragraph 119).
With respect to claim 30, Kim does not teach that the encapsulant is located on an outer side of first stack between an outer edge of the component and the first stack.
Hu teaches that the encapsulant (Fig. 1, E) is located on an outer side of first stack between an outer edge of the component (Fig. 1, edge of PM) and the first stack (Fig. 1, C1 or C2).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to provide the encapsulant on an out side of the first stack of Kim as taught by Hu in order to provide dielectric encapsulation for the devices (Paragraph 47).
With respect to claim 31, Kim does not teach at least one bridging device die hybrid bonded to the second device die and a dummy die.
Hu teaches at least one bridging device die (Fig. 1, IC and Paragraph 12) hybrid bonded (Paragraph 22) to the second device die (Fig. 1, C1 or C2) and the second dummy die (Fig. 1, 300).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to provide a bridging device die that is hybrid bonded to the second device die and second dummy of Kim as taught by Hu in order to incorporate and connect additional functional components with the stack, and to reduce the package size (Paragraph 119).
With respect to claim 32, Hu teaches that the encapsulant (Fig. 1, E) at least partially encapsulates the at least one bridging die (Fig. 1 IC, the encapsulant at least partially encapsulates the bottom surface of IC).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to dispose the encapsulant of Kim at least partially on a bridge die as taught by Hu in order to achieve the predictable result of encapsulating the devices with a dielectric material (Paragraph 47).
With respect to claim 33, Kim does not teach a redistribution layer on top of the encapsulant.
Hu teaches a redistribution layer (Fig. 1, BS/IS) on top of the encapsulant (Fig. 1, E).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to provide a redistribution layer on top of the encapsulant of Kim as taught by Hu in order to make electrical connections to the devices (Paragraph 14).
With respect to claim 35, Kim teaches an electronic component comprising:
a first die stack comprising: a first device die (Figs. 9-10, 920); and
a second device die (Figs. 9-10, 930) bonded to the first device die;
a second die stack disposed adjacent the first die stack, the second die stack comprising: a first dummy die (Figs. 9-10, 970; Paragraph 49, an interposer may be a dummy die) and a second dummy die (Fig. 9, 980) attached to the first dummy die.
Kim does not teach that the second device die is hybrid bonded to the first device die.
Hu teaches that a second die is hybrid bonded to a first die (Paragraph 24). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to use hybrid bonding to make the connection between the second die and first die of Kim as taught by Hu in order to reduce the package size (Paragraph 119).
With respect to claim 36, Kim does not teach an encapsulant disposed at least between the first and second die stacks.
Hu teaches that the encapsulant (Fig. 1, E and Paragraph 47) is disposed at least between the first and second die stacks.
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to disposed the encapsulant of Kim at least between the first and second die stacks as taught by Hu in order to achieve the predictable result of encapsulating the devices with a dielectric material (Paragraph 47).
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to BENJAMIN P SANDVIK whose telephone number is (571)272-8446. The examiner can normally be reached M-F: 10-6.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Davienne Monbleau can be reached at (571)-272-1945. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/BENJAMIN P SANDVIK/Primary Examiner, Art Unit 2812