Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Objections
Claim 1 and claim 19 are objected to because of the following informalities: “an upper surfaced of the conductive separation layer” should be corrected to “an upper surface of the conductive separation layer”. Appropriate correction is required.
Claim 3 is objected to because of the following informalities: “a height” has already been claimed in claim 1, upon which claim 3 depends. If this is the same height as “a height” of claim 1, correct to “the height”. Appropriate correction is required.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 5, 18, and 20 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Regarding claims 5, 18, and 20, the limitation “wherein an upper surface of the semiconductor substrate of each pixel separated by the device isolation layer has a lens shape convex on one side” is unclear. Plainly read, it seems to mean that the semiconductor substrate itself has an upper side that is not flat, but shaped as a convex lens. However, this literal interpretation conflicts with the disclosure of the figures: figure 3 shows that the upper surface of the substrate is flat, with a convex microlens structure provided on the substrate. For purposes of examination, the interpretation of the figures, that a layer comprising a convex microlens is positioned on the substrate layer, is used.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1, 2, and 5-20 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Noh et al. US 20230170372.
Regarding claim 1, Noh discloses an image sensor comprising:
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a semiconductor substrate comprising a first surface, a second surface, opposing the first surface, and a plurality of pixels, the semiconductor substrate having a first height (Paragraph [0040] describes semiconductor substrate 1, comprising two opposite surfaces 1a and 1b shown in figure 4; [0007] discloses a plurality of pixels; the semiconductor substrate has a height h1 as shown in annotated figure 4);
a device isolation layer in a trench penetrating through the first surface and the second surface of the semiconductor substrate and separating the pixels from each other (device isolation layer DTI is disposed in a trench 10 penetrating the first surface 1a and the second surface 1b as seen in figure 4, separating the pixels from each other[0048]); and
a microlens provided on the second surface (microlens ML is provided on the second surface 1b, see figure 4),
wherein the device isolation layer comprises: a conductive separation layer with a second height smaller than the first height (annotated figure 4 shows the device isolation structure DTI, where the conductive separation layer is 14 [0048] and the height of the conductive separation layer h2 is smaller than the height of the substrate h1);
a capping separation layer on the conductive separation layer to cover an upper surfaced of the conductive separation layer (annotated figure 4 shows capping separation layer 20 covering the surface of the conductive separation layer 14 in the direction labeled up) ; and
an insulating liner, and having a height smaller than the first height and greater than or equal to the second height (insulating liner 12a [0061] has a height equal to height 2 as seen in annotated figure 4, therefore it has a height smaller than the first height and greater than or equal to the second height) .
Regarding claim 2, Noh discloses the image sensor of claim 1, wherein the capping separation layer has a width, greater than a width of the conductive separation layer (figure 4 shows clearly that the width of the capping layer 20 is greater than the width of the conductive separation layer 14).
Regarding claim 5, Noh discloses the image sensor of claim 1, wherein each of the pixels comprises a photoelectric conversion element in the semiconductor substrate (pixels each comprise a photoelectric conversion element PD [0052], as shown in annotated figure 4), and an upper surface of the semiconductor substrate of each pixel separated by the device isolation layer has a lens shape convex on one side (a microlens ML has a convex lens shape and one of the microlenses is located on an upper surface of the semiconductor substrate 1b separated by the device isolation layer [0068], see figure 4), the lens shape configured to refract a path of light incident on the upper surface of the semiconductor substrate such that the light travels to the photoelectric conversion element. The microlens structure comprises a convex lens, defined by Webster Dictionary Online as “Noun 1. convex lens - lens such that a beam of light passing through it is brought to a point or focus. Synonyms: converging lens.” Below is an illustration of a converging lens from the Merriam Webster dictionary ”Converging lens.” Merriam-Webster.com Dictionary, Merriam-Webster, https://www.merriam-webster.com/dictionary/converging%20lens. Accessed 2 Jul. 2026.)
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Thus, by definition of a convex lens, the incident light will converge on the other side of the convex lens, in the area where the photoelectric conversion element PD is located in annotated image 4.)
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Regarding claim 6, Noh discloses the image sensor of claim 5, wherein the device isolation layer surrounds each pixel, and the upper surface of the semiconductor substrate of each pixel separated by the device isolation layer has an upwardly convex shape (see annotated image 4 below where an outline indicates the upwardly convex shape).
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Regarding claim 7, Noh discloses the image sensor of claim 5, wherein the capping separation layer has a staircase shape having a width increased in a direction toward the second surface when viewed in cross-section (the layer STI has a staircase pattern, as can be seen in figure 4, with width increasing in a direction toward the second surface as shown by the thin arrow on annotated figure 4) .
Regarding claim 8, Noh discloses the image sensor of claim 5, wherein the capping separation layer comprises an inclined portion having a width increasing in a direction toward the second surface when viewed in cross-section (as seen in figure 4, the layer STI has an inclined portion and a width increasing as described in the rejection to claim 7 above).
Regarding claim 9, Noh discloses the image sensor of claim 1, wherein each pixel comprises a photoelectric conversion element in the semiconductor substrate, and the photoelectric conversion element includes impurities of a first conductivity type (paragraph [0042] discloses that the photoelectric conversion element in each pixel includes impurities of n-type, a first conductivity type) .
Regarding claim 10, Noh discloses the image sensor of claim 9, wherein the semiconductor substrate comprises an impurity doped region from the second surface to a first depth, and the impurity doped region includes impurities of a second conductivity type, opposite to the first conductivity type of the impurities (paragraph [0049] discloses that the substrate 1 comprises an impurity-doped region IPR in figure 5C that may be doped with p-type impurities, a second conductivity type with reference to the n-type first conductivity type of claim 9).
Regarding claim 11, Noh discloses the image sensor of claim 10, wherein the impurity doped region has a depth, greater than a depth of the capping separation layer (figure 4 and close-up figure 5C clearly show that the depth of the impurity-doped region IPR is greater than the depth of capping separation layer 20).
Regarding claim 12, Noh discloses the image sensor of claim 1, wherein the device isolation layer comprises polysilicon including impurities (paragraph [0053] discloses that the conductive isolation structure part 14 comprises polysilicon doped with impurities).
Regarding claim 13, Noh discloses the image sensor of claim 12, wherein the conductive separation layer is configured to receive a negative bias (paragraph [0053] discloses that negative bias voltage may be applied to the conductive structure 14).
Regarding claim 14, Noh discloses the image sensor of claim 1, wherein the capping separation layer has a refractive index, different from a refractive index of the semiconductor substrate (paragraph [0040] discloses that the substrate 1 may comprise a single-crystalline silicon wafer and paragraph [0043] discloses that the capping element SLI in figure 4 comprises silicon nitride – single crystalline silicon has a refractive index different from the refractive index of silicon nitride.)
Regarding claim 15, Noh discloses the image sensor of claim 14, wherein the capping separation layer comprises a transparent material (paragraph [0043] discloses that the capping element SLI in figure 4 comprises silicon nitride, a transparent material).
Regarding claim 16, Noh discloses the image sensor of claim 15, wherein the capping separation layer comprises an organic insulating layer or an inorganic insulating layer or both an organic insulating layer and an inorganic insulating layer (paragraph [0043] discloses that the capping element SLI in figure 4 comprises silicon nitride, an inorganic insulating material).
Regarding claim 17, Noh discloses the image sensor of claim 16, wherein the capping separation layer comprises at least one of silicon oxide, hafnium oxide, silicon nitride, silicon carbonitride, zirconium oxide, aluminum oxide, titanium oxide, tantalum oxide, lanthanum oxide, praseodymium oxide, cerium oxide, neodymium oxide, promethium oxide, samarium oxide, europium oxide, gadolinium oxide, terbium oxide, dysprosium oxide, erbium oxide, holmium oxide, thulium oxide, ytterbium oxide, lutetium oxide, yttrium oxide, aluminum oxynitride, hafnium oxynitride, or aluminum oxynitride (paragraph [0043]discloses that the capping element SLI in figure 4 comprises silicon nitride).
Regarding claim 18, Noh discloses an image sensor comprising:
a semiconductor substrate comprising a plurality of pixels, a first surface, and a second surface opposing the first surface (Paragraph [0040] describes semiconductor substrate 1, comprising two opposite surfaces 1a and 1b shown in figure 4; [0007] discloses a plurality of pixels; the semiconductor layer has a height h1 as shown in annotated figure 4’ below);
a device isolation layer in a trench penetrating through the first surface and the second surface of the semiconductor substrate and separating the pixels from each other (device isolation layer DTI is disposed in a trench 10 penetrating the first surface 1a and the second surface 1b as seen in annotated figure 4’, separating the pixels from each other [0048]); and
a microlens provided on the second surface (microlens ML is provided on the second surface 1b, see annotated figure 4’), wherein
each pixel comprises a photoelectric conversion element in the semiconductor substrate (pixels each comprise a photoelectric conversion element PD [0052], as shown in annotated figure 4’) , and
an upper surface of the semiconductor substrate of each pixel separated by the device isolation layer has a lens shape convex on one side (a microlens ML has a convex lens shape and one of the microlenses is located on an upper surface of the semiconductor substrate 1b separated by the device isolation layer [0068], see figure 4’),
the lens shape configured to refract a path of light incident on the upper surface of the semiconductor substrate such that the light travels to the photoelectric conversion element (this process is described in paragraph [0082]).
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Regarding claim 19, Noh discloses the image sensor of claim 18, wherein the device isolation layer comprises:
a conductive separation layer in a portion of the trench (figure 4 shows the device isolation structure DTI, where the conductive separation layer is 14 [0048]);
a capping separation layer on the conductive separation layer to cover an upper surfaced of the conductive separation layer (annotated figure 4 below shows device capping separation layer SDI, which covers the upper surface of the conductive separation layer as a projection of the capping separation layer on the upper surface in the annotated figure illustrates) ; and
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an insulating liner between the conductive separation layer and the semiconductor substrate and comprising a protrusion protruding from an upper surface of the conductive separation layer (insulation layer 12 comprises a protrusion from the upper surface of the conductive layer, as shown in annotated figure 4 below) .
Regarding claim 20, Noh discloses an image sensor comprising:
a semiconductor substrate comprising a plurality of pixels each having a photoelectric conversion element, the semiconductor substrate including a first surface, and a second surface opposing the first surface height (Paragraph [0040] describes semiconductor substrate 1, comprising two opposite surfaces 1a and 1b shown in figure 12; [0007] discloses a plurality of pixels; pixels each comprise a photoelectric conversion element PD [0052], as shown in figure 4);
a device isolation layer in a trench penetrating through the first surface and the second surface of the semiconductor substrate and separating the pixels from each other (device isolation layer DTI is disposed in a trench 10 penetrating the first surface 1a and the second surface 1b as seen in figure 4, separating the pixels from each other [0048]); and
a microlens on the second surface (microlens ML is provided on the second surface 1b, see figure 4), wherein
the trench defines a first trench having a first width and a second trench having a second width greater than the first width (trench 10 comprises trenches SDI and DTI, which have different widths, as seen in figure 4),
the device isolation layer comprises: a conductive separation layer within the first trench (figure 4 shows the device isolation structure DTI, where the conductive separation layer is 14 [0048]);
a capping separation layer on the conductive separation layer to cover an upper surface of the conductive separation layer and within the second trench (annotated figure 4 of the rejection of claim 19 above shows device capping separation layer SDI within the second trench, and SDI covers the upper surface of the conductive separation layer as a projection of the capping separation layer on the upper surface in this figure illustrates); and
an insulating liner extending in a direction from the first surface to the second surface and between the semiconductor substrate and the conductive separation layer (paragraph [0048] discloses that liner 12, comprising an insulator silicon oxide, is disposed between the semiconductor substrate 1 and the conductive separation layer 14, as shown in figure 4], and
wherein an upper surface of the semiconductor substrate of each pixel separated by the device isolation layer has a lens shape convex on one side (a microlens ML has a convex lens shape and one of the microlenses is located on an upper surface of the semiconductor substrate 1b separated by the device isolation layer [0068], see figure 4),
the lens shape configured to refract a path of light incident on the upper surface of the semiconductor substrate such that the light travels to the photoelectric conversion element (see the rejection of claim 5 above).
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claims 3, 4 are rejected under 35 U.S.C. 103 as being unpatentable over Noh.
Regarding claim 3, Noh discloses the image sensor of claim 2.
Noh does not disclose wherein the insulating liner (12a) has a height, smaller than the first height (h1, annotated figure 4) and greater than the second height (h2 annotated figure 4).
MPEP 2144.04 IV A states:
Changes in Size/Proportion - In re Rose, 220 F.2d 459, 105 USPQ 237 (CCPA 1955) (Claims directed to a lumber package "of appreciable size and weight requiring handling by a lift truck" were held unpatentable over prior art lumber packages which could be lifted by hand because limitations relating to the size of the package were not sufficient to patentably distinguish over the prior art.); In re Rinehart, 531 F.2d 1048, 189 USPQ 143 (CCPA 1976) ("mere scaling up of a prior art process capable of being scaled up, if such were the case, would not establish patentability in a claim to an old process so scaled." 531 F.2d at 1053, 189 USPQ at 148.). In Gardner v. TEC Syst., Inc., 725 F.2d 1338, 220 USPQ 777 (Fed. Cir. 1984), cert. denied, 469 U.S. 830, 225 USPQ 232 (1984), the Federal Circuit held that, where the only difference between the prior art and the claims was a recitation of relative dimensions of the claimed device and a device having the claimed relative dimensions would not perform differently than the prior art device, the claimed device was not patentably distinct from the prior art device.
Therefore, it would have been obvious to a person having ordinary skill in the art before the effective filing date to modify claimed length of the insulating layer 12a to create a diagonal insulating layer (think of a hypotenuse in a triangle as the longest side) in order to enhance the structural stability of the device.
Regarding claim 4, Noh discloses the image sensor of claim 3.
Noh lacks wherein the insulating liner comprises a protrusion protruding from an upper surface of the conductive separation layer.
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However, in the embodiment of figure 12 Noh discloses wherein the insulating liner 12 comprises a protrusion extending from an upper surface of the conductive separation layer 14, as illustrated in annotated figure 12.
Therefore, it would have been obvious to a person having ordinary skill in the art to extend the insulating liner 12 of the embodiment of figure 4 to protrude into the capping layer STI in order to increase the reflective structure size to produce improved image quality.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure: Wang et al. US 20250255026 (discloses an image sensor with deep trench isolation structures), Chen et al. US 20230082312 (discloses an image sensor pixel with a deep trench isolation structure), Zheng et al. US 20230065063 (discloses single-photon avalanche diodes with deep trench isolation structures).
Any inquiry concerning this communication or earlier communications from the examiner should be directed to KATRINA M H WALJESKI-MOSES whose telephone number is (571)272-0731. The examiner can normally be reached Mon- Fri 7:30 am- 5 pm.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Jeff Natalini can be reached at (571) 272-2266. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/KATRINA WALJESKI-MOSES/Examiner, Art Unit 2818
/JEFF W NATALINI/Supervisory Patent Examiner, Art Unit 2818
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