DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 1-7 is/are rejected under 35 U.S.C. 103 as being unpatentable over Kusanagi (JP H04182198, of record) in view of Tsujii (JP 2012063989A).
Regarding claim 1, Kusanagi discloses, as shown in Figures 1-4, an IC module (10) comprising:
a substrate (11) that has a first surface (bottom surface) and a second surface (upper surface) opposite the first surface and has a metal surface at lease on the first surface; and
an IC chip (16) that has both a contact communication function and is mounted on the second surface of the substrate, wherein
a plurality of terminals (no label) constituted by the metal surface is formed on the first surface of the substrate, the plurality of terminals containing a first terminal used for contact communication and a second terminal other than the first terminal, and
the substrate includes
a via that is formed on an inner surface of a through hole (13) penetrating from the first surface to the second surface and is connected to the first terminal (no label, surrounding by the groove 12a,12b),
a metal connection pad (14) extending from the via to a portion, on the second surface, positioned opposite the second terminal overlapping the IC chip when seen from a thickness direction of the substrate, and
a bonding wire (15) that connects between a connection end, of the connection pad, positioned closer to the IC chip than to the via and a connection terminal of the IC chip
Kusanagi does not disclose the IC chip has a contactless communication function. However, Tsujii discloses an IC chip has dual interface of a contact communication and a contactless communication function (wireless). Note Background Art of Tsujii. Therefore, it would have been obvious to one of ordinary skills in the art at the time the invention was made to form the IC chip of Kusanagi having a contactless communication function, such as taught by Tsujii in order to transmit and receive the signals the require high-speed processing without the need to insert of remove the IC card.
Regarding claim 2, Kusanagi and Tsujii disclose the substrate has a slit between the plurality of terminals, and
the bonding wire (15) is disposed in a position that does not overlap the slit when seen from the thickness direction (Figures).
Regarding claim 3, Kusanagi and Tsujii disclose the connection pad is positioned in a surrounding portion of the IC chip on the second surface of the substrate (Figures).
Regarding claims 4-5, Kusanagi and Tsujii do not disclose a distance from an outer circumferential end of the IC chip to the connection end of the connection pad, and the length of the bonding wire. However, the selection of these parameters such as energy, concentration, temperature, time, speed, molar fraction, depth, thickness, distance, length, etc., would have been obvious and involve routine optimization which has been held to be within the level of ordinary skill in the art. "Normally, it is to be expected that a change in energy, concentration, temperature, time, molar fraction, depth, thickness, distance, length, etc., or in combination of the parameters would be an unpatentable modification. Under some circumstances, however, changes such as these may impart patentability to a process if the particular ranges claimed produce a new and unexpected result which is different in kind and not merely degree from the results of the prior art... such ranges are termed "critical ranges and the applicant has the burden of proving such criticality.... More particularly, where the general conditions of a claim are disclosed in the prior art, it is not inventive to discover the optimum or workable ranges by routine experimentation." In re Alter 105 USPQ233, 255 (CCPA 1955). See also In re Waite 77 USPQ 586 (CCPA 1948); In re Scherl 70 USPQ 204 (CCPA 1946); In re Irmscher 66 USPQ 314 (CCPA 1945); In re Norman 66 USPQ 308 (CCPA 1945); In re Swenson 56 USPQ 372 (CCPA 1942); In re Sola 25 USPQ 433 (CCPA 1935); In re Dreyfus 24 USPQ 52 (CCPA 1934).
Regarding claim 6, Kusanagi and Tsujii disclose the bonding wire (15) extending toward one direction of the substrate is set to be longer than a distance between the connection end of the connection pad and the connection terminal of the IC chip in the one direction and is provided in a loosened state (Figures).
Regarding claim 7, Kusanagi discloses, as shown in Figures 1-4, a method for manufacturing an IC module (10) including a substrate (11) that has a first surface (bottom surface) and a second surface (upper surface) opposite the first surface and has a metal surface at lease on the first surface and an IC chip (16) that has a contact communication function and is mounted on the second surface of the substrate, the steps comprising:
forming, on the first surface of the substrate, a plurality of terminals (no label, surrounding by the grooves 12a, 12b) that is constituted by the metal surface and contains a first terminal used for connection communication and a second terminal other than the first terminal;
providing, on an inner surface of a through hole (13) penetrating from the first surface to the second surface, a via connected to the first terminal;
providing a metal connection pad (14) extending from the via to a portion, on the second surface, positioned opposite the second terminal overlapping the IC chip when seen from a thickness direction of the substrate; and
connecting between a connection end, of the connection pad, positioned closer to the IC chip than to the via and a connection terminal of the IC chip by a bonding wire (15).
Kusanagi does not disclose the IC chip has a contactless communication function. However, Tsujii discloses an IC chip has dual interface of a contact communication and a contactless communication function (wireless). Note Background Art of Tsujii. Therefore, it would have been obvious to one of ordinary skills in the art at the time the invention was made to form the IC chip of Kusanagi having a contactless communication function, such as taught by Tsujii in order to transmit and receive the signals the require high-speed processing without the need to insert of remove the IC card.
Conclusion
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/HUNG K VU/ Primary Examiner, Art Unit 2897
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