DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Information Disclosure Statement
The information disclosure statement (IDS) submitted on February 17, 2026, is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner.
Response to Arguments
New ground(s) of rejection is made in light of the amended claims.
Claim Rejections - 35 USC § 102
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claim(s) 1, 8-9 is/are rejected under 35 U.S.C. 102(a)(2) as being unpatentable over Imafuji et al. (US 20170186677 A1)
Regarding Claim 1 – Imafuji teaches a circuit board (Fig 1B; 10) comprising: an outermost insulating layer (Fig 1B; 11); a protective layer disposed on the outermost insulating layer (Fig 1B; 32); a pad disposed between the outermost insulating layer and the protective layer and protruding from the outermost insulating layer (Fig 1B; 31+36); and a bump disposed on the pad (Fig 1B; 40); wherein the pad includes a seed layer disposed on the outermost insulating layer (Fig 1B; 31), and an electroplating layer disposed on the seed layer and electroplated using the seed layer (Fig 1B; 36), wherein a horizontal width of the seed layer is greater than a horizontal width of the electroplating layer (shown in Fig 1B), wherein the seed layer includes a first portion vertically overlapping the electroplating layer and the bump, and a second portion vertically overlapping the protective layer and not overlapping the electroplating layer and the bump (shown in Fig 1B), and wherein a top surface of the first portion of the seed layer is in contact with the electroplating layer, and a top surface of the second portion of the seed layer is in contact with the protective layer (shown in Fig 1B).
Regarding Claim 8 – Imafuji teaches the circuit board of claim 1, wherein the bump includes a through portion passing through the protective layer (Fig 1B, Imafuji [0063, 0043] opening 34 penetrates layer 32, and bump 40 fills that opening), and a protrusion that is disposed on the through portion (Fig 1B, Imafuji [0043] bump 40 also fills recess 33 (larger diameter) providing protruding part of the bump sitting on through portion), wherein a horizontal width of the protrusion is greater than a horizontal width of the through portion (Fig 1B, Imafuji [0038] states “the bore diameter Φ2 of the upper end of the opening 34 is set to be smaller than the bore diameter Φ1 of the upper end of the recess 33”).
Regarding Claim 9 – Imafuji teaches the circuit board of claim 1, wherein [[a]] the horizontal width of the first metal seed layer is greater than a horizontal width of the bump (shown in Fig 1B).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 2-4, 6 is/are rejected under 35 U.S.C. 103 as being unpatentable over Imafuji et al. (US 20170186677 A1)
Regarding Claim 2 – Imafuji teaches the circuit board of claim 1, but fails to disclose wherein the seed layer further includes a third portion vertically overlapping the electroplating layer and not overlapping the bump and the protective layer. However, it would have been obvious to one having ordinary skill in the art at the time the invention was made to modify Imafuji invention by the seed layer further includes a third portion vertically overlapping the electroplating layer and not overlapping the bump and the protective layer. Such a modification would have involved a mere change in the size of the component. A change in size is generally recognized as being within the level of ordinary skill in the art. In re Rose, 105 USPQ 237 (CCPA 1955).
Regarding Claim 3 – Imafuji teaches the circuit board of claim 2, wherein the first portion of the seed layer, the second portion of seed layer, and the third portion of the first metal seed layer are connected to each other (Fig 1B, Imafuji [0030-0034]; all portions are integral parts of single continuous conductive sheet 31).
Regarding Claim 4 – Imafuji teaches the circuit board of claim 2, but fails to disclose wherein a first thickness of the seed is smaller than a second thickness of the [[pad]] electroplating layer, wherein the second thickness of the [[pad]] electroplating layer is smaller than a third thickness of the bump. However, it would have been obvious to one having ordinary skill in the art at the time the invention was made to modify Imafuji invention by a first thickness of the seed is smaller than a second thickness of the [[pad]] electroplating layer, wherein the second thickness of the [[pad]] electroplating layer is smaller than a third thickness of the bump. Such a modification would have involved a mere change in the size of the component. A change in size is generally recognized as being within the level of ordinary skill in the art. In re Rose, 105 USPQ 237 (CCPA 1955).
Regarding Claim 6 – Imafuji teaches the circuit board of claim 3, wherein the second portion of the seed layer is electrically connected to the first portion of the seed layer (Fig 1B, Imafuji [0030-0034]; first and second portion remain part of single continuous conductive sheet 31).
Allowable Subject Matter
Claims 5, 7, 10 objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Claims 11-20 allowed.
The following is an examiner’s statement of reasons for allowance:
The prior art does not teach or suggest a circuit board with “a third portion disposed between the first portion and the second portion, vertically overlapping the electroplating layer and not overlapping the bump and the protective layer, wherein top surfaces of the first portion and the third portion of the seed layer are in contact with the electroplating layer, and a top surface of the second portion of the seed layer is in contact with the protective layer.” for claim 11; in combination with all other features claimed.
Regarding claims 12-20, these claims are allowed based on their dependence on the allowable claim 11 discussed above.
Any comments considered necessary by applicant must be submitted no later than the payment of the issue fee and, to avoid processing delays, should preferably accompany the issue fee. Such submissions should be clearly labeled “Comments on Statement of Reasons for Allowance.”
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to ADITYA SHARMA whose telephone number is (571)270-7246. The examiner can normally be reached Monday - Friday 8:30 - 5:30.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Timothy Thompson can be reached at (571) 272-2342. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/ADITYA SHARMA/Examiner, Art Unit 2847
/TIMOTHY J THOMPSON/Supervisory Patent Examiner, Art Unit 2847