Prosecution Insights
Last updated: October 23, 2026
Application No. 18/657,387

SEMICONDUCTOR STRUCTURE AND METHOD FOR MANUFACTURING THEREOF

Non-Final OA §102§103
Filed
May 07, 2024
Priority
Dec 07, 2023 — CN 202311675693.X
Examiner
GONDARENKO, NATALIA A
Art Unit
2891
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Enkris Semiconductor Inc.
OA Round
1 (Non-Final)
73%
Grant Probability
Favorable
1-2
OA Rounds
0m
Est. Remaining
94%
With Interview

Examiner Intelligence

Grants 73% — above average
73%
Career Allowance Rate
666 granted / 914 resolved
+4.9% vs TC avg
Strong +21% interview lift
Without
With
+20.8%
Interview Lift
resolved cases with interview
Typical timeline
2y 4m
Avg Prosecution
46 currently pending
Career history
964
Total Applications
across all art units

Statute-Specific Performance

§101
0.2%
-39.8% vs TC avg
§103
57.0%
+17.0% vs TC avg
§102
13.9%
-26.1% vs TC avg
§112
26.1%
-13.9% vs TC avg
Black line = Tech Center average estimate • Based on career data from 914 resolved cases

Office Action

§102 §103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Election/Restrictions Applicant’s election without traverse of claims 1-13 in the reply filed on 09/15/2026 is acknowledged. Claims 14-18 are withdrawn from further consideration pursuant to 37 CFR 1.142(b) as being drawn to a nonelected Gorup II invention, there being no allowable generic or linking claim. Election was made without traverse in the reply filed on 09/15/2026. Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claims 1-4 and 6 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by US 2022/0123137 to Zhang et al. (hereinafter Zhang). With respect to claim 1, Zhang discloses a semiconductor structure (e.g., a diode including a semiconductor structure) (Zhang, Figs. 6A-6B, ¶0001, ¶0005-¶0007, ¶0022-¶0033, ¶0047-¶0061) comprising: a substrate (150) (Zhang, Figs. 6A-6B, ¶0022-¶0027) and a multi-channel heterojunction layer (110) which are stacked, the multi-channel heterojunction layer (110) comprising a first layer of heterojunction (111/112), ..., a mth (e.g., second layer) layer of heterojunction (111/112), ..., and a nth layer (e.g., third layer) of heterojunction (111/112), which are disposed away from a direction of the substrate (150), where 1≤m≤n (e.g., m=2), n≥2 (e.g., n=3), and both m and n are integers, and each layer of heterojunction of the multi-channel heterojunction layer comprising a channel layer (e.g., 111, GaN) Zhang, (Figs. 6A-6B, ¶0025) and a barrier layer (e.g., 112, AlGaN); and an anode (620) (Zhang, Figs. 6A-6B, ¶0057) and a cathode (630), wherein the anode (620) is located at an end (e.g., left end) of the multi-channel heterojunction layer (110), and the cathode (630) is located at another end (e.g., right end) of the multi-channel heterojunction layer (110); the anode (620) comprises at least one set of anode fingers (e.g., 621/622/623) Zhang, (Figs. 6A-6B, ¶0048-¶0051, ¶0057), any one set of anode fingers (e.g., 621/622/623) of the at least one set of anode fingers comprises n anode fingers with different lengths in a direction from the substrate (150) to the multi-channel heterojunction layer (110), and the n anode fingers comprise a first anode finger, ..., a mth anode finger, ..., and a nth anode finger, where 1≤m≤n (e.g., m=2), n≥2 (e.g., n=3), and both m and n are integers; and the mth anode finger (e.g., 622) partially penetrates the multi-channel heterojunction layer (e.g., 110, including 2DEG 115/117/119) (Zhang, Figs. 6A-6B, ¶0056) to the mth layer (e.g., 110, including 2DEG 117) of heterojunction (110). Regarding claim 2, Zhang discloses the semiconductor structure according to claim 1. Further, Zhang discloses the semiconductor structure, wherein a bottom surface of the mth anode finger (e.g., 622) is located at any one of following positions in the mth layer of heterojunction (e.g., 110, including 2DEG 117) (Zhang, Figs. 6A-6B, ¶0056-¶0058): in the channel layer (111, GaN). Regarding claim 3, Zhang discloses the semiconductor structure according to claim 1. Further, Zhang discloses the semiconductor structure, wherein along a direction perpendicular to the direction from the substrate (150) to the multi-channel heterojunction layer (110), a width of the mth anode finger (e.g., 622) (Zhang, Figs. 6A-6B, ¶0051) is less than a width of the (m-1)th anode finger (e.g., 623), where 2≤m≤n (e.g., m=2), and both m and n are integers. Regarding claim 4, Zhang discloses the semiconductor structure according to claim 1. Further, Zhang discloses the semiconductor structure, wherein the one set of anode fingers (621/622/623) (Zhang, Figs. 6A-6B, ¶0048-¶0051) are electrically connected to each other. Regarding claim 6, Zhang discloses the semiconductor structure according to claim 1. Further, Zhang discloses the semiconductor structure, wherein all anode fingers (621/622/623) (Zhang, Figs. 6A-6B, ¶0048-¶0051) are electrically connected to each other. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 1-8 and 12-13 are rejected under 35 U.S.C. 103 as being unpatentable over US 2022/0352390 to Zhang et al. (hereinafter Zhang’390) in view of Zhang (2022/0123137). With respect to claim 1, Zhang’390 discloses a semiconductor structure (e.g., a Schottky barrier diode including a semiconductor structure) (Zhang’390, Figs. 1, 2A-2D, 5-12, ¶0001, ¶0003-¶0007, ¶0052-¶0072) comprising: a substrate (102) (Zhang’390, Figs. 1, 2A-2D, 5-12, ¶0052-¶0053) and a multi-channel heterojunction layer (108) which are stacked, the multi-channel heterojunction layer (108) comprising a first layer of heterojunction (AlGaN/GaN), ..., a mth (e.g., second layer) layer of heterojunction (AlGaN/GaN), ..., and a nth layer (e.g., third layer) of heterojunction (AlGaN/GaN), which are disposed away from a direction of the substrate (102), where 1≤m≤n (e.g., m=2), n≥2 (e.g., n=3), and both m and n are integers, and each layer of heterojunction of the multi-channel heterojunction layer comprising a channel layer (e.g., GaN) (Zhang’390, Figs. 1, 2A-2D, 5-12, ¶0053) and a barrier layer (e.g., AlGaN); and an anode (118) (Zhang’390, Figs. 1, 2A-2D, 5-12, ¶0054-¶0057) and a cathode (120), wherein the anode (118) is located at an end (e.g., left end) of the multi-channel heterojunction layer (108), and the cathode (120) is located at another end (e.g., right end) of the multi-channel heterojunction layer (108); the anode (118) comprises at least one set of anode fingers (e.g., portions of the anode layer 118 in the trenches 132) (Zhang’390, Figs. 1, 2A-2D, 5-12, ¶0057), any one set of anode fingers (e.g., portions of the anode layer 118 in the trenches 132) of the at least one set of anode fingers comprises n anode fingers with lengths in a direction from the substrate (102) to the multi-channel heterojunction layer (108), and the n anode fingers comprise a first anode finger, ..., a mth anode finger, ..., and a nth anode finger, where 1≤m≤n (e.g., m=2), n≥2 (e.g., n=3), and both m and n are integers; and the mth anode finger (e.g., the anode layer 118 in the second trench 132) penetrates the multi-channel heterojunction layer (e.g., 108) of heterojunction. Further, Zhang’390 does not specifically disclose that any one set of anode fingers of the at least one set of anode fingers comprises n anode fingers with different lengths in a direction from the substrate to the multi-channel heterojunction layer; and the mth anode finger partially penetrates the multi-channel heterojunction layer to the mth layer of heterojunction. However, Zhang teaches forming a semiconductor structure (e.g., a diode including a semiconductor structure) (Zhang, Figs. 6A-6B, ¶0001, ¶0005-¶0007, ¶0022-¶0033, ¶0047-¶0061) comprising an anode (620) (Zhang, Figs. 6A-6B, ¶0057) that includes at least one set of anode fingers (e.g., 621/622/623) Zhang, (Figs. 6A-6B, ¶0048-¶0051, ¶0057), any one set of anode fingers (e.g., 621/622/623) of the at least one set of anode fingers comprises n anode fingers with different lengths in a direction from the substrate (150) to the multi-channel heterojunction layer (110), and the n anode fingers comprise a first anode finger, ..., a mth anode finger, ..., and a nth anode finger, where 1≤m≤n (e.g., m=2), n≥2 (e.g., n=3), and both m and n are integers; and the mth anode finger (e.g., 622) partially penetrates the multi-channel heterojunction layer (e.g., 110, including 2DEG 115/117/119) (Zhang, Figs. 6A-6B, ¶0056) to the mth layer (e.g., 110, including 2DEG 117) of heterojunction (110), to provide improved distribution of electrons in the 2DEGs having a very high electron mobility, and thus to obtain a multichannel heterostructure device for high-speed electronic applications (Zhang, ¶0001, ¶0004-¶0005, ¶0038, ¶0059). It would have been obvious to a person of ordinary skill in the art before the effective filing date of the invention to modify the semiconductor structure of Zhang ‘390 by forming anode fingers having different lengths as taught by Zhang to have the semiconductor structure, comprising: any one set of anode fingers of the at least one set of anode fingers comprises n anode fingers with different lengths in a direction from the substrate to the multi-channel heterojunction layer; and the mth anode finger partially penetrates the multi-channel heterojunction layer to the mth layer of heterojunction, in order to provide improved distribution of electrons in the 2DEGs having a very high electron mobility, and thus to obtain a multichannel heterostructure device for high-speed electronic applications (Zhang, ¶0001, ¶0004-¶0005, ¶0038, ¶0059). Regarding claim 2, Zhang’390 in view of Zhang discloses the semiconductor structure according to claim 1. Further, Zhang’390 does not specifically disclose the semiconductor structure, wherein a bottom surface of the mth anode finger is located at any one of following positions in the mth layer of heterojunction: in the channel layer, at an interface between the channel layer and the barrier layer, or in the barrier layer. However, Zhang teaches the semiconductor structure, wherein a bottom surface of the mth anode finger (e.g., 622) is located at any one of following positions in the mth layer of heterojunction (e.g., 110, including 2DEG 117) (Zhang, Figs. 6A-6B, ¶0056-¶0058): in the channel layer (111, GaN). It would have been obvious to a person of ordinary skill in the art before the effective filing date of the invention to modify the semiconductor structure of Zhang ‘390/Zhang by forming anode fingers having different lengths as taught by Zhang to have the semiconductor structure, wherein a bottom surface of the mth anode finger is located at any one of following positions in the mth layer of heterojunction: in the channel layer, in order to provide improved distribution of electrons in the 2DEGs having a very high electron mobility, and thus to obtain a multichannel heterostructure device for high-speed electronic applications (Zhang, ¶0001, ¶0004-¶0005, ¶0038, ¶0059). Regarding claim 3, Zhang’390 in view of Zhang discloses the semiconductor structure according to claim 1. Further, Zhang’390 does not specifically disclose the semiconductor structure, wherein along a direction perpendicular to the direction from the substrate to the multi-channel heterojunction layer, a width of the mth anode finger is less than a width of the (m-1)th anode finger, where 2≤m≤n (e.g., m=2), and both m and n are integers. However, Zhang teaches the semiconductor structure, wherein along a direction perpendicular to the direction from the substrate (150) to the multi-channel heterojunction layer (110), a width of the mth anode finger (e.g., 622) (Zhang, Figs. 6A-6B, ¶0051) is less than a width of the (m-1)th anode finger (e.g., 623), where 2≤m≤n (e.g., m=2), and both m and n are integers. It would have been obvious to a person of ordinary skill in the art before the effective filing date of the invention to modify the semiconductor structure of Zhang ‘390/Zhang by forming anode fingers having different lengths as taught by Zhang to have the semiconductor structure, wherein along a direction perpendicular to the direction from the substrate to the multi-channel heterojunction layer, a width of the mth anode finger is less than a width of the (m-1)th anode finger, where 2≤m≤n (e.g., m=2), and both m and n are integers, in order to provide improved distribution of electrons in the 2DEGs having a very high electron mobility, and thus to obtain a multichannel heterostructure device for high-speed electronic applications (Zhang, ¶0001, ¶0004-¶0005, ¶0038, ¶0059). Regarding claim 4, Zhang’390 in view of Zhang discloses the semiconductor structure according to claim 1. Further, Zhang’390discloses the semiconductor structure, wherein the one set of anode fingers (e.g., portions of the anode layer 118 in the trenches 132) (Zhang’390, Figs. 1, 2A-2D, 5-12, ¶0057) are electrically connected to each other. Regarding claim 5, Zhang’390 in view of Zhang discloses the semiconductor structure according to claim 1. Further, Zhang’390 does not specifically disclose the semiconductor structure, wherein when the at least one set of anode fingers comprises a plurality sets of anode fingers, a plurality of first anode fingers of the plurality sets of anode fingers are electrically connected to each other, ..., a plurality of mth anode fingers of the plurality sets of anode fingers are electrically connected to each other, ..., and a plurality of nth anode fingers of the plurality sets of anode fingers are electrically connected to each other. However, Zhang’390 teaches that forming a plurality of contacts between the anode and the semiconductor channel layers allows migration of the peak electric field away from the Schottky contact, and to reduce the leakage current of the SBD device, and thus to obtain the reliable SBD device able to sustain high electric fields during operation (Zhang’390, ¶0050-¶0052). Further, Zhang teaches that a plurality of anode fingers includes 2 to 10 fingers (Zhang, Figs. 6A-6B, ¶0049, ¶0057), and the number of conductive fingers is associated with the number of interfaces between the semiconductor material layers (111/112). It would have been obvious to a person of ordinary skill in the art before the effective filing date of the invention to modify the semiconductor structure of Zhang‘390/Zhang by forming a plurality of 2DEG layers and anode fingers having pluralities of anode fingers having different lengths as taught by Zhang to have the semiconductor structure, wherein when the at least one set of anode fingers comprises a plurality sets of anode fingers, a plurality of first anode fingers of the plurality sets of anode fingers are electrically connected to each other, ..., a plurality of mth anode fingers of the plurality sets of anode fingers are electrically connected to each other, ..., and a plurality of nth anode fingers of the plurality sets of anode fingers are electrically connected to each other, in order to provide improved distribution of electrons in the 2DEGs having a very high electron mobility to reduce the leakage current of the SBD device, and thus to obtain the reliable SBD device able to sustain high electric fields during operation; and to obtain a multichannel heterostructure device for high-speed electronic applications (Zhang’390, ¶0050-¶0052; Zhang, ¶0001, ¶0004-¶0005, ¶0038, ¶0059). Regarding claim 6, Zhang’390 in view of Zhang discloses the semiconductor structure according to claim 1. Further, Zhang’390 discloses the semiconductor structure, wherein all anode fingers (e.g., portions of the anode layer 118 in the trenches 132) (Zhang’390, Figs. 1, 2A-2D, 5-12, ¶0057) are electrically connected to each other Regarding claim 7, Zhang’390 in view of Zhang discloses the semiconductor structure according to claim 1. Further, Zhang’390 discloses the semiconductor structure, further comprising: a plurality of first P-type regions (e.g., p-GaN layers 504 on sidewalls 134 within the trenches 132 including anode fingers) (Zhang’390, Figs. 1, 5-6, ¶0065-¶0066) disposed at intervals and located at an end of the multi-channel heterojunction layer (108), wherein each of the plurality of first P-type regions (504) extends towards the substrate (102) from a surface of a side, away from the substrate, of the multi-channel heterojunction layer (108), and a bottom surface of at least one of the plurality of first P-type regions (504) is located in the channel layer (e.g., the first 2DEG formed by the first GaN channel layer 106 and the first AlGaN layer of the heterostructure layer 108) of the first layer of heterojunction. Regarding claim 8, Zhang’390 in view of Zhang discloses the semiconductor structure according to claim 7. Further, Zhang’390 discloses the semiconductor structure, wherein at least one first P-type region (504) (Zhang’390, Figs. 1, 5-6, ¶0065-¶0066) is disposed between adjacent two sets of anode fingers (e.g., the trenches 132 includes anode fingers on sidewalls 134 covered with the P-type regions 504). Regarding claim 12, Zhang’390 in view of Zhang discloses the semiconductor structure according to claim 7. Further, Zhang’390 discloses the semiconductor structure, further comprising a second P-type layer (e.g., p-GaN layers 504 on another sidewall 134 within the trench 132 including anode fingers) (Zhang’390, Figs. 1, 5-6, ¶0065-¶0066) which is both located on the multi-channel heterojunction layer and the plurality of first P-type regions (e.g., p-GaN layers 504 on one sidewall 134 within the trench 132 including anode fingers), wherein the second P-type layer is connected (e.g., horizontal portion of the p-GaN layer 504 between the p-GaN layers 504 on sidewalls 134 within the trench 132) to the plurality of first P-type regions. Regarding claim 13, Zhang’390 in view of Zhang discloses the semiconductor structure according to claim 7. Further, Zhang’390 discloses the semiconductor structure, wherein along a direction from the anode (118) to the cathode (120), a length of the second P-type layer (504) (Zhang’390, Figs. 1, 5-6, ¶0065-¶0066) is equal to a length of each of the plurality of first P-type regions (504). Claim 9 is rejected under 35 U.S.C. 103 as being unpatentable over US 2022/0352390 to Zhang’390 in view of Zhang (2022/0123137) as applied to claim 7, and further in view of Kaneko et al. (US 2016/0035853, hereinafter Kaneko). Regarding claim 9, Zhang’390 in view of Zhang discloses the semiconductor structure according to claim 7. Further, Zhang’390 does not specifically disclose the semiconductor structure, wherein one first P-type region is disposed between each of at least two pairs of adjacent anode fingers of the one set of anode fingers. However, Kaneko teaches forming a diode comprising an anode electrode (137/136) (Kaneko, Fig. 24, ¶0274-¶0281) and a cathode electrode (133/134), wherein the anode electrode has a second anode electrode (153) comprised of p-GaN layer (Kaneko, Fig. 24, ¶0276) and the cathode electrode (133/134) has a second cathode portion (135). Further, Kaneko teaches forming the second cathode portion (240) (Kaneko, Figs. 23D-23E, 23F-23G, ¶0268-¶0273) as an island shape between portions of the cathode electrodes (230/134) to increase current that flows into the cathode electrode (230), and forming the second electrode (250) in a comb shape, to prevent current collapse. It would have been obvious to a person of ordinary skill in the art before the effective filing date of the invention to modify the semiconductor structure of Zhang‘390/Zhang by forming a second anode electrode comprised of p-GaN layer as taught by Kaneko, wherein the second anode electrode is formed as a plurality of islands between the anode fingers of the anode electrode formed in a comb shape to have the semiconductor structure, wherein one first P-type region is disposed between each of at least two pairs of adjacent anode fingers of the one set of anode fingers, in order to increase current that flows from the anode electrode into the cathode electrode, and to prevent current collapse of a nitride semiconductor diode device (Kaneko, ¶0016, ¶0270, ¶0273, ¶0277). Claims 10-11 are rejected under 35 U.S.C. 103 as being unpatentable over US 2022/0352390 to Zhang’390 in view of Zhang (2022/0123137) as applied to claim 7, and further in view of Shibata (US 2013/0105815). Regarding claim 10, Zhang’390 in view of Zhang discloses the semiconductor structure according to claim 7. Further, Zhang’390 does not specifically disclose the semiconductor structure, wherein along a direction from the anode to the cathode, a length of each of the plurality of first P-type regions is uniformly increased or increased in a step-shape in a direction away from the substrate. However, Shibata teaches forming a nitride semiconductor diode device (Shibata, Figs. 2, 7, ¶0005-¶0018, ¶0028-¶0042) comprising a P-type anode region (143) (Shibata, Fig. 7, ¶0033, ¶0040-¶0042) formed in a recess of the heterostructure (121/122) that is increased in a step-shape in a direction away from the substrate (101), to provide improved nitride semiconductor diode device with reduced reverse leakage current, low on resistance, and adjusted forward threshold voltage (Shibata, ¶0005-¶0018, ¶0032-¶0033, ¶0041, ¶0044). It would have been obvious to a person of ordinary skill in the art before the effective filing date of the invention to modify the semiconductor structure of Zhang‘390/Zhang by forming an anode electrode comprising p-type layer in a recess of the heterostructure as taught by Shibata to have the semiconductor structure, wherein along a direction from the anode to the cathode, a length of each of the plurality of first P-type regions is increased in a step-shape in a direction away from the substrate, in order to provide improved nitride semiconductor diode device with reduced reverse leakage current, low on resistance, and adjusted forward threshold voltage (Shibata, ¶0005-¶0018, ¶0032-¶0033, ¶0041, ¶0044). Regarding claim 11, Zhang’390 in view of Zhang discloses the semiconductor structure according to claim 7. Further, Zhang’390 does not specifically disclose the semiconductor structure, wherein along a direction from an anode finger to another anode finger, a length of each of the plurality of first P-type regions is uniformly increased or increased in a step-shape in a direction away from the substrate. However, Zhang’390 teaches forming P-type regions (504) (Zhang’390, Figs. 1, 5-6, ¶0065-¶0066) along a direction from an anode finger (e.g., portion of the anode layer 118 in the trench 132) to another anode finger (e.g., another portion of the anode layer 118 in the trench 132), to form a depletion region within the heterostructure (108), and to move the peak electric field away from the Schottky contact, and to reduce the leakage current of the SBD device, and thus to obtain the reliable SBD device able to sustain high electric fields during operation (Zhang’390, ¶0050-¶0052, ¶0060). Further, Shibata teaches forming a nitride semiconductor diode device (Shibata, Figs. 2, 7, ¶0005-¶0018, ¶0028-¶0042) comprising a P-type anode region (143) (Shibata, Fig. 7, ¶0033, ¶0040-¶0042) formed in a recess of the heterostructure (121/122) that is increased in a step-shape in a direction away from the substrate (101), to provide improved nitride semiconductor diode device with reduced reverse leakage current, low on resistance, and adjusted forward threshold voltage (Shibata, ¶0005-¶0018, ¶0032-¶0033, ¶0041, ¶0044). It would have been obvious to a person of ordinary skill in the art before the effective filing date of the invention to modify the semiconductor structure of Zhang‘390/Zhang by forming an anode electrode comprising p-type layer in a recess of the heterostructure as taught by Shibata, wherein the p-type anode layer is formed between the anode fingers as taught by Zhang’390 to have the semiconductor structure, wherein along a direction from an anode finger to another anode finger, a length of each of the plurality of first P-type regions is increased in a step-shape in a direction away from the substrate, in order to move the peak electric field away from the Schottky contact, and to reduce the leakage current of the SBD device, and thus to obtain the reliable SBD device able to sustain high electric fields during operation; and to provide improved nitride semiconductor diode device with reduced reverse leakage current, low on resistance, and adjusted forward threshold voltage (Zhang’390, ¶0050-¶0052, ¶0060; Shibata, ¶0005-¶0018, ¶0032-¶0033, ¶0041, ¶0044). Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to NATALIA GONDARENKO whose telephone number is (571)272-2284. The examiner can normally be reached 9:30 AM-7:30 PM. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Matthew Landau can be reached at 571-272-1731. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /NATALIA A GONDARENKO/ Primary Examiner, Art Unit 2891
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Prosecution Timeline

May 07, 2024
Application Filed
Oct 01, 2026
Non-Final Rejection mailed — §102, §103 (current)

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