DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-20 are rejected under 35 U.S.C. 103 as being unpatentable over Summa et al. (U.S. Patent Application Publication Number 2024/0094751) and Marchya et al. (U.S. Patent Application Publication Number 2017/0338661).
Regarding Claim 1, Summa discloses a method for control loop sub-system voltage management, the method comprising:
detecting a desired operating voltage in a predetermined voltage range (paragraph 0066; i.e., the controller 254 transmits a signal [paragraph 0033 - the desired operating voltage] that causes the current source 252 to output a particular control current ICTR [Figure 2], which has a known linear relationship with the internal supply voltage/operating voltage from voltage regulator 204.1; the operating voltage must be within a predetermined voltage range of 1.2-1.75 V as shown in Figure 4, item 402 and paragraphs 0061-0062);
setting a current sink/source drive (Figure 2, item 252, paragraph 0029) of a system-on-chip (SoC) (Figure 2, item 202, paragraph 0023; i.e., the reference does not appear to state that the current sink/source drive 252 is a part of the SoC 202, however it would have been obvious to one of ordinary skill in the art to have done so for the purpose of providing a faster interconnect between the devices; further, it has been held that that the use of a one piece construction instead of the structure disclosed in the prior art would be merely a matter of obvious engineering choice - In re Larson, 340 F.2d 965, 968, 144 USPQ 347, 349 (CCPA 1965)) according to the desired operating voltage (paragraphs 0033 and 0066); and
adjusting an output voltage (Figure 2, “Internal Supply Voltage”) of a voltage regulator (Figure 2, item 204.1, paragraph 0025) through a voltage regulator feedback path (Figure 2, see connections between items 204.1, 206, and 250) between the voltage regulator and the current sink/source drive of the SoC (paragraphs 0023 and 0032-0033; i.e., the connections between items 204.1, 206, and 250 [“voltage regulator feedback path”] are used to sink or source a control current ICTR from the current source 252 in order adjust the output voltage of voltage regulator 204.1; the output voltage of the voltage regulator 204.1 is adjusted “through the voltage regulator feedback path” because that is the path that receives the control current ICTR).
Summa does not expressly disclose wherein the desired operating voltage is in the form of a requested dynamic clock voltage scaling (DCVS) operating voltage.
In the same field of endeavor (e.g., voltage adjustment techniques), Marchya teaches wherein the desired operating voltage is in the form of a requested dynamic clock voltage scaling (DCVS) operating voltage (abstract, paragraph 0026).
Accordingly, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have combined Marchya’s teachings of voltage adjustment techniques with the teachings of Summa, for the purpose of allowing the current source/sink drive to reject a requested operating voltage if it deems is unsafe (e.g., if the requested operating voltage could cause the voltage regulator to fail).
Regarding Claim 2, Summa discloses in which setting comprises drawing a sink current from the voltage regulator feedback path between the voltage regulator and the current sink/source drive of the SoC to increase the output voltage (paragraph 0047).
Regarding Claim 3, Summa discloses in which setting comprises driving a source current through the voltage regulator feedback path between the voltage regulator and the current sink/source drive of the SoC to decrease the output voltage (paragraph 0047).
Regarding Claim 4, Summa discloses in which adjusting the output voltage comprises controlling a feedback voltage on the voltage regulator feedback path (Figure 2, paragraphs 0024 and 0028; i.e., the resistor voltage divider R1 and R2 [Figure 3A] must be the component that ultimately provides the supply voltage to the IC sub-circuitry 210, which must occur via at least part of the equated “voltage regulator feedback path” since the resistor voltage divider R1 and R2 is the component that connects to multiplexer 206, which then connects to the IC sub-circuitry 210) to scale the output voltage (paragraphs 0023 and 0032-0033; i.e., the connections between items 204.1, 206, and 250 [“voltage regulator feedback path”] are used to sink or source a control current ICTR from the current source 252 in order adjust the voltage of voltage regulator 204.1).
Regarding Claim 5, Summa discloses in which controlling the feedback voltage comprises dynamically adjusting a resistor voltage divider on the voltage regulator feedback path (Figure 3A, items R1 and R2, paragraph 0041).
Regarding Claim 6, Summa discloses in which dynamically adjusting comprises driving a sink/source current to/from the resistor voltage divider to tune the output voltage (paragraphs 0023 and 0032-0033; i.e., the connections between items 204.1, 206, and 250 [“voltage regulator feedback path”] are used to sink or source a control current ICTR from the current source 252 in order adjust the voltage of voltage regulator 204.1).
Regarding Claim 7, Summa discloses in which the resistor voltage divider is integrated with the SoC (Figure 3A, items R1 and R2).
Regarding Claim 8, Summa discloses in which the resistor voltage divider is integrated with the voltage regulator (Figure 3A, items R1 and R2).
Regarding Claim 9, Summa discloses in which the current sink/source drive is controlled by sub-systems (SS) of the SoC (Figure 2, item 254, paragraphs 0033-0034; i.e., it would have been obvious to one of ordinary skill in the art to have included the controller 254 [“sub-systems”] with the SoC 202 for the reasons given above).
Regarding Claim 10, Summa discloses in which the current sink/source drive is controlled by a voltage regulator module of the SoC (Figure 2, item 254, paragraphs 0033-0034; i.e., it would have been obvious to one of ordinary skill in the art to have included the controller 254 [“voltage regulator module”] with the SoC 202 for the reasons given above).
Regarding Claim 11, Summa discloses a control loop sub-system voltage management system comprising:
a system-on-chip (SoC) (Figure 2, item 202, paragraph 0023) comprising a current sink/source drive (Figure 2, item 252, paragraph 0029; i.e., the reference does not appear to state that the current sink/source drive 252 is a part of the SoC 202, however it would have been obvious to one of ordinary skill in the art to have done so for the purpose of providing a faster interconnect between the devices; further, it has been held that that the use of a one piece construction instead of the structure disclosed in the prior art would be merely a matter of obvious engineering choice - In re Larson, 340 F.2d 965, 968, 144 USPQ 347, 349 (CCPA 1965)) operable according to a desired operating voltage in a predetermined voltage range (paragraph 0066; i.e., the controller 254 transmits a signal [paragraph 0033 - the desired operating voltage] that causes the current source 252 to output a particular control current ICTR [Figure 2], which has a known linear relationship with the internal supply voltage from voltage regulator 204.1; the operating voltage must be within a predetermined voltage range of 1.2-1.75 V as shown in Figure 4, item 402 and paragraphs 0061-0062);
a voltage regulator (Figure 2, item 204.1, paragraph 0025); and
a voltage regulator feedback path (Figure 2, see connections between items 204.1, 206, and 250) between the voltage regulator and the current sink/source drive of the SoC to adjust an output voltage of the voltage regulator (paragraphs 0023 and 0032-0033; i.e., the connections between items 204.1, 206, and 250 [“voltage regulator feedback path”] are used to sink or source a control current ICTR from the current source 252 in order adjust the voltage of voltage regulator 204.1; the output voltage of the voltage regulator 204.1 is adjusted using the “voltage regulator feedback path” because that is the path that receives the control current ICTR).
Summa does not expressly disclose wherein the desired operating voltage is in the form of a requested dynamic clock voltage scaling (DCVS) operating voltage.
In the same field of endeavor, Marchya teaches wherein the desired operating voltage is in the form of a requested dynamic clock voltage scaling (DCVS) operating voltage (abstract, paragraph 0026).
The motivation discussed above with regards to Claim 1 applies equally as well to Claim 11.
Regarding Claim 12, Summa discloses in which the current sink/source drive is further operable to draw a sink current from the voltage regulator feedback path between the voltage regulator and the current sink/source drive of the SoC to increase the output voltage (paragraph 0047).
Regarding Claim 13, Summa discloses in which the current sink/source drive is further operable to drive a source current through the voltage regulator feedback path between the voltage regulator and the current sink/source drive of the SoC to decrease the output voltage (paragraph 0047).
Regarding Claim 14, Summa discloses a resistor voltage divider coupled between the voltage regulator feedback path and the output voltage (Figure 3A, items R1 and R2, paragraph 0041).
Regarding Claim 15, Summa discloses in which the resistor voltage divider is configured to control a feedback voltage on the voltage regulator feedback path (Figure 2, paragraphs 0024 and 0028; i.e., the resistor voltage divider R1 and R2 [Figure 3A] must be the component that ultimately provides the supply voltage to the IC sub-circuitry 210, which must occur via at least part of the equated “voltage regulator feedback path” since the resistor voltage divider R1 and R2 is the component that connects to multiplexer 206, which then connects to the IC sub-circuitry 210) and scale the output voltage (paragraphs 0023 and 0032-0033; i.e., the connections between items 204.1, 206, and 250 [“voltage regulator feedback path”] are used to sink or source a control current ICTR from the current source 252 in order adjust the voltage of voltage regulator 204.1).
Regarding Claim 16, Summa discloses in which the current sink/source drive is further operable to drive a sink/source current to/from the resistor voltage divider to tune the output voltage (paragraphs 0023 and 0032-0033; i.e., the connections between items 204.1, 206, and 250 [“voltage regulator feedback path”] are used to sink or source a control current ICTR from the current source 252 in order adjust the voltage of voltage regulator 204.1).
Regarding Claim 17, Summa discloses in which the resistor voltage divider is integrated with the SoC (Figure 3A, items R1 and R2).
Regarding Claim 18, Summa discloses in which the resistor voltage divider is integrated with the voltage regulator (Figure 3A, items R1 and R2).
Regarding Claim 19, Summa discloses in which the SoC further comprises sub-systems (SS) operable to control the current sink/source drive (Figure 2, item 254, paragraphs 0033-0034; i.e., it would have been obvious to one of ordinary skill in the art to have included the controller 254 [“sub-systems”] with the SoC 202 for the reasons given above).
Regarding Claim 20, Summa discloses in which the SoC further comprises a voltage regulator module operable to control the current sink/source drive (Figure 2, item 254, paragraphs 0033-0034; i.e., it would have been obvious to one of ordinary skill in the art to have included the controller 254 [“voltage regulator module”] with the SoC 202 for the reasons given above).
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure because each reference discloses a method for providing a control loop for a voltage regulator.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to FAISAL M ZAMAN whose telephone number is (571)272-6495. The examiner can normally be reached Monday - Friday, 8 am - 5 pm, alternate Fridays.
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/FAISAL M ZAMAN/ Primary Examiner, Art Unit 2175