DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
Claims 1-20 are rejected under 35 U.S.C. 112(b) as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor regards as the invention.
“Signal and noise characteristics.” Indefinite as recited: no antecedent parameters (e.g., histogram binning rule, sigma/mean/BER), no measurement window, and no definition of “noise.”
“Margin of read disturb.” Undefined metric (e.g., delta-Vth budget, BER drift per read, remaining safe cycles).
“Predictive model trained using a machine learning technique.” Functional result with no model class, features, or training corpus—pure black box.
“Plurality of counts determined at a plurality of test voltages.” Missing sampling size and acquisition timing can render the scope ambiguous for enablement of robust margin claims.
Double Patenting
The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969).
A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP § 2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b).
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Claims 1-20 are rejected on the ground of nonstatutory double patenting as being unpatentable over claims 1-20 of U.S. Patent No US 11,205,495 (“PAT 1”) and U.S. Patent No 11,984,172 B2 (“PAT 2”).
Regarding Independent Claim 1.
The ’495 patent (“PAT 1”) claims a memory device with adaptive read-voltage calibration that determines a read-threshold voltage based on distributions of sense-amplifier output counts acquired at multiple test voltages, to compensate for signal and noise variations of multi-level memory cells (see col. 4–8; Figs. 3–5).
The instant independent claim 1 recites: a logic circuit determining, based on signal/noise characteristics of the cells, both (i) the voltage to read the memory cells and (ii) a “margin of read disturb.”
The ’495 patent expressly determines read-voltage settings from distributions of cell responses (the same process as “signal/noise characteristics”). The only nominal distinction is that the current claim labels one output “read-disturb margin.” In the parent, the equivalent parameter is “read-margin value” or “sense-margin,” derived from identical data. The physical behavior and computational process are the same.
Therefore, claim 1 is not patentably distinct from claim 1 of US 11,205,495 B2; it represents an obvious variation using synonymous terminology. The claim is rejected under obvious-type double-patenting over US 11,205,495 B2.
Regarding Independent Claim 12 (method: determine read voltage and margin)
U.S. Patent No 11,984,172 B2 (“PAT 2”) teaches a method of adaptive read-voltage selection involving programming, test reads at multiple voltages, collecting counts, and calculating both an operating voltage and reliability margin (col. 5 l. 30 – col. 9 l. 15; Figs. 2–4).
Claim 12 restates that process: determine a read voltage and a “margin of read disturb” from signal/noise characteristics.
The method steps—program → test-read → analyze counts → choose Vr → compute margin—mirror those of the ’172 patent. Any distinction (e.g., calling the analysis a “predictive model”) is a trivial modernization of the same computation.
Claim 12 is therefore rejected on the ground of non-statutory double-patenting as an obvious variant of claims 6–10 of US 11,984,172 B2.
Regarding Independent Claim 18 ( (apparatus: processing device + on-package memory determining read voltage & margin)
The ’495 patent describes a memory system wherein a controller and memory package cooperate to perform read-voltage calibration and reliability estimation (see Fig. 1 and col. 9–10).
Claim 18 recites exactly that: a processing device coupled to an on-package memory containing calibration logic to determine the read voltage and margin, then decide on mitigation.
The only variance is explicit inclusion of an ML-based “predictive model,” which is functionally equivalent to the empirical regression model of the ’495 parent. No new hardware or non-obvious algorithmic distinction is presented.
Claim 18 is not patentably distinct from the system claims of US 11,205,495 B2 and US 11,984,172 B2; it merely integrates the same logic in an on-package arrangement.
As for Dependent Claims : All dependent claims (2–11, 13–17, 19–20) recite details already taught or inherent in the parent patents—e.g., histogram-based calibration, read-verify refresh, predictive drift estimation, and on-package implementation—and are therefore likewise not patentably distinct.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-20, as best understood (see the 112(b) rejection above), are rejected under 35 U.S.C. 103 as being unpatentable over Lin et a. (US 11688436) in view of Su (US 12112825 and US12094562), and further in view of Stansfield (US 9406351) and Liu (US 11862233).
Per MPEP 2111 and 2111.01, the claims are given their broadest reasonable interpretation and the words of the claims are given their plain meaning consistent with the specification without importing claim limitations from the specification.
(Note on references used: Su ’825 (multi-phase read/verify; reference & read-threshold stepping; counts/histograms), Su ’562 (verify/read bias timing and characterization), Lin ’436 (offset calibration, test-voltage stepping and histogram-based threshold selection), Liu ’233 (mismatch/cycle-dependent drift estimation and remaining-life prediction logic), Stansfield ’351 (sensor-aided bias/read-disturb management)).
Regarding Independent Claim 1 (Device: choose read voltage + read-disturb margin from signal/noise statistics)
Lin ’436 teaches sweeping test read voltages across a population, counting cells that resolve to a given state at each voltage (forming a histogram), and selecting a read threshold from those statistics to maximize margin / minimize mismatch (col. describing multi-step setup and statistical selection). Lin explicitly addresses PVT/offset and uses counts to set/trim the operative Vr.
Lin does not explicitly brand the second output as “a margin of read disturb” (though it discloses stability/mismatch margins).
Su ’825 and Su ’562 teach test-voltage characterization sequences to derive verify/read settings and discuss disturb sensitivity under different Vr choices.
Liu ’233 teaches drift/aging prediction and using statistics to estimate remaining error margin/remaining life.
Stansfield ’351 supplies sensor-informed bias to reduce disturb risk. Collectively, they teach (i) the same data acquisition (counts per Vr), (ii) calculating margin metrics tied to disturb risk, and (iii) using that margin to guide operation.
Given Lin’s histogram-based read-threshold selection, it is a predictable extension to compute an associated “read-disturb margin” from the same statistics (e.g., slope/overlap of distributions or projected BER drift) as taught by Su/Liu/Stansfield. Engineers routinely derive both threshold and margin from a single characterization sweep to optimize reliability; thus claim 1 is an obvious aggregation of known elements yielding expected benefits.
Claim 1 is rejected under §103 as obvious over Lin ’436 in view of Su ’825 / Su ’562, further in view of Liu ’233 and Stansfield ’351.
As for Dependents 2–11 (Mitigation action; package integration; counts; count-difference distribution; predictive model; MLC; refresh; remaining cycles; shift-based margin)
• Claim 2 (perform mitigation based on margin): Su ’825/’562 teach invoking refresh / re-program / re-verify when margin falls below a threshold. Obvious to trigger action when computed margin indicates risk.
• Claim 3 (IC package encloses memory + logic): Common SoC/SiP packaging. Routine.
• Claim 4 (calibration circuit measures counts at multiple Vr): Lin ’436 explicitly teaches test voltage sweep and counts/histograms with on-chip calibration logic; Su corroborates verify/test sweeps. Obvious.
• Claim 5 (compute read voltage from distribution of count difference over Vr): Lin’s histogram H(Vr) implies ΔH = H(Vi+1) – H(Vi); using the discrete derivative (count difference) to find edges/optimal Vr is a textbook extension to histogram edge detection. Obvious implementation detail.
• Claim 6 (margin via predictive model input = distribution of count difference): Lin/Su establish the features (histogram/Δ histogram). Substituting a predictive model to map features → margin is an expected, routine analytics substitution (see Liu’s use of statistics to predict drift/remaining life); obvious.
• Claim 7 (ML-trained model): Replacing an analytical predictor with an ML model trained on the same features is a routine optimization. No new circuit structure; obvious to use ML where relationships are nonlinear.
• Claim 8 (MLC; choose lowest-level read voltage): Choosing the lowest boundary in MLC read-levels to minimize disturb is a standard conservative policy taught/suggested by Su ’562 (read bias selection order); obvious.
• Claim 9 (mitigation = read-then-rewrite): Classic refresh to heal read-disturb; well-known in NAND/PCM; Su/industry practice.
• Claim 10 (predict remaining read cycles): Liu ’233 expressly teaches remaining-life / cycles-to-failure estimation from drift/mismatch metrics; obvious.
• Claim 11 (margin from amount of shift in read voltage): Lin ’436’s re-trim amount ΔVr is a direct margin proxy; obvious.
Thus, Claims 2–11: §103 over Lin ’436 with Su ’825/’562, further in view of Liu ’233 (predictive/remaining life) and Stansfield ’351 (sensor-aware bias).
Regarding Independent Claim 12 (Method: program thresholds; determine read
Lin ’436 / Su ’562. Program cells, sweep test Vr, compute counts, pick read voltage.
Lin does not disclose “margin of read disturb” named explicitly.
Liu ’233 / Stansfield ’351. Use statistics to estimate disturb margin / remaining life, optionally sensor-informed.
The motivation to combine is same data → two outputs (Vr and margin) is routine: the sweep’s histogram/Δhist provide both an operating point and a robustness measure.
Claim 12 is obvious over Lin ’436 + Su ’562, in view of Liu ’233 (margin prediction).
As for Dependents 13-17 13–17 (decide mitigation; package; ML; shift-based margin; refresh + remaining cycles)
• Claim 13: Deciding whether to mitigate based on margin is standard thresholding; obvious.
• Claim 14: On-package calibration circuit measuring counts; taught by Lin/Su.
• Claim 15: Margin via ML on the measured features; routine substitution; obvious.
• Claim 16: Margin via Δ read-voltage shift; inherent in Lin’s trim/offset model.
• Claim 17: Refresh + remaining cycles prediction; Liu ’233; obvious.
Thus, Claims 13–17: §103 over Lin ’436 + Su ’562, in view of Liu ’233.
Regarding Independent Claim 18 (Apparatus: processing device + on-package memory device; calibration circuit; logic outputs read voltage & disturb margin; decide mitigation)
Su ’562 / Lin ’436. On-package controller + memory; calibration circuits that run test-voltage characterization and compute operating points.The combination does not teach “disturb margin” explicitly as a separate value.
Liu ’233. Uses the same characterization statistics to compute margin / remaining cycles and drive decisions (e.g., refresh).
Architectures routinely co-locate calibration + decision logic inside the memory package for latency and reliability; producing both Vr and margin from the same dataset is predictable and advantageous.
Claim 18 is obvious over Su ’562 / Lin ’436 in view of Liu ’233.
As for Dependents 19–20 (remaining cycles; refresh)
• Claim 19: Remaining read-cycles prediction—Liu ’233.
• Claim 20: Mitigation by read-then-rewrite—Su ’825/’562; industry-standard refresh.
Thus, Claims 19–20: §103 over Liu ’233 with Su ’825/’562.
Response to Arguments
Applicant's arguments filed have been fully considered but they are not persuasive.
With respect to the rejections under 35 U.S.C. 112, Applicant has failed to adequately respond. Applicant copy and pasted the Examiner’s rejection, calls them lacking specificity even though the Examiner has quoted the claims and does not address any of the raised concerns.
With respect to the prior art rejections, Applicant merely outlines the prior art structure and function without directly addressing any of the mapping or combinations made therewith.
The rejections are deemed proper.
Conclusion
THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to DOUGLAS KING whose telephone number is (571)272-2311. The examiner can normally be reached M-F: 9:00AM-5:30PM.
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/DOUGLAS KING/Primary Examiner, Art Unit 2824
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