DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Priority
Receipt is acknowledged of certified copies of papers required by 37 CFR 1.55.
Information Disclosure Statement
The information disclosure statement (IDS) submitted on 1/13/25 is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claim(s) 1-3, and 6-16 are rejected under 35 U.S.C. 102(a)(1)/(a)(2) as being anticipated by Leman et al. (US 2016/0241172).
Regarding claim 1,
Leman discloses (fig. 2):
A motor driver (fig. 2) improving resonance noise caused by a motor (fan), including: a duty cycle determination circuit (Fig. 6, 602) configured to set a lower limit duty cycle (Figs, 14 and 15, boundary line 141, ¶0146 ) and an upper limit duty cycle (142) of a duty cycle threshold range (¶0168-¶0170), and determine that when a duty cycle of each of a plurality of waveforms of a duty cycle input signal (DCin, Fig. 14, shows multiple waveforms, ¶0168-¶0170) falls within the duty cycle threshold range (from 141 to 142), the motor driver adjusts the duty cycle of each of the plurality of waveforms of the duty cycle input signal (DCin) generated within a specified time to make duty cycles of at least two of the plurality of waveforms of the duty cycle input signal different from each other (Shown in Fig. 15, takes segments of different curves from 14 and combines them at certain times to make them different and change the curve to stay in the boundaries, ¶0168-¶0170), and outputs a duty cycle output signal (Fig. 6, output from 602) according to an adjusted duty cycle input signal (from DCin, adjusted in 602, ¶0125, ¶0168-¶0170); and a motor driver circuit (604) connected to the duty cycle determination circuit (602) and a motor (690, ¶0125), and configured to output a motor drive signal (output from 604, PWM output, ¶0149) to the motor (690) according to the duty cycle output signal (output from 602) received from the duty cycle determination circuit (602) to drive the motor (690, ¶0149).
Regarding claim 2,
Leman discloses (fig. 6):
wherein the motor driver circuit includes: a control circuit (Fig. 6, also 604), connected to the duty cycle determination circuit (602) and configured to output a control signal according to the duty cycle output signal received from the duty cycle determination circuit (602, ¶0125); a driver circuit (also 604), connected to the control circuit (part of 604) and configured to output a drive signal according to the control signal received from the control circuit (¶0149); and an output stage circuit (not shown, part of 604), connected to the driver circuit and the motor (690) and configured to operate according to the drive signal received from the driver circuit to output the motor drive signal to the motor (¶0149).
Regarding claim 3,
Leman discloses (fig. 6):
wherein the motor driver circuit (604) further includes: a rotor position detection circuit (605) provided on the motor (690, ¶0150), connected to the control circuit and configured to detect a position of a rotor of the motor to output a rotor position detection signal (input to 600), wherein the control circuit control circuit outputs the control signal according to the rotor position detection signal and the duty cycle output signal received from the rotor position detection circuit (outputs signal to 602 which then outputs to 604).
Regarding claim 6,
Leman discloses (fig. 2):
wherein the duty cycle determination circuit receives a motor rotation speed command signal (Fig. 2, DCin, from 21, ¶0146) from an externally-connected rotation speed indicating circuit (Fig. 7, FG, 710, ¶0155), determines the duty cycle of each of the plurality of waveforms of the duty cycle input signal according to a target rotation speed of the motor indicated by the motor rotation speed command signal (from 21), and generates the duty cycle input signal (Fig. 14, each curve, ¶0168-¶0170, Fig. 15) .
Regarding claim 7,
Leman discloses (fig. 2):
wherein, when the duty cycle of each of the plurality of waveforms of the duty cycle input signal does not fall within the duty cycle threshold range (Fig. 14, 15, 142, 143), the duty cycle determination circuit directly outputs the duty cycle output signal to the motor driver circuit according to an unadjusted duty cycle input signal (Fig. 15, adjusts curves to fit within threshold, ¶0168-¶0170).
Regarding claim 8,
Leman discloses (fig. 2):
wherein, when the duty cycle of each of the plurality of waveforms of the duty cycle input signal does not fall within the duty cycle threshold range, the duty cycle determination circuit maintains the duty cycle of each of the plurality of waveforms of the duty cycle input signal as a target duty cycle corresponding to the target rotation speed of the motor, and outputs the duty cycle output signal having the plurality of waveforms with duty cycles equal to the target duty cycle to the motor driver circuit (¶0168-¶0170).
Regarding claim 9,
Leman discloses (fig. 2):
wherein, when the duty cycle of any one of the plurality of waveforms of the duty cycle input signal falls within the duty cycle threshold range, the duty cycle determination circuit adjusts the duty cycle of all or a part of the plurality of waveforms of the duty cycle input signal, and outputs the duty cycle output signal to the motor driver circuit according to the adjusted duty cycle input signal (¶0168-¶0170).
Regarding claim 10,
Leman discloses (fig. 2):
wherein the duty cycle determination circuit includes: a duty cycle setting circuit (fig. 2, 21), configured to set duty cycles of the plurality of waveforms of the duty cycle input signal according to the target rotation speed indicated by the motor rotation speed command signal (¶0155); and a duty cycle adjustment circuit (Fig. 6, 602), connected to the duty cycle setting circuit (21, via 603) and the motor driver circuit (604) and configured to set the lower limit duty cycle and the upper limit duty cycle of the duty cycle threshold range (figs. 14-15, 141, 142), and determine whether or not the duty cycle of each of the plurality of waveforms of the duty cycle input signal received from the duty cycle setting circuit falls within the duty cycle threshold range to determine whether or not to adjust the duty cycle input signal to output the duty cycle output signal to the motor driver circuit (¶0168-¶0170).
Regarding claim 11,
Leman discloses (fig. 2):
wherein the duty cycle determination circuit sets a lower limit duty cycle (Fig. 14, 141) and an upper limit duty cycle (142) of each of a plurality of duty cycle threshold intervals (Fig. 15, different duty cycle curves), and the duty cycle threshold range includes a plurality of duty cycle threshold intervals (intervals 1, 10, 20, 30%, etc.); and when the duty cycle of any one of the plurality of waveforms of the duty cycle input signal falls into any one of the plurality of duty cycle threshold intervals, the duty cycle determination circuit adjusts the duty cycle of one or more of the plurality of waveforms of the duty cycle input signal, and outputs the duty cycle output signal according to the adjusted duty cycle input signal (¶0168-¶0170).
Regarding claim 12,
Leman discloses (fig. 2):
wherein the duty cycle determination circuit sets a target duty cycle increase ratio; and when the duty cycle of any one of the plurality of waveforms of the duty cycle input signal falls into any one of the plurality of duty cycle threshold intervals, the duty cycle determination circuit increases the target duty cycle increase ratio of the duty cycle of one or more of the plurality of waveforms of the duty cycle input signal and outputs the duty cycle output signal according to the adjusted duty cycle input signal (¶0181-¶0182, duty cycle ratios can also be adjusted).
Regarding claim 13,
Leman discloses (fig. 2):
wherein the duty cycle determination circuit sets a target duty cycle decrease ratio; and when duty cycles of the plurality of waveforms of the duty cycle input signal fall into any one of the plurality of duty cycle threshold intervals, the duty cycle determination circuit reduces the target duty cycle decrease ratio of the duty cycle of one or more of the plurality of waveforms of the duty cycle input signal and outputs the duty cycle output signal according to the adjusted duty cycle input signal (¶0181-¶0182, duty cycle ratios can also be adjusted).
Regarding claim 14,
Leman discloses (fig. 2):
wherein the duty cycle determination circuit sets a target duty cycle corresponding to a target rotation speed of the motor, and sets a target duty cycle increase ratio and a target duty cycle decrease ratio; and when the duty cycle of any one of the plurality of waveforms of the duty cycle input signal falls into any one of the plurality of duty cycle threshold intervals, the duty cycle determination circuit increases the target duty cycle increase ratio of a duty cycle of a waveform generated within a time interval from the target duty cycle, decreases the target duty cycle decrease ratio of a duty cycle of a waveform generated in another time interval from the target duty cycle, and maintains a duty cycle of a waveform generated in yet another time interval in the duty cycle input signal (¶0181-¶0182, duty cycle ratios can also be adjusted).
Regarding claim 15,
Leman discloses (fig. 2):
wherein the target duty cycle increase ratio is smaller than a duty cycle adjustment ratio threshold (¶0181-¶0182, duty cycle ratios can also be adjusted).
Regarding claim 16,
Leman discloses (fig. 2):
wherein the target duty cycle decrease ratio is smaller than a duty cycle adjustment ratio threshold (¶0181-¶0182, duty cycle ratios can also be adjusted).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 4-5 are rejected under 35 U.S.C. 103 as being unpatentable over Leman et al. (US 2016/0241172) in view of Shimohara (US 2002/0143425).
Regarding claim 4,
Leman discloses the above elements from claim 2.
They do not disclose:
wherein the output stage circuit includes: a first high-side switch, wherein a first end of the first high-side switch is coupled to a common voltage; a first low-side switch, wherein a first end of the first low-side switch is connected to a second end of the first high-side switch, a second end of the first low-side switch is grounded, and a node between the first end of the first low-side switch and the second end of the first high-side switch is connected to a first end of the motor; a second high-side switch, wherein a first end of the second high-side switch is coupled to the common voltage; and a second low-side switch, wherein a first end of the second low-side switch is connected to a second end of the second high-side switch, a second end of the second low-side switch is grounded, a node between the first end of the second low-side switch and the second end of the second high-side switch is connected to a second end of the motor; wherein a control end of the first high-side switch, a control end of the first low-side switch, a control end of the second high-side switch and a control end of the second low-side switch are connected to the driver circuit.
However Shimohara teaches (Fig. 3):
wherein the output stage circuit (Fig. 3) includes: a first high-side switch (43), wherein a first end of the first high-side switch (top of 43) is coupled to a common voltage (power source); a first low-side switch (44), wherein a first end of the first low-side switch (top of 44) is connected to a second end of the first high-side switch (bottom of 43), a second end of the first low-side switch (bottom of 44) is grounded (GND), and a node between the first end of the first low-side switch and the second end of the first high-side switch (where Iu is located) is connected to a first end of the motor (U phase, M, ¶0054); a second high-side switch (45), wherein a first end of the second high-side switch (top of 45) is coupled to the common voltage (power source, 41); and a second low-side switch (46), wherein a first end of the second low-side switch is connected to a second end of the second high-side switch (Iv node), a second end of the second low-side switch is grounded (bottom of 46 connected to ground), a node between the first end of the second low-side switch (top of 46) and the second end of the second high-side switch (bottom of 45) is connected to a second end of the motor (V phase of 49); wherein a control end of the first high-side switch (U0), a control end of the first low-side switch (U1), a control end of the second high-side switch (V0) and a control end of the second low-side switch (V1) are connected to the driver circuit (Fig. 1, 33, ¶0015, ¶0054).
Regarding claim 4, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to take the PWM output stage from Leman that is used to drive a motor (¶0168-¶0170) and use a three phase inverter with switches as taught by Shimohara to drive a motor (¶0015, ¶0054). This would improve efficiency.
Regarding claim 5,
Leman discloses the above elements from claim 4.
They do not disclose:
wherein the output stage circuit further includes: a third high-side switch, wherein a first end of the third high-side switch is coupled to the common voltage; and a third low-side switch, wherein a first end of the third low-side switch is connected to a second end of the third high-side switch, a second end of the third low-side switch is grounded, and a node between the first end of the third low-side switch and the second end of the third high-side switch is connected to a third end of the motor; wherein a control end of the third high-side switch and a control end of the third low-side switch are connected to the driver circuit.
However Shimohara teaches (Fig. 3):
wherein the output stage circuit (Fig. 3) further includes: a third high-side switch (47), wherein a first end of the third high-side switch (top of 47) is coupled to the common voltage (41, power source); and a third low-side switch (bottom of 48), wherein a first end of the third low-side switch (top of 48) is connected to a second end of the third high-side switch (Iw node), a second end of the third low-side switch is grounded (bottom of 48 connected to 42, GND, ground), and a node between the first end of the third low-side switch and the second end of the third high-side switch is (Iw node) connected to a third end of the motor (W phase of 49); wherein a control end of the third high-side switch (W0) and a control end of the third low-side switch (W1) are connected to the driver circuit (Fig. 1, 33, ¶0015, ¶0054).
Regarding claim 5, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to take the PWM output stage from Leman that is used to drive a motor (¶0168-¶0170) and use a three phase inverter with switches as taught by Shimohara to drive a motor (¶0015, ¶0054). This would improve efficiency.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
Ogawa (US 2019/0173400) – duty cycle controller
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/C.S.L./Examiner, Art Unit 2846 /KAWING CHAN/Primary Examiner, Art Unit 2846