DETAILED ACTION
This correspondence is in response to the communications received May 8, 2024. Claims 1-20 are pending.
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Priority
Receipt is acknowledged of certified copies of papers required by 37 CFR 1.55.
Applicant’s Claim to Figure Comparison
It is noted that this comparison is merely for the benefit of reviewers of this office action during prosecution, to allow for an understanding of the examiner’s interpretation of the Applicant’s independent claims as compared to disclosed embodiments in Applicant’s Figures. No response or comments are necessary from Applicant.
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Regarding claim 1, the Applicant discloses in Figs. 1 and 2, a semiconductor device comprising:
a semiconductor chip (100, ¶ 0041) comprising a semiconductor integrated circuit (120, ¶ 0041);
a heat transfer member (400, ¶ 0044) covering an upper surface of the semiconductor chip (400 covers upper surface of 100); and
a plurality of microstructures (500) on an upper surface of the heat transfer member (on top surface of 400) and configured to generate a capillary force to cause a flow of a coolant (discussed in ¶ 0045),
wherein a first capillary channel (510) is provided between adjacent microstructures of the plurality of microstructures (semi-enclosed spaces between individual portions of 500), and
wherein at least one of the plurality of microstructures comprises a hollow microstructure in which a second capillary channel is provided (520, ¶ 0045).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1, 3, 4, 5, 6, 8, 10, 11, 12, 13, 17 and 18 are rejected under 35 U.S.C. 103 as being unpatentable over Chen et al. (US 11,848,246) in view of Pounds et al. (US 2022/0049905).
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Regarding claim 1, the prior art of Chen discloses in Fig. 11, a semiconductor device (“integrated circuit device 80A is a die stack.”, col. 7, line 29, where “Die stacks, and particularly memory die stacks such as high bandwidth memory (HBM) devices, have a large thickness as a result of having multiple semiconductor substrates. For example, high capacity HBM devices can have twelve or more semiconductor substrates.”, col. 7, lines 34-39) comprising:
a semiconductor chip (80A, where the term “chip” is analogous to the term “die”) comprising a semiconductor integrated circuit (“integrated circuit device 80A is a die stack.”, col. 7, line 29,);
a heat transfer member (“heat dissipation die 94”, col. 7, line 56) covering an upper surface of the semiconductor chip (94 covers top surface of 80a); and
a plurality of structures (plural vertical fins which are a part of “heat spreader 208”, col. 12, lines 24-38) on an upper surface of the heat transfer member (208 is on top surface of 94).
Chen does not disclose,
“a plurality of microstructures on an upper surface of the heat transfer member and configured to generate a capillary force to cause a flow of a coolant,
wherein a first capillary channel is provided between adjacent microstructures of the plurality of microstructures, and
wherein at least one of the plurality of microstructures comprises a hollow microstructure in which a second capillary channel is provided.”
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Pounds discloses in Figs. 1 and 2A,
a plurality of microstructures (14A, “The OHP circuit(s) 14 comprise one or more multi-pass meandering, hermetically sealed capillary channel 14A (e.g., micro-channel)”, ¶ 0037) on an upper surface of the heat transfer member (structure 10, is intended to be analogous to and replace 208 in Fig. 11 of Chen) and configured to generate a capillary force to cause a flow of a coolant (“the OHP circuit(s) 14 comprise one or more multi-pass meandering, hermetically sealed capillary channel 14A (e.g., micro-channel) integrally formed within the body 12 that cross the heat source and rejection regions 18 and 22 multiple times”, ¶ 0037, “fluid” discussed as the coolant in channels 14A, in ¶ 0042),
wherein a first capillary channel (one segment of 14A) is provided between adjacent microstructures of the plurality of microstructures (14A are microstructures as detailed above in ¶ 0037, as a “micro-channel”), and
wherein at least one of the plurality of microstructures (one of the 14A segments) comprises a hollow microstructure (see hollow cross sectional view of 14A in Fig. 2A) in which a second capillary channel is provided (another of one of the 14A segments).
Therefore, it would have been obvious to one having ordinary skill in the art at the time the invention was effectively filed to use the limitations of,
“a plurality of microstructures on an upper surface of the heat transfer member and configured to generate a capillary force to cause a flow of a coolant,
wherein a first capillary channel is provided between adjacent microstructures of the plurality of microstructures, and
wherein at least one of the plurality of microstructures comprises a hollow microstructure in which a second capillary channel is provided.”, as disclosed by Pounds in the system of Chen, for the purpose of actively cooling the heat extraction configuration to improve the thermal management of the operating device. (G) Some teaching, suggestion, or motivation in the prior art that would have led one of ordinary skill to modify the prior art reference or to combine prior art reference teachings to arrive at the claimed invention.
Regarding claim 3, the prior art of Chen et al. disclose the semiconductor device of claim 1, and Pounds shows in Figs. 1 and 2A, wherein a first capillary interval of the first capillary channel is the same as a second capillary interval of the second capillary channel (all channels 14A have same interval).
Regarding claim 4, the prior art of Chen et al. disclose the semiconductor device of claim 1, and Pounds shows in Figs. 1 and 2A, wherein the first capillary channel is interconnected with the second capillary channel (all channels 14A are interconnected as shown).
Regarding claim 5, the prior art of Chen et al. disclose the semiconductor device of claim 1, and Pounds discloses in Figs. 1 and 2A, a first opening interconnecting the first capillary channel with the second capillary channel is provided at at least one of ends of the hollow microstructure in an extension direction of the second capillary channel (plural 14A have an into the page dimension that are connected by lateral extensions linking them).
Regarding claim 6, the prior art of Chen et al. disclose the semiconductor device of claim 1, and Pounds discloses in Figs. 1 and 2A, wherein a second opening, open in a direction perpendicular to an extension direction of the second capillary channel, is provided at the hollow microstructure (plural 14A have an into the page dimension that are connected by lateral extensions linking them, the lateral extensions being perpendicular to the into the page plural 14A).
Regarding claim 8, the prior art of Chen discloses in Fig. 11, a semiconductor device (“integrated circuit device 80A is a die stack.”, col. 7, line 29, where “Die stacks, and particularly memory die stacks such as high bandwidth memory (HBM) devices, have a large thickness as a result of having multiple semiconductor substrates. For example, high capacity HBM devices can have twelve or more semiconductor substrates.”, col. 7, lines 34-39) comprising:
a semiconductor chip (80A, where the term “chip” is analogous to the term “die”) comprising a semiconductor integrated circuit (“integrated circuit device 80A is a die stack.”, col. 7, line 29,);
a cooling channel (channels between vertical projections of 208, “heat spreader 208”, col. 12, lines 24-38) thermally connected to the semiconductor chip (208 in thermal connection, through (“heat dissipation die 94”, col. 7, line 56 to the top surface of 80A).
Chen does not disclose,
“a cooling channel thermally connected to the semiconductor chip and configured to accommodate a coolant which flows therein; and
a plurality of microstructures in the cooling channel and configured to generate a capillary force to cause a flow of the coolant,
wherein a first capillary channel is provided between adjacent microstructures of the plurality of microstructures, and
wherein at least one of the plurality of microstructures comprises a hollow microstructure in which a second capillary channel is provided.”
Pounds discloses in Figs. 1 and 2A,
a plurality of microstructures (14A, “The OHP circuit(s) 14 comprise one or more multi-pass meandering, hermetically sealed capillary channel 14A (e.g., micro-channel)”, ¶ 0037) on an upper surface of the heat transfer member (structure 10, is intended to be analogous to and replace 208 in Fig. 11 of Chen) and configured to generate a capillary force to cause a flow of a coolant (“the OHP circuit(s) 14 comprise one or more multi-pass meandering, hermetically sealed capillary channel 14A (e.g., micro-channel) integrally formed within the body 12 that cross the heat source and rejection regions 18 and 22 multiple times”, ¶ 0037, “fluid” discussed as the coolant in channels 14A, in ¶ 0042),
wherein a first capillary channel (one segment of 14A) is provided between adjacent microstructures of the plurality of microstructures (14A are microstructures as detailed above in ¶ 0037, as a “micro-channel”), and
wherein at least one of the plurality of microstructures (one of the 14A segments) comprises a hollow microstructure (see hollow cross sectional view of 14A in Fig. 2A) in which a second capillary channel is provided (another of one of the 14A segments).
a cooling channel (14A, “The OHP circuit(s) 14 comprise one or more multi-pass meandering, hermetically sealed capillary channel 14A (e.g., micro-channel)”, ¶ 0037) thermally connected to the semiconductor chip (structure 10, is intended to be analogous to and replace 208 in Fig. 11 of Chen, which would then connect to 80A) and configured to accommodate a coolant which flows therein (“the OHP circuit(s) 14 comprise one or more multi-pass meandering, hermetically sealed capillary channel 14A (e.g., micro-channel) integrally formed within the body 12 that cross the heat source and rejection regions 18 and 22 multiple times”, ¶ 0037, “fluid” discussed as the coolant in channels 14A, in ¶ 0042); and
a plurality of microstructures (“the OHP circuit(s) 14 comprise one or more multi-pass meandering, hermetically sealed capillary channel 14A (e.g., micro-channel) integrally formed within the body 12 that cross the heat source and rejection regions 18 and 22 multiple times”, ¶ 0037) in the cooling channel (14A) and configured to generate a capillary force to cause a flow of the coolant (discussed in ¶ 0037),
wherein a first capillary channel (one of the 14A) is provided between adjacent microstructures of the plurality of microstructures (the one of the 14A between adjacent two other 14A), and
wherein at least one of the plurality of microstructures comprises a hollow microstructure in which a second capillary channel is provided (the two adjacent 14A are also micro channels, ¶ 0037).
Therefore, it would have been obvious to one having ordinary skill in the art at the time the invention was effectively filed to use the limitations of,
“a cooling channel thermally connected to the semiconductor chip and configured to accommodate a coolant which flows therein; and
a plurality of microstructures in the cooling channel and configured to generate a capillary force to cause a flow of the coolant,
wherein a first capillary channel is provided between adjacent microstructures of the plurality of microstructures, and
wherein at least one of the plurality of microstructures comprises a hollow microstructure in which a second capillary channel is provided.”, as disclosed by Pounds in the system of Chen, for the purpose of actively cooling the heat extraction configuration to improve the thermal management of the operating device. (G) Some teaching, suggestion, or motivation in the prior art that would have led one of ordinary skill to modify the prior art reference or to combine prior art reference teachings to arrive at the claimed invention.
Regarding claim 10, the prior art of Chen et al. disclose the semiconductor device of claim 8, and Pounds shows in Figs. 1 and 2A, wherein a first capillary interval of the first capillary channel is the same as a second capillary interval of the second capillary channel (all channels 14A have same interval).
Regarding claim 11, the prior art of Chen et al. disclose the semiconductor device of claim 8, and Pounds shows in Figs. 1 and 2A, wherein the first capillary channel is interconnected with the second capillary channel (all channels 14A are interconnected as shown).
Regarding claim 12, the prior art of Chen et al. disclose the semiconductor device of claim 8, and Pounds discloses in Figs. 1 and 2A, a first opening interconnecting the first capillary channel with the second capillary channel is provided at at least one of ends of the hollow microstructure in an extension direction of the second capillary channel (plural 14A have an into the page dimension that are connected by lateral extensions linking them).
Regarding claim 13, the prior art of Chen et al. disclose the semiconductor device of claim 8, and Pounds discloses in Figs. 1 and 2A, wherein a second opening, open in a direction perpendicular to an extension direction of the second capillary channel, is provided at the hollow microstructure (plural 14A have an into the page dimension that are connected by lateral extensions linking them, the lateral extensions being perpendicular to the into the page plural 14A).
Regarding claim 17, the prior art of Chen et al. disclose the semiconductor device of claim 16, further comprising a housing surrounding the semiconductor chip (in the combination of references of Chen in view of Pounds, the outer casing holding the 14A is considered to be the outer exterior of the upper portion of the housing), wherein the cooling channel is between the housing and the upper surface of the semiconductor chip (then when the 10 of Pounds is substituted for 208 in Chen, the outer exterior of 10 then would place the 14A between the outer exterior of 10 and the upper surface of 80A of Chen).
Regarding claim 18, the prior art of Chen et al. disclose the semiconductor device of claim 17, wherein at least one opening interconnected with the cooling channel is provided in the housing (As the Pounds housing 10 exterior housing, then the coolant is inserted and outlet by “one inlet 26B fluidly connected to the PF circuit heat exchange portion(s) 26A, and at least one outlet 26C fluidly”, ¶ 0038, which are the coolant channels provided in the housing).
Claims 15 and 16 are rejected under 35 U.S.C. 103 as being unpatentable over Chen et al. (US 11,848,246) in view of Pounds et al. (US 2022/0049905) in view of Gong et al. (US 2020/0286809).
Regarding claim 15, the prior art of Chen et al. disclose the semiconductor device of claim 8, wherein the semiconductor chip (Chen’s 80A) comprises a lower surface and an upper surface opposite to the lower surface (top and bottom surfaces of 80A), however Chen does not disclose explicitly, “wherein the semiconductor integrated circuit is on the lower surface, and wherein the cooling channel is adjacent to the upper surface.”
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Gong discloses in Fig. 1 and ¶ 0026, “semiconductive device 132 is an HBM die 132, with an active surface and metallization 134 facing the semiconductor package substrate 112 on the die side 116.”, whereas the “the heat sink 120” is on the rear surface of the chip 132. The active surface signifies where the devices are formed in the chip, which face down so as to access the electrical contacts in the solder ball connection arrangement.
Therefore, it would have been obvious to one having ordinary skill in the art at the time the invention was effectively filed to use the limitations of,
“wherein the semiconductor integrated circuit is on the lower surface, and wherein the cooling channel is adjacent to the upper surface”, as disclosed by Gong in the system of Chen, for the purpose of placing the non-active side of the chip to the heat removal device so as to not impede the electrical connection region. (G) Some teaching, suggestion, or motivation in the prior art that would have led one of ordinary skill to modify the prior art reference or to combine prior art reference teachings to arrive at the claimed invention.
Regarding claim 16, the prior art of Chen et al. disclose the semiconductor device of claim 15, and Chen shows wherein the plurality of microstructures are on the upper surface of the semiconductor chip (in the combination rejection, the 14A of Pounds would be in the position of the element 208 of Chen which is in thermal communication with chip 80A).
Allowable Subject Matter
Claims 2, 7, 9, 14, 19 and 20 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Contact Information
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Eduardo A Rodela whose telephone number is (571)272-8797. The examiner can normally be reached M-F, 8:30-5:00pm ET.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Yara B Green can be reached on (571) 270-3035. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/EDUARDO A RODELA/Primary Examiner, Art Unit 2893
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