DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 9, and 16-19 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Regarding Claim 9, it recites “the titanium-nitride based bottom electrode”. There is no antecedent basis for this limitation, as the lower electrode is based on TiN, TaN, Ta, Cu, W, Pt, Au, or Ag. This leaves it unclear as to what “the titanium nitride based lower electrode” refers to, since the claims as presently written do not require the bottom electrode to be TiN.
Regarding Claim 16, it recites “a method for manufacturing a resistive memory cell according to claim 1”. It is unclear if “a resistive memory cell” is meant to refer to the resistive memory cell of claim 1, or a different memory cell. Since claim 16 depends from claim 1, for the purpose of applying prior art, this will be interpreted as “a method for manufacturing the resistive memory cell according to claim 1”. Similarly, claim 16 recites “a lower electrode”, “an upper electrode”, “a first contact surface” which makes it unclear if these refer to the same elements from claim 1, or different elements in relation to the recited “said local zone”, which is recited in claim 16 referring to claim 1. Claim 16 also recites “the current density”, which lacks antecedent basis and leaves the claim unclear as to what this refers to. Appropriate correction is required of dependent claim 16.
For at least these reasons, claims 17-19 are also rejected based on their dependency from claim 16.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1-4, 6-9, and 13-17 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Shih-Yuan Wang et al. (US 2017/0244028 A1; hereinafter Wang).
Regarding Claim 1, Wang discloses a resistive memory cell (Fig. 6) comprising:
a lower electrode (bottom electrode (BE) 120; ¶0226) based on one of the following materials: titanium nitride TiN, tantalum nitride TaN, tantalum Ta, copper Cu, tungsten W, platinum Pt, gold Au (BE 120 can be Au as described in ¶0226) or silver Ag;
an upper electrode (top electrode (TE) 140; ¶0226), and
an active layer (switching layer (SL) 130; comprising vanadium oxide; ¶0226) having a first contact surface (bottom) with the lower electrode (120) and a second contact surface (top) with the upper electrode (140), said active layer (130) including a local zone (654; ¶0161), said local zone (654) being made of a material including vanadium, oxygen (¶0226) and Ti if the material of the lower electrode is TiN or Ta if the material of the lower electrode is TaN or Ta, or Cu if the material of the lower electrode is Cu, or W if the material of the lower electrode is W, or Pt if the material of the lower electrode is Pt, or Au if the material of the lower electrode is Au (wherein 654 includes gold (Au) ions/impurities in the vanadium oxide; ¶0192; ¶0226, ¶0238), or Ag if the material of the lower electrode is Ag, said local zone (654) extending from the first contact surface (bottom of SL 130), a rest of the active layer (a rest of 130 along the conducting channel ion/defect path which is the shaded vertical linear portion; ¶0153; ¶0161) being made of conductive vanadium oxide (wherein “a rest of 130” described above is vanadium oxide made conductive by the Au ion implantation through the implant mask; ¶0153).
Regarding Claim 2, Wang discloses the resistive memory cell according to claim 1, wherein the upper electrode (TE 140) is based on titanium nitride (may be TiN according to ¶0226).
Regarding Claim 3, Wang discloses the resistive memory cell according to claim 1, wherein said local zone (654) is not in contact with the second contact surface (top of 130) (as shown in Fig. 6).
Regarding Claim 4, Wang discloses the resistive memory cell according to claim 1, wherein said local zone (654) is in contact with the second contact surface (654 is in thermal contact with top of 130).
Regarding Claim 6, Wang discloses the resistive memory cell according to claim 1, wherein a thickness of the active layer (130) is between 5 and 200 nm (20nm; ¶0226).
Regarding Claim 7, Wang discloses the resistive memory cell according to claim 6, wherein the thickness of the active layer (130) is between 10 and 100 nm (20nm).
Regarding Claim 8, Wang discloses the resistive memory cell according to claim 1, wherein the local zone (654) has a shape of a dome whose cross-section parallel to a plane of the layers decreases from the first contact surface (as shown in Fig. 6 wherein 654 has an angular dome shape).
Regarding Claim 9, Wang discloses the resistive memory cell according to claim 1, wherein the titanium nitride-based lower electrode includes vanadium, titanium and oxygen in a zone located in proximity to the first contact surface (this limitation is implicitly satisfied since the material of the lower electrode being titanium nitride is optional, which means this claim adds no further structural limitations to claim 1 as presently written).
Regarding Claim 13, Wang discloses the resistive memory cell according to claim 1, wherein the lower electrode has a rectangular parallelepiped shape of the ‘Wall’ type or an L shape (using the broadest reasonable interpretation of “a rectangular parallelepiped shape of the ‘Wall’ type”, bottom electrode BE 130 is rectangular parallelepiped shaped like a wall in view of Fig. 15A).
Regarding Claim 14, Wang discloses the resistive memory cell according to claim 1, wherein the conductive vanadium oxide (of switching layer (SL) 130) is crystalline or partially crystalline (as described in ¶0161).
Regarding Claim 15, Wang discloses the resistive memory cell according to claim 1, wherein the local zone (654 which is within 130) is made of a crystalline or partially crystalline material (as described in ¶0161 wherein 654 is part of a defect path in the crystalline structure of 130).
Regarding Claim 16, Wang discloses a method for manufacturing a (the) resistive memory cell according to claim 1, comprising:
making a lower electrode (bottom electrode (BE) 120; ¶0226) based on one of the following materials: titanium nitride TiN, tantalum nitride TaN, tantalum Ta, copper Cu, tungsten W, platinum Pt, gold Au (BE 120 can be Au as described in ¶0226) or silver Ag;
depositing a layer made of vanadium oxide (switching layer (SL) 130; comprising vanadium oxide; ¶0226) having a first contact surface (bottom) with the lower electrode (120);
Making an upper electrode (top electrode (TE) 140; ¶0226);
said method including an initialisation step consisting in injecting a current (¶0155; ¶0161) through a stack formed by the lower electrode (120), the vanadium oxide layer (130) and the upper electrode (140), the current density being chosen to create said local zone (654) including vanadium, oxygen and Ti if the material of the lower electrode is TiN or Ta if the material of the lower electrode is TaN or Ta, or Cu if the material of the lower electrode is Cu, or W if the material of the lower electrode is W, or Pt if the material of the lower electrode is Pt, or Au if the material of the lower electrode is Au (wherein 654 includes gold (Au) ions/impurities in the vanadium oxide; ¶0192; ¶0226, ¶0238), or Ag if the material of the lower electrode is Ag (the initialization voltage is applied to the stack at a higher voltage than the operating voltage in order to initiate the bi-stable and/or multi-stable HRS and LRS states for the functional device, which makes the local zone in combination with the ion implantation; ¶0155 and ¶0161).
Regarding Claim 17, Wang discloses the method for manufacturing a memory cell according to claim 16, further comprising a heat treatment step during or after said depositing until said vanadium oxide layer is made conductive (wherein a heat treatment step is carried out after the ion implant removing some, but not all, of the defects/paths [¶0197] which leaves the remaining part of the vanadium oxide layer conductive).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 10-12 are rejected under 35 U.S.C. 103 as being unpatentable over Wang in view of Lanxiang Wang et al. (US 10700277 B1; hereinafter Wang’277).
Regarding Claim 10, Wang discloses the resistive memory cell according to claim 1, but is silent regarding wherein the first contact surface (bottom) has an area of less than or equal to 9000 nm.sup.2.
In the same field of endeavor, Wang’277 teaches a similar memory device (Fig. 2C) including a top electrode (206; C10:L9-L26), a switching layer (218; C8:L18-L26), and a bottom electrode (226; C10:L9-L26) which may have a surface area between the bottom electrode and switching layer between 2nm.sup.2 and 9000 nm.sup.2 (C10:L9-L26).
It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to have the electrode of Wang have the surface area of Wang’277 in order to provide a device with reduced dimensions with less variability in resistance and better performance (Wang’277; C1:L45 – C2:L5).
Regarding Claim 11, modified Wang discloses the resistive memory cell according to claim 10, wherein the first contact surface has an area less than or equal to 6000 m.sup.2 (C10:L9-L26).
Although the claimed range substantially overlaps with the range of Wang’277, it would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to optimize the device to be within the lower range of Wang’277 range (as low as 2nm.sup.2) in order to provide a device with smaller dimensions while providing less variability in resistance and better performance (Wang’277; C1:L45 – C2:L5).
Regarding Claim 12, Wang discloses the resistive memory cell according to claim 1, but does not expressly disclose wherein the first contact surface is equal to the upper surface of the lower electrode and is strictly less than the total lower surface of the active layer.
In the same field of endeavor, Wang’277 teaches a similar memory device (Fig. 2C) including a top electrode (206; C10:L9-L26), a switching layer (218; C8:L18-L26), and a bottom electrode (226; C10:L9-L26), wherein the contact surface (2261s) of the bottom electrode is equal to the top surface of the lower electrode (226) and is strictly less than the total lower surface of the active layer (bottom of 218).
It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to have the above configuration of Wang’277 for the device of Wang in order to provide a device with reduced dimensions with less variability in resistance and better performance (Wang’277; C1:L45 – C2:L5).
Claim 19 is rejected under 35 U.S.C. 103 as being unpatentable over Wang in view of Masaya Ugaji et al. (US 20040106045 A1; hereinafter Ugaji).
Regarding Claim 19, Wang discloses the method for manufacturing a memory cell according to claim 16, wherein said depositing of the layer made of vanadium oxide is carried out by sputtering (wherein the switching layer can be formed via sputtering according to ¶0180), but does not expressly disclose the sputtering method is a specialized ion beam deposition technique.
Ugaji teaches forming vanadium oxide by sputtering or ion beam deposition (¶0040). It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to utilize ion beam deposition instead of sputtering as they are art recognized equivalent methods for the purpose of forming a vanadium oxide layer (Ugaji; ¶0040).
Allowable Subject Matter
Claim 5 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Claim 18 would be allowable if rewritten to overcome the rejection(s) under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), 2nd paragraph, set forth in this Office action and to include all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter:
Regarding Claim 5, Wang discloses the resistive memory cell according to claim 1. However, the references of the Prior Art of record and considered pertinent to the applicant's disclosure and to the Examiner’s knowledge does not teach or render obvious, at least to the skilled artisan, all the limitations of the instant invention in their entirety (the individual limitations may be found just not in combination with proper motivation); further including: wherein said local zone has a volume vanadium atom depletion greater than or equal to 20% relative to the rest of the active layer.
Regarding Claim 18, Wang discloses the method for manufacturing a memory cell according to 16. However, the references of the Prior Art of record and considered pertinent to the applicant's disclosure and to the Examiner’s knowledge does not teach or render obvious, at least to the skilled artisan, all the limitations of the instant invention in their entirety (the individual limitations may be found just not in combination with proper motivation); further including wherein the current density of the initialisation step is greater than or equal to 50.10.sup.6 A/cm.sup.2.
Conclusion
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NATHAN PRIDEMORE
Examiner
Art Unit 2898
/NATHAN PRIDEMORE/Examiner, Art Unit 2898 /JULIO J MALDONADO/Supervisory Patent Examiner, Art Unit 2898
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