DETAILED ACTION
This Office Action is in response to the applicant's application filed May 10th, 2024. In virtue of this communication, claims 1-17 are currently presented in the instant application.
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claims 1-3, 5, and 10 are rejected under 35 U.S.C. 102(a)(2) as being anticipated by Kwon et al. (US 2025/0126788 A1; hereinafter Kwon).
With respect to claim 1, Kwon teaches a semiconductor device in Figs. 1-9 comprising:
a gate structure 130U including a plurality of gate lines (130U1, 130U2, 130U3) (see Figs. 1 and 8 and paragraphs 56, 119, 120);
a first contact plug 182_3 extending through the gate structure 130U, the first contact plug being electrically connected to a first gate line 130U3 among the gate lines, and including a first portion 182_3a having a taper shape and a second portion 182_3b having an inverted taper shape (see Fig. 8 and paragraphs 183, 185-187, 189, 190, 196, 199-202); and
a second contact plug 182_2 extending through the gate structure 130U, electrically connected to a second gate line 130U2 among the gate lines, and having a taper shape (tapered at 182_2a and 182_2c) (see Fig. 8 and paragraphs 183, 185-187, 189, 190, 196, 199-202).
With respect to claim 2, Kwon teaches the semiconductor device of claim 1, wherein the first contact plug 182_3 includes a connect surface (boundary defined by top of 321 in Fig. 8) where the first portion 182_3a and the second portion 182_3b are connected, wherein a width of the first portion 182_3a and the second portion 182_3b decreases as a distance from the connect surface increases (see Fig. 8 and paragraphs 183, 196, 199-202).
With respect to claim 3, Kwon teaches the semiconductor device of claim 1, wherein an upper surface of the first portion 182_3a and a lower surface of the second portion 182_3b are connected (see Fig. 8 and paragraphs 183, 196, 199-202).
With respect to claim 5, Kwon teaches the semiconductor device of claim 1, further comprising: a source structure 110 disposed on the gate structure 130U (see Fig. 1 and paragraphs 44, 45, 56; 110 on bottom of 130U).
With respect to claim 10, Kwon teaches the semiconductor device of claim 1, wherein the first contact plug 182_3 has a height greater than that of the second contact plug 182_2 (see Fig. 8 and paragraphs 183, 185-187, 189, 190, 196, 199-202; height difference of 130U2 and 132m).
Allowable Subject Matter
Claims 12-17 are allowed.
The following is an examiner’s statement of reasons for allowance.
With respect to claim 12, the closest prior art Kwon et al. (US 2025/0126788 A1; hereinafter Kwon) discloses a semiconductor device in Figs. 1-9 comprising: a gate structure 130U including stacked gate lines (130U1, 130U2, 130U3); a source structure 110 disposed on the gate structure 130U; and a first contact plug 182_3 extending through the gate structure 130U, the first contact plug 182_3 being electrically connected to a first gate line 130U3 among the gate lines (see Fig. 8), wherein the first contact plug comprises: a first portion 182_3a extending through the gate structure 130U and having a taper shape; a second portion 182_3b extending through the gate structure 130U and having an inverted taper shape; and a third portion 182_3c having a taper shape (see Fig. 8).
However, the Kwon does not teach the claim as a whole, in particular: the first contact plug extending through the source structure or the third portion extending through the source structure in combination with the remaining limitations called for in claim 12.
None of the prior art on record contains such a limitation, nor given the prior art on record is it obvious to one ordinarily skilled in the art to add said limitations as recited in claim 12. Therefore, claim 12 is allowed as it is not anticipated by or obvious over the teachings of the prior art on record. Claims 13-17 are also allowed as they depend from an allowed base claim.
Any comments considered necessary by applicant must be submitted no later than the payment of the issue fee and, to avoid processing delays, should preferably accompany the issue fee. Such submissions should be clearly labeled “Comments on Statement of Reasons for Allowance.”
Additionally, claims 4, 6-9, and 11 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter: the prior art does not disclose or fairly suggest:
wherein an inverted taper shape is repeated in the second portion, and the second portion includes a step on a sidewall, as called for in claim 4;
wherein the first contact plug includes a third portion extending through the source structure and having a taper shape, as called for in claim 6;
wherein the second portion protrudes into the source structure, as called for in claim 7;
further comprising: a channel structure extending into the source structure through the gate structure and having an inverted taper shape, as called for in claim 8;
further comprising: a slit structure including a first portion extending through the gate structure and having an inverted taper shape and a second portion extending through the source structure and having a taper shape, as called for in claim 9; or
a first insulating spacer surrounding a sidewall of the first contact plug; and a second insulating spacer surrounding a sidewall of the second contact plug, as called for in claim 11.
Citation of Pertinent Prior Art
The following prior art made of record and not relied upon is considered pertinent to applicant's disclosure because each reference discloses a semiconductor device structure similar to that of the claimed invention: US 20210043640 A1 and US 20220052068 A1.
Inquiry
Any inquiry concerning this communication or earlier communications from the examiner should be directed to JORDAN M KLEIN whose telephone number is (571)270-7544. The examiner can normally be reached 9:00 am - 5:00 pm.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Sue Purvis can be reached at 571-272-1236. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/J.M.K/Examiner, Art Unit 2893
/SUE A PURVIS/Supervisory Patent Examiner, Art Unit 2893
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