DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Priority
Acknowledgment is made of applicant’s claim for foreign priority under 35 U.S.C. 119 (a)-(d).
Information Disclosure Statement
The information disclosure statement filed on 10/10/2024 has been considered.
Drawings
The drawings filed on 05/10/22024 are acceptable.
Specification
The abstract of the disclosure and the specification filed on 05/10/2024 are acceptable.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 1, 9, 10, 12 and 13 is/are rejected under 35 U.S.C. 103 as being unpatentable over Shrivastava (US 2019/0081164).
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Regarding claim 1, Shrivastava (US 2019/0081164) discloses:
A high electron mobility transistor comprising:
a substrate (Si substrate, ¶0081) comprising:
a buffer layer (508, ¶0079);
a channel layer (¶0080) disposed on the buffer layer (508);
an interlayer (AlN layer , figures 5 and 16) disposed on the channel layer; and
a first barrier layer (AlGaN layer, figures 5 and 16, ¶0072) between the interlayer and a cap layer (GaN Cap, figure 5);
a source electrode disposed on the channel layer (¶0081, figures 5 and 16);
a drain electrode disposed on the channel layer (¶0081, figures 5 and 16); and
a gate electrode (502, ¶0080) disposed between the source electrode and the drain electrode, the gate electrode defining a longitudinal portion extending through the capping layer, wherein a distal end of the longitudinal portion is in contact with the first barrier layer. Shrivastava does not disclose “an external fillet between the distal end and the longitudinal portion”. However, a change in size or shape or both is an unpatentable modification when it results in optimum conditions that differ from the prior art in degree but not in kind. In Re Rose, 220 F.2d 459, 105 USPQ 237, In reDailey, 357 F.2d 669, 149 USPQ 47). In the instant case the prior art device would not perform differently if modified to the claimed shape or size. Therefore the claimed limitations are considered met.
Regarding claim 9, Shrivastava further discloses:
wherein the channel layer includes at least of GaN (a 2DEG formed at the interface of the AlN layer and the underlying N-type GaN layer functions as the channel under the gate electrode).
Regarding claim 10, Shrivastava further discloses:
wherein the substrate further comprises an interlayer that includes an undoped AlN semiconductor material (AlN layer figures 5 and16).
Regarding claim 11, Shrivastava further discloses:
wherein the substrate further includes a spacer layer that includes at least one semiconductor material selected from the group consisting of AlGaN, InAlN, ScAIN, InAlGaN, or (AlGa)2O3.
Regarding claim 12, Shrivastava does not disclose “a distance between a distal end of the gate electrode and the distal end of the first barrier layer is in a range from 2 to10nm” However, a change in size or shape or both is an unpatentable modification when it results in optimum conditions that differ from the prior art in degree but not in kind. In Re Rose, 220 F.2d 459, 105 USPQ 237, In reDailey, 357 F.2d 669, 149 USPQ 47). In the instant case the prior art device would not perform differently if modified to the claimed shape or size. Therefore the claimed limitations are considered met.
Regarding claim 13, Shrivastava does not disclose “a thickness of the cap layer and the first barrier layer to be in a range of 10 to 40nm” However, a change in size or shape or both is an unpatentable modification when it results in optimum conditions that differ from the prior art in degree but not in kind. In Re Rose, 220 F.2d 459, 105 USPQ 237, In reDailey, 357 F.2d 669, 149 USPQ 47). In the instant case the prior art device would not perform differently if modified to the claimed shape or size. Therefore the claimed limitations are considered met.
Allowable Subject Matter
Claim 2-8, 11 and 14 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Regarding claim 2, the prior art does not disclose “
Regarding claim 11, the prior art does not disclose “wherein the substrate further includes a spacer layer that includes at least one semiconductor material selected from the group consisting of AlGaN, InAlN, ScAIN, InAlGaN, or (AlGa)2O3” in combination with the remaining claimed features.
Claims 15-20 are allowed.
The following is an examiner’s statement of reasons for allowance:
Regarding claim 15, the prior art does not disclose “etching a recess into the cap layer through a portion of the first barrier layer to define an internal fillet edge in the first barrier layer; and depositing a gate metal with an external fillet edge in the recess to extend above the capping layer” in combination with the remaining claimed .
Any comments considered necessary by applicant must be submitted no later than the payment of the issue fee and, to avoid processing delays, should preferably accompany the issue fee. Such submissions should be clearly labeled “Comments on Statement of Reasons for Allowance.”
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to WILLIAM A HARRISTON whose telephone number is (571)270-3897. The examiner can normally be reached Mon-Fri, 9AM-5PM.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Brent Fairbanks can be reached at (408) 918-7532. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/WILLIAM A HARRISTON/Primary Examiner, Art Unit 2899
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