DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Allowable Subject Matter
Claims 3-8, 10-13 and 15 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter:
Regarding Claim 3-8, prior art failed to disclose or fairly suggest an integrated circuit structure comprising, along with other recited claim limitations, along with other recited claim limitations, wherein the thermally conductive bridge further comprises,
a third vertical portion that connects back to the semiconductor substrate at a second section away from the active semiconductor device, wherein the section away from the active semiconductor device is a first section of the semiconductor substrate away from the active semiconductor device; and a second horizontal section connected between the first vertical portion and the third vertical portion. Claims 4-8 depend from claim 3 and hence are also indicted as allowable subject matter for the same reason therein.
Regarding Claim 10-13, prior art failed to disclose or fairly suggest an integrated circuit structure comprising, along with other recited claim limitations, along with other recited claim limitations, wherein the HBT comprises, of a plurality of HBT strip areas, wherein each of the HBT strip areas are separated from one another; and the thermally conductive bridge comprises: a set of first vertical portions, each of the first vertical portions attaching to a different one of the plurality of HBT strip areas; a connection portion, wherein the set of first vertical portions connects to the connection portion; a horizontally extending portion that extends horizontally away from the connection portion; and a second vertical portion that is connected to the horizontally extending portion, the second vertical portion extending vertically down to connect to a section of the semiconductor substrate away from the plurality of HBT strip areas. Claims 11-13 depend from claim 10 and hence are also indicted as allowable subject matter for the same reason therein.
Regarding Claim 15, prior art failed to disclose or fairly suggest the required HEMT device, along with other recited claim limitations, a plurality of drain/source contacts; a plurality of gate contacts interleaved between the plurality of drain/source contacts; and the thermally conductive bridge comprises: a set of first vertical portions, each of the first vertical portions attaching to a different one of the plurality of drain/source contacts; a connection portion, wherein the set of first vertical portions connects to the connection portion; a horizontally extending portion that extends horizontally away from the connection portion; and a second vertical portion that is connected to the horizontally extending portion, the second vertical portion extending vertically down to connect to a section of the semiconductor substrate away from the HEMT.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1, 2, 9, 14 and 16-20 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Maxim et al. WO202212607
Regarding Claim 1, in Figs, 1, 6a, 6b, 7 and 9A-9C, Maxim et al. discloses an integrated circuit (IC) structure, comprising: a heat sink 56; a semiconductor substrate 14/30, comprising: a bulk wafer 12 (paragraph 0056) mounted on the heat sink; and a Front End of Line (FEOL) portion 20 formed over the bulk wafer, wherein the FEOL portion includes an active semiconductor device 21; and a Back End of Line (BEOL) portion 18 that comprises a thermally conductive bridge 24, wherein the thermally conductive bridge is configured to couple to the active semiconductor device 21, horizontally extend away from the active semiconductor device, and then connect back to the semiconductor substrate 14/30 on a section away from the active semiconductor device 21. (see paragraphs 0006, 0056, 0062 and 0069)
Regarding Claim 2, in paragraphs 0006, 0056, 0062 and 0069, the thermally conductive bridge 24 comprises a first vertical portion that couples to the active semiconductor device, a second vertical portion that connects back to the section of the semiconductor substrate away from the active semiconductor device, a horizontal section that is connected between the first vertical portion and the second vertical portion.
Regarding Claim 9, in paragraphs 0014 and 0061, wherein the active semiconductor device is a heterojunction bipolar transistor (HBT).
Regarding Claim 14, in paragraphs 0014 and 0061, it is disclosed that the active semiconductor device is a High Electron Mobility Transistor (HEMT).
Regarding Claim 16, a package substrate, wherein the heat sink 56 is part of the package substrate.
Regarding Claim 17, in Figs, 1, 6a, 6b, 7 and 9A-9C, Maxim et al. discloses an integrated circuit (IC) structure, comprising: a package substrate including a package substrate body and a metallic structure integrated into the package substrate; a semiconductor substrate, comprising: a bulk wafer 12 (paragraph 0056) attached to the metallic structure of the package substrate; and a Front End of Line (FEOL) portion 20 formed over the bulk wafer, wherein the FEOL portion includes an active semiconductor device; and a Back End of Line (BEOL) portion 18 that comprises a thermally conductive bridge 24, wherein the thermally conductive bridge is configured to couple to the active semiconductor device, horizontally extend away from the active semiconductor device, and then connect back to the semiconductor substrate on a section away from the active semiconductor device.
Regarding Claim 18, wherein the section away from the active semiconductor device comprises a conductive pad 36 (see paragraph 0062).
Regarding Claim 19, the semiconductor substrate comprises an active semiconductor layer with active regions 21 (see paragraph 0055) of the active semiconductor device; and a conductive pad 36 is attached to the active semiconductor layer (see paragraph 0062).
Regarding Claim 20, the metallic structure includes a heat sink positioned on a surface of the package substrate body, the bulk wafer being mounted to the heat sink 56 (see paragraph 0072)
Conclusion
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/FAZLI ERDEM/Primary Examiner, Art Unit 2812 9/23/2026
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