Prosecution Insights
Last updated: May 29, 2026
Application No. 18/660,812

TRANSFER PRINTING HIGH-PRECISION DEVICES

Final Rejection §103
Filed
May 10, 2024
Priority
Dec 30, 2021 — divisional of 12/016,131
Examiner
TRAN, BINH BACH THANH
Art Unit
2848
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
X Display Company Technology Limited
OA Round
2 (Final)
80%
Grant Probability
Favorable
3-4
OA Rounds
4m
Est. Remaining
93%
With Interview

Examiner Intelligence

Grants 80% — above average
80%
Career Allowance Rate
559 granted / 694 resolved
+12.5% vs TC avg
Moderate +12% lift
Without
With
+12.2%
Interview Lift
resolved cases with interview
Typical timeline
2y 5m
Avg Prosecution
19 currently pending
Career history
714
Total Applications
across all art units

Statute-Specific Performance

§101
0.2%
-39.8% vs TC avg
§103
85.9%
+45.9% vs TC avg
§102
12.3%
-27.7% vs TC avg
§112
1.2%
-38.8% vs TC avg
Black line = Tech Center average estimate • Based on career data from 694 resolved cases

Office Action

§103
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Objections Claims 19 – 22 are objected to because of the following informalities: Regarding claims 19 – 22, “the high-precision device” lacks antecedent basis. Appropriate correction is required. Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows: 1. Determining the scope and contents of the prior art. 2. Ascertaining the differences between the prior art and the claims at issue. 3. Resolving the level of ordinary skill in the pertinent art. 4. Considering objective evidence present in the application indicating obviousness or nonobviousness. This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention. Claim(s) 16 – 22, 36 is/are rejected under 35 U.S.C. 103 as being unpatentable over Cok (US 10714374). Regarding claim 16, Cok discloses an electronic device system, comprising: a target substrate (substrate 10, Fig. 7) including one or more substrate circuits (the circuits on the substrate 10 including integrated circuit 70, electrode 72, light pipe 24, structure 20…) having a specified circuit requirement (any requirement for the circuit depend upon the user’s preferences) comprising a first specified value (any value for the circuit depend upon the user’s preferences) for a first specified performance attribute (any performance attribute depend upon the user’s preferences) for devices integrated with the one or more substrate circuits; and an electronic device (the controller 30) disposed on the target substrate and electrically connected to the one or more substrate circuits (the controller 30 is part of the circuitry; therefore electrically connected to other components), wherein, the electronic device comprises a broken or separated tether (tether 32 attached to the component 30). Cok does not explicitly disclose the electronic device has first corresponding performance attribute that is within 1% of the first specified value of the first specified performance attribute in the specified circuit requirement. Cok suggests the component (30) is a controller in a circuitry having an integrated circuit (70, column 10, lines 39 - 43). It would have been obvious to one having skill in the art at the effective filing date of the invention to adjust the different in performance of all the components, either by software configuration or other tuning technique known in the art, to within 1% range in order to make sure the device operate accurately as intended. Regarding claim 17, Cok discloses the claimed invention as set forth in claim 16. Cok further suggests the electronic device is an electrical device, an optical device, an electro-optical device, a passive device, or an active device (column 17, lines 32 - 35). Regarding claim 18, Cok discloses the claimed invention as set forth in claim 16. Cok further suggests the characteristic is a performance attribute that is one of resistance, a current-voltage relationship, and a peak emission wavelength (light emitting diode; column 17, lines 32 - 35). Regarding claim 19, Cok discloses the claimed invention as set forth in claim 16. Cok further suggests the electronic device is a resistor, a micro-resistor, a capacitor, an inductor, a transistor, or a light-emitting diode (column 17, lines 32 - 35). Regarding claim 20, Cok discloses the claimed invention as set forth in claim 16. Cok further suggests the electronic device has a length or width, or both length and width, no greater than 200 microns (column 17, lines 14 – 18; column 2, lines 46 - 53). Regarding claim 21, Cok discloses the claimed invention as set forth in claim 16. Cok further suggests the electronic device comprises a device circuit (circuit of the device in Fig. 7) and connection posts (31) that extend from the device and are electrically connected to the device circuit, the target substrate (10) comprises substrate contact pads (20), and the connection posts electrically connect the device circuit to the substrate contact pad (the components in the same circuit are electrically connected to each other). Regarding claim 22, Cok discloses the claimed invention as set forth in claim 16. Cok further suggests multiple electronic devices (column 18, lines 10 - 12) disposed on the target substrate and wherein two or more of the multiple high-precision devices have a characteristic known to within 1% accuracy (discussed in claim 1). Regarding claim 36, Cok discloses the claimed invention as set forth in claim 16. Cok further suggests the first specified performance attribute and the first corresponding performance attribute comprise at least one of an electrical performance attribute (the intended performance of the electrical connection on the substrate 10; column 12, line 51), an optical performance attribute (the intended performance of the light pipes 24), and an electro-optical performance attribute (the intended performance of the optical fibers that conduct light 60 such as fiber-optic device). Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Cok (US 20200052152) discloses a substrate with precision component on the surface, Fig. 4F. Trindade (US 20190385885) discloses a substrate with precision component on the surface, Fig. 1. Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to BINH B TRAN whose telephone number is (571)272-9289. The examiner can normally be reached M-F 8:00 AM - 6:00 PM. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Timothy J Dole can be reached at 571-272-2229. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /BINH B TRAN/Primary Examiner, Art Unit 2848
Read full office action

Prosecution Timeline

May 10, 2024
Application Filed
May 29, 2024
Response after Non-Final Action
Oct 17, 2025
Non-Final Rejection mailed — §103
Mar 17, 2026
Response Filed
Mar 27, 2026
Final Rejection mailed — §103 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

3-4
Expected OA Rounds
80%
Grant Probability
93%
With Interview (+12.2%)
2y 5m (~4m remaining)
Median Time to Grant
Moderate
PTA Risk
Based on 694 resolved cases by this examiner. Grant probability derived from career allowance rate.

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