DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Arguments
Applicant’s arguments have been fully considered. Pending the manner by which the below informality and matter of indefiniteness (produced by the current amendment) are addressed by Applicant, further consideration and search will ascertain the fairness of currently cited prior art reading upon the claim, as well as patentability.
Claim Objections
Claim 21 is objected to due to the recitation of an informality.
The claim is amended to recite “…wherein the at least signal line is spaced apart from the power line and the read-out line…” within which there is deficient antecedent basis for “…the at least signal line…”; the claim is interpreted to instead recite “…wherein the at least one signal line is spaced apart from the power line and the read-out line…” (emphasis provided).
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Appropriate correction is required.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 21 – 25 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
i. Claim 21 is amended to recite “…wherein the at least signal line is spaced apart from the power line and the read-out line in the second direction…” (emphasis provided).
“…the at least one1 signal line…” as currently recited in the claim, “…comprises a gate line…” Figure 9 of the instant application illustrates gate lines (e.g. GWL, GCL) not as spaced apart from the power line (e.g. VSSL, VRL) and the read-out line (e.g. ROL), but intersecting therewith (emphasis provided).
Per Applicant’s arguments, the intent was for the claimed “…at least one signal line…” to encompass a data line (e.g. DL). However, such a recitation is not furnished until claim 22, at which point “…at least one signal line…” encompasses both “…a gate line…” and “…a data line…”; this remains problematic, as only one of these two is disclosed in the specification to be spaced apart from the power line and the read-out line.
Please rectify the inconsistency.
ii. Claims 22 – 25 depend from 21, inherit the above indicated deficiency and are rejected on similar grounds.
Allowable Subject Matter
Claims 1 – 4, 6 – 18, 20 are allowed.
The following is an examiner’s statement of reasons for allowance: the claimed invention is directed toward a fingerprint sensor comprising: a light emitting element disposed on a substrate, a first sensor transistor configured to control a sensing current based on a voltage of a sensor node, a second sensor transistor configured to supply a reset voltage to the sensor node, third sensor transistor and a power line.
i. Regarding Claim 1 the cited prior art fails to singularly or collectively disclose a fingerprint sensor comprising: a read-out line disposed on a substrate and extending in a first direction; a light receiving element disposed on the read-out line; a first sensor transistor configured to control a sensing current based on a voltage of a sensor node that is coupled to a first electrode of the light receiving element; a second sensor transistor configured to supply a reset voltage to the sensor node based on a reset signal; a third sensor transistor electrically connecting a first electrode of the first sensor transistor with the read-out line based on a gate signal; a power line disposed on a layer between the second sensor transistor and the read-out line and extending in the first direction, the power line overlapping the read-out line; a first active layer disposed on the substrate; a first gate layer disposed on the first active layer; a second gate layer disposed on the first gate layer; a third gate layer disposed on the second active layer; a first source metal layer disposed on the third gate layer; a second source metal layer disposed on the first source metal layer, comprising the power line; and a third source metal layer disposed on the second source metal layer, comprising the read-out line.
Thus, claim 1 is allowed.
ii. Claims 2 – 4, 6 – 11 depend from and inherit limitations of claim 1.
Thus, claims 2 – 4, 6 – 11 are allowed.
iii. Regarding Claim 12, the cited prior art fails to singularly or collectively disclose a fingerprint sensor comprising: a light receiving element disposed on a substrate; a first sensor transistor configured to control a sensing current based on a voltage of a sensor node that is coupled to a first electrode of the light receiving element; a second sensor transistor configured to supply a reset voltage to the sensor node based on a reset signal; a third sensor transistor electrically connecting a first electrode of the first transistor with a read-out line based on a gate signal; a first active layer disposed on the substrate and comprising a semiconductor area of the first sensor transistor; a first gate layer disposed on the first active layer and comprising a gate electrode of the first sensor transistor; a second gate layer disposed on the first gate layer; a second active layer disposed on the second gate layer and comprising a semiconductor area of the second sensor transistor; a third gate layer disposed on the second active layer and comprising a gate electrode of the second sensor transistor; a first source metal layer disposed on the third gate layer; a second source metal layer disposed on the first source metal layer and comprising a power line; and a third source metal layer disposed on the second source metal layer and comprising the read-out line overlapped with the power line.
Thus, claim 12 is allowed.
iv. Claims 13 – 17 depend from and inherit limitation of claim 12.
Thus, claims 13 – 17 are allowed.
v. Regarding Claim 18, the cited prior art fails to singularly or collectively disclose a display device comprising: a read-out line disposed on a substrate and extended in a first direction; a fingerprint sensor disposed on the read-out line and comprising a light receiving element; and a pixel including a light emitting element disposed on a same layer as the light receiving element, wherein the fingerprint sensor further comprising: a first sensor transistor configured to control a sensing current based on a voltage of a sensor node that is a first electrode of the light receiving element; a second sensor transistor configured to supply a reset voltage to the sensor node based on a reset signal; a third sensor transistor electrically connecting a first electrode of the first sensor transistor with the read-out line based on a gate signal; a power line disposed on a layer between the second sensor transistor and the read-out line and extending in the first direction and overlapping the read-out line; a first active layer disposed on the substrate; a first gate layer disposed on the first active layer; a second gate layer disposed on the first gate layer;
a second active layer disposed on the second gate layer; a third gate layer disposed on the second active layer; a first source metal layer disposed on the third gate layer; a second source metal layer disposed on the first source metal layer, comprising the power line; and a third source metal layer disposed on the second source metal layer, comprising the read-out line.
Thus, claim 18 is allowed.
vi. Claim 20 depends from and inherits limitations of claim 18.
Thus, claim 20 is allowed.
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Any comments considered necessary by applicant must be submitted no later than the payment of the issue fee and, to avoid processing delays, should preferably accompany the issue fee. Such submissions should be clearly labeled “Comments on Statement of Reasons for Allowance.”
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Claims 21 – 25 would be allowable if rewritten or amended to overcome the rejection(s) under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), 2nd paragraph, set forth in this Office action.
Inquiries
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Aaron Midkiff whose telephone number is (571)270-5875. The examiner can normally be reached Monday - Friday, 8:00am - 4:00pm.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Amr Awad can be reached at (571)272-7764. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/AARON MIDKIFF/
Examiner, Art Unit 2621
/AMR A AWAD/Supervisory Patent Examiner, Art Unit 2621
1 Per the above objection, in which is it is interpreted Applicant intends to find antecedent basis.
Prosecution Insights