DETAILED ACTION
The action is responsive to the following communications: the Application filed May 13, 2024 and Response to Election / Restriction filed June 29, 2026.
Claims 1-20 are pending. Claims 15-20 have been cancelled. Claims 1 and 8 are independent.
Notice of Pre-AIA or AIA Status
The present application is being examined under the first inventor to file provisions of the AIA .
Claim Objections
Claims 5 and 12 objected to because of the following informalities:
Claims 5 and 12 recite “a GIDL generator device”. It is unclear what the abbreviation in the claim term signifies. Appropriate correction is required.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of AIA 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1-4, 6, 8-11 and 13 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Shimura et al. (US 2019/0088342).
Regarding independent claim 1 and its method independent claim 8, Shimura et al. disclose a memory device comprising:
a memory array (e.g., FIG. 2: 20); and
control logic (21-26), operatively coupled with the memory array, to perform operations comprising:
receiving, from a requestor, a first request to suspend performance of a program operation being performed on the memory array (see e.g., FIG. 10: S102; and FIG. 11: Receive suspend command);
performing a modified array discharge sequence on the memory array, wherein during the modified array discharge sequence, a control signal applied to a select gate device is discharged to a discharge voltage prior to a voltage applied to one or more wordlines of the memory array being discharged (see e.g., FIG. 10: S102-S109; and FIG. 7, SGD,SGS to VSS and then WL VSS after VCREEPUP, and accompanying disclosure); and
causing the memory device to enter a suspend state (see e.g., FIG. 10: before S109; and FIG. 11: Suspend).
Regarding claims 2 and 9, which depends from claims 1 and 8, respectively, Shimura et al. disclose the program operation comprises a plurality of program phases and a plurality of program verify phases, and wherein a respective program verify phase follows each of the plurality of program phases (see e.g., FIGS. 10-11 and accompanying disclosure).
Regarding claims 3 and 10, which depends from claims 1 and 8, respectively, Shimura et al. disclose the requestor comprises a memory sub-system controller of a memory sub-system comprising the memory device (FIGS. 1-2 and accompanying disclosure).
Regarding claims 4 and 11, which depends from claims 1 and 8, respectively, Shimura et al. disclose during the modified array discharge sequence, the control signal applied to a select gate device and the voltage applied to one or more wordlines of the memory array are discharged from a pass reset voltage to the discharge voltage (e.g., FIG. 11 and accompanying disclosure).
Regarding claims 6 and 13, which depends from claims 1 and 8, respectively, Shimura et al. disclose the control logic is to perform operations further comprising: receiving, from the requestor, a second request to perform a memory access operation on the memory array while the program operation is suspended; and initiating the memory access operation on the memory array (e.g., FIG. 10 and accompanying disclosure).
Claim Rejections - 35 USC § 103
The following is a quotation of AIA 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 5 and 12 are rejected under AIA 35 U.S.C. 103 as being unpatentable over Shimura et al. (US 2019/0088342) in view of McNeil (US 2020/0152272).
Regarding claims 5 and 12, Shimura et al. teach the limitations of claims 1 and 8, respectively.
Shimura et al. further teach during the modified array discharge sequence, a control signal applied to a GIDL generator device is discharged to the discharge voltage prior to the control signal applied to the select gate device being discharge to the discharge voltage (see e.g., FIGS. 10-11 and accompanying disclosure).
McNeil teaches the deficiencies in e.g., FIG. 4A and accompanying disclosure, i.e., GG discharging prior to Select Line discharging.
It would have been obvious to one of ordinary skill in the art before the effective filing date to apply the teaching of McNeil to the teaching of Shimura et al. such that a flash memory, as taught by Shimura et al., utilizes a GG control line, as taught by McNeil, for the purpose of achieving the steady state of memory device.
Allowable Subject Matter
Claims 7 and 14 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to SUNG IL CHO whose telephone number is (571)270-0137. The examiner can normally be reached on M-Th, 7:30AM-5PM; Every other F, 7:30AM-4PM EST.
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/SUNG IL CHO/Primary Examiner, Art Unit 2825
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