Prosecution Insights
Prosecution Insights
Tech Center 2800 • Art Units: 2825
This examiner grants 91% of resolved cases
Sung Il Cho is an examiner in Tech Center 2800 and Art Unit 2825, with 603 resolved cases. The allowance rate is 91.4%, which is a very high baseline for success. The interview lift is 8.5%, showing that interviews provide a meaningful increase in the probability of allowance over the 91.4% baseline. This indicates that direct engagement with the examiner is a productive strategy in Art Unit 2825.
The median days to allowance is 744, which is a relatively fast timeline for the 603 resolved cases. This 744-day metric makes Art Unit 2825 an efficient unit for patent seekers. Practitioners should consider the 8.5% interview lift as a way to further enhance the already high 91.4% allowance rate. The combination of speed and high success is a defining feature of this examiner's profile. Attorneys can use the 744-day median to forecast a quick resolution for applications in Tech Center 2800.
| App # | Title | Status | Assignee |
|---|---|---|---|
| 19005393 | METHOD OF OPERATING NONVOLATILE MEMORY DEVICE AND NONVOLATILE MEMORY DEVICE | Final Rejection | Samsung Electronics Co., Ltd. |
| 18669633 | MEMORY DEVICES AND OPERATING METHODS THEREOF | Final Rejection | Samsung Electronics Co., Ltd. |
| 18977717 | Memory with Serialized Redundancy Interface | Non-Final OA | QUALCOMM Incorporated |
| 19176131 | MANAGING PROGRAM OPERATIONS IN MEMORY SYSTEMS | Non-Final OA | Yangtze Memory Technologies Co., Ltd. |
| 19172193 | OPERATING METHOD FOR A MEMORY, A MEMORY, AND A MEMORY SYSTEM | Non-Final OA | Yangtze Memory Technologies Co., Ltd. |
| 18739363 | PRE-CHARGE SYSTEM FOR PERFORMING TIME-DIVISION PRE-CHARGE UPON BIT-LINE GROUPS OF MEMORY ARRAY AND ASSOCIATED PRE-CHARGE METHOD | Non-Final OA | MEDIATEK INC. |
| 18444776 | DUAL-RAIL MEMORY DEVICE WITH HIGH SPEED AND LOW POWER CONSUMPTION | Final Rejection | MEDIATEK INC. |
| 18444754 | NEGATIVE BIT LINE CONTROL MECHANISM | Final Rejection | MEDIATEK INC. |
| 18371441 | MEMORY WITH FLY-BITLINES THAT WORK WITH SINGLE-ENDED SENSING AND ASSOCIATED MEMORY ACCESS METHOD | Non-Final OA | MEDIATEK INC. |
| 18571407 | AUGMENTED MEMORY COMPUTING: A NEW PATHWAY FOR EFFICIENT AI COMPUTATIONS | Final Rejection | UNIVERSITY OF SOUTHERN CALIFORNIA |
| 19004450 | DEVICE INCLUDING MEMORY CELLS STORING MULTI-BIT DATA AND AN OPERATION METHOD THEREOF | Non-Final OA | SK hynix Inc. |
| 18496735 | MEMORY DEVICE FOR DRIVING CHARGE PUMPS RESPECTIVELY INCLUDED IN MEMORY DIES | Non-Final OA | SK hynix Inc. |
| 19096833 | MEMORY SYSTEM | Non-Final OA | KIOXIA CORPORATION |
| 19087374 | SOURCE LINE CONFIGURATIONS FOR A MEMORY DEVICE | Non-Final OA | Micron Technology, Inc. |
| 19062975 | SINGLE PLATE CONFIGURATION AND MEMORY ARRAY OPERATION | Non-Final OA | Micron Technology, Inc. |
| 19054266 | LEVEL SHIFTING IN ALL LEVELS PROGRAMMING OF A MEMORY DEVICE IN A MEMORY SUB-SYSTEM | Non-Final OA | Micron Technology, Inc. |
| 19036948 | NAND ARRAY INDUCTORS | Non-Final OA | Micron Technology, Inc. |
| 18829440 | PROGRAM CONTINUATION STRATEGIES AFTER MEMORY DEVICE POWER LOSS | Non-Final OA | Micron Technology, Inc. |
| 18755062 | PERFORMING DATA INTEGRITY CHECKS TO IDENTIFY DEFECTIVE WORDLINES | Non-Final OA | Micron Technology, Inc. |
| 18662962 | MITIGATION OF CHARGE-LOSS IN SUSPENDED PROGRAM STATE IN A MEMORY DEVICE | Non-Final OA | Micron Technology, Inc. |
| 18942973 | CIRCUITRY FOR ADJUSTING RETENTION VOLTAGE OF A STATIC RANDOM ACCESS MEMORY (SRAM) | Non-Final OA | STMicroelectronics International N.V. |
| 18619699 | BITCELL PROCESS COMPENSATED READ ASSIST SCHEME FOR SRAM | Non-Final OA | STMicroelectronics International N.V. |
| 19059384 | MEMORY DEVICE WITH ADDITIONAL WRITE BIT LINES | Non-Final OA | Taiwan Semiconductor Manufacturing Company, Ltd. |
| 19043856 | ANTI-FUSE DEVICE AND METHOD | Non-Final OA | TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD. |
| 19011055 | MEMORY DEVICE WITH A BIAS CIRCUIT | Non-Final OA | Taiwan Semiconductor Manufacturing Company, Ltd. |
| 18967206 | MEMORY DEVICE WITH SIGNAL EDGE SHARPENER CIRCUITRY | Non-Final OA | Taiwan Semiconductor Manufacturing Company, Ltd. |
| 18769407 | MEMORY DEVICE INCLUDING DUAL CONTROL CIRCUITS | Final Rejection | TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD. |
| 17120702 | SRAM MEMORY HAVING SUBARRAYS WITH COMMON IO BLOCK | Final Rejection | Taiwan Semiconductor Manufacturing Company, Ltd. |
| 19176369 | Pre-Charging Bit Lines Through Charge-Sharing | Non-Final OA | Taiwan Semiconductor Manufacturing Company, Limited. |
| 18755149 | CIRCUIT FOR MULTIPORT REGISTER FILE' | Non-Final OA | Arm Limited |
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