Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
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Specification
The specification is objected to as failing to provide proper antecedent basis for the claimed subject matter. See 37 CFR 1.75(d)(1) and MPEP § 608.01(o). Correction of the following is required:
The cap layer of claim 8 is not adequately described in the Fig. 1, nor in the text of the Specification, thus the location and extent of the cap layer is not clear.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 1, 4, 7, 9, 11 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Lin et al. (US 20210066483 A1) hereafter referred to as Lin
In regard to claim 1 Lin teaches [“FIGS. 1A, 1B and 1C illustrate a cross-sectional view, a top-view and a perspective view of some embodiments of a high electron mobility transistor (HEMT) device comprising a cap structure that continuously extends along a length of a source contact”] a high electron mobility transistor, comprising:
a) a substrate [“substrate 102”];
b) a channel layer [“channel layer 104”] located above the substrate;
c) a potential energy barrier [“active layer 108 comprises a ternary III/V semiconductor. For example, in some embodiments, the channel layer 104 may comprise gallium nitride (GaN) and the active layer 108 may comprise aluminum gallium nitride (AlGaN)”] layer located on the channel layer;
d) a drain electrode [“drain contact 110”] and a source electrode [“source contact 116”], configured to at least extend downward to [see Fig. 1A] an upper surface of the potential energy barrier layer;
e) a gate conductor [“gate electrode 112”] located above the potential energy barrier layer; and
f) a current limiting structure [“the cap structure 118 comprises a horizontally extending portion 118h and a vertically extending portion 118v”] configured to locate on [the Examiner notes that “on” does not mean touching, see that 118h is on 108 and 118v is on and touching 108 ] the potential energy barrier layer and extend upward along the surface [“horizontally extending portion 118h of the cap structure 118 directly contacts a sidewall of the source contact 116. The horizontally extending portion 118h, in some embodiments, is spaced apart from the active layer 108 by the passivation layer 122” see that 118h has a finite thickness in the vertical direction] of a first side of the source electrode to reduce [“By being coupled to the source contact 116 and by acting as a Schottky contact, the cap structure 118 partially depletes the channel region along the heterojunction 124 and thus, reduces the saturation current of the HEMT device when in the enhancement mode (e.g., when the HEMT device is “ON”)”] the saturation current of the transistor, wherein the first side of the source electrode is [see Fig. 1A] a side near the gate conductor.
In regard to claim 4 Lin teaches wherein the current limiting structure is located on [see Fig. 1A] an upper surface of the potential energy barrier layer.
In regard to claim 7 Lin teaches wherein a material of the current limiting structure [“As shown in the cross-sectional view 1200 of FIG. 12, a gate electrode material 1202 is deposited over the masking layer 1002 and within the cap cavity (902 of FIG. 11) and the gate cavity (904 of FIG. 11)” “As shown in the cross-sectional view 1300 of FIG. 13, in some embodiments, the gate electrode material 1202 of FIG. 12 may undergo a planarization process (e.g., chemical mechanical planarization process), to form a cap structure 118 within the cap cavity (902 of FIG. 11) and a gate electrode 112 within the gate cavity (904 of FIG. 11)”] and the material of the gate conductor is the same.
In regard to claim 9 Lin teaches further comprising a dielectric layer [see Fig. 1A “gate barrier layer 114 is formed on an area of the active layer 108 that is meant for a gate electrode”] located between the potential energy barrier layer and the gate conductor.
In regard to claim 11 Lin teaches wherein a pinch-off voltage below the current limiting structure is lower [see this is because the gate has the “gate barrier layer 114 is formed on an area of the active layer 108 that is meant for a gate electrode”, so the presence of the gate barrier reduces the effect, because see that 118 and 112 are the same material see “As shown in the cross-sectional view 1200 of FIG. 12, a gate electrode material 1202 is deposited over the masking layer 1002 and within the cap cavity (902 of FIG. 11) and the gate cavity (904 of FIG. 11)” “As shown in the cross-sectional view 1300 of FIG. 13, in some embodiments, the gate electrode material 1202 of FIG. 12 may undergo a planarization process (e.g., chemical mechanical planarization process), to form a cap structure 118 within the cap cavity (902 of FIG. 11) and a gate electrode 112 within the gate cavity (904 of FIG. 11)”] than a pinch-off voltage of the channel below the gate conductor.
Claim(s) 1, 2, 4, 5, 7-11 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Wang et al. (CN 107154426 A) hereafter referred to as Wang. Lin et al. (US 20210066483 A1) hereafter referred to as Lin is provided as evidence.
In regard to claim 1 Wang teaches a [see Fig. 7 see title “silicon-based GaN HEMT”] high electron mobility transistor, comprising:
a) a substrate [see “silicon substrate” ];
b) a channel layer [see “intrinsic GaN channel layer” below the “intrinsic AlGaN barrier layer”] located above the substrate;
c) a potential energy barrier [“intrinsic AlGaN barrier layer”] layer located on the channel layer;
d) a drain electrode [“etching the source and drain ohm contacting area, prepared by electron-beam evaporating ohm contact metal (Ti/Al/Ni/Au = 20nm/150nm/50nm/80nm) and finally peeling, rapid thermal annealing in nitrogen environment (850 degrees centigrade, 30s), forming ohmic contact, as shown in FIG. 5”] and a source electrode, configured to at least extend downward to an upper surface of the potential energy barrier layer;
e) a gate conductor [“after forming, photoetching grid electrode region, prepared by electron beam evaporation grid metal (Ni/Au=50nm/250nm) and peeling off to form the device gate metal after the cross sectional view as shown in FIG. 6”] located above the potential energy barrier layer; and
f) a current limiting structure [“preparing the Schottky contact metal (Ni/Au=50nm/150nm) of the source end and stripping by electron beam evaporation, to form the device cross sectional view as shown in FIG. 7”] configured to locate on the potential energy barrier layer and extend upward along the surface [see Fig. 7] of a first side of the source electrode to reduce the saturation current [“so it can be two-dimensional electron gas to high pressure has a certain shielding effect and positive because in the three-end device withstand voltage test, with negative movement with the grid voltage, a two-dimensional electron gas is gradually exhausted, shielding effect is weakened, the off-state breakdown voltage after breaking is gradually reduced, until depletion to the greatest extent, voltage saturation. ohm off-state breakdown and the source end which indicates that silicon-based GaN HEMT injection related to source end ohm contact forming process in the generation of damage in a high pressure process, injection current is very large, resulting in breakdown voltage of the device is reduced. along such a breakdown mechanism, the source end of silicon-based GaN HEMT ohm contact improvement to source end Schottky-ohm contact, namely the ohm contact on the basis of multi-adding a section of Schottky contact. the Schottky contact metal has the off-state breakdown voltage and the shielding function of the two-dimensional electron gas equally, when the device is high, the Schottky contact metal shields the influence of a portion of high pressure, reduces the source-end ohm contact of injection so as to improve the silicon-based GaN HEMT” i.e. due to lower current injection, the saturation current is lower. See evidence of Lin about the Schottky effect on saturation current, see paragraph 0011, 0016, 0022, 0044 “In some embodiments, the cap structure 118 comprises a first material that has a higher work function than the active layer 108 such that the cap structure 118 is coupled to the active layer 108 as a Schottky contact” “In the enhancement mode, the current at the heterojunction eventually reaches a saturation current which is the maximum current that can flow along the heterojunction before breakdown” “when the HEMT device is in the enhancement mode, the cap structure partially depletes the channel region (e.g., partially “turns off” current between source and drain) and the saturation current is reduced. As a result, during high voltage applications, the HEMT device with the cap structure has a reduced saturation current and device failure is mitigated” “By being coupled to the source contact 116 and by acting as a Schottky contact, the cap structure 118 partially depletes the channel region along the heterojunction 124 and thus, reduces the saturation current of the HEMT device when in the enhancement mode (e.g., when the HEMT device is “ON”)”] of the transistor, wherein the first side of the source electrode is a side [see Fig. 7] near the gate conductor.
In regard to claim 2 Wang teaches wherein the current limiting structure extends from the potential energy barrier layer [see Fig. 7] to an upper surface of the source electrode [see Fig. 7] along the surface of the first side of the source electrode, and covers at least a portion [see Fig. 7] of the upper surface of the source electrode.
In regard to claim 4 Wang teaches wherein the current limiting structure is located on [see Fig. 7] an upper surface of the potential energy barrier layer.
In regard to claim 5 Wang teaches wherein the current limiting structure fully covers the upper [see Fig. 7] surface of the source electrode.
In regard to claim 7 Wang teaches wherein a material of the current limiting structure [see “evaporation grid metal (Ni/Au=50nm/250nm) and peeling off to form the device gate metal” “preparing the Schottky contact metal (Ni/Au=50nm/150nm)” see both are Ni/Au] and the material of the gate conductor is the same.
In regard to claim 8 Wang teaches further comprising a cap layer [see passivation “on the structure basis as shown in FIG. 7, form 200nm on its surface with PECVD Si3N4 dielectric passivation layer, as shown in FIG. 8”] located on the potential energy barrier layer.
In regard to claim 9 Wang teaches further comprising a dielectric layer [see Fig. 7 see Si3N4 under the gate] located between the potential energy barrier layer and the gate conductor.
In regard to claim 10 Wang teaches further comprising a buffer layer [“As shown in FIG. 3, first on the silicon substrate, using MOCVD to grow a layer of carbon-doped GaN or AlN buffer layer”] located between the substrate and the channel layer.
In regard to claim 11 Wang teaches wherein a pinch-off voltage below the current limiting structure is lower [see this is because the gate has the Si3N4 under the gate, so the presence of the gate insulation reduces the effect, see “evaporation grid metal (Ni/Au=50nm/250nm) and peeling off to form the device gate metal” “preparing the Schottky contact metal (Ni/Au=50nm/150nm)” see both are Ni/Au] than a pinch-off voltage of the channel below the gate conductor.
Claim(s) 12, 15, 18, 20 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Lin et al. (US 20210066483 A1) hereafter referred to as Lin
In regard to claim 12 Lin teaches [“FIGS. 1A, 1B and 1C illustrate a cross-sectional view, a top-view and a perspective view of some embodiments of a high electron mobility transistor (HEMT) device comprising a cap structure that continuously extends along a length of a source contact” “FIGS. 3-17 illustrate cross-sectional views of some embodiments of a method of forming a HEMT device having a cap structure contacting a source contact”] a method of forming a high electron mobility transistor, the method comprising:
a) forming a source electrode [see Fig. 8 “source contact 116 and a drain contact 110”] and a drain electrode on a potential energy barrier [108 “in some embodiments, the channel layer 104 may comprise gallium nitride (GaN) and the active layer 108 may comprise aluminum gallium nitride (AlGaN)”] layer; and
b) simultaneously forming a gate conductor [“As shown in the cross-sectional view 1200 of FIG. 12, a gate electrode material 1202 is deposited over the masking layer 1002 and within the cap cavity (902 of FIG. 11) and the gate cavity (904 of FIG. 11)” “As shown in the cross-sectional view 1300 of FIG. 13, in some embodiments, the gate electrode material 1202 of FIG. 12 may undergo a planarization process (e.g., chemical mechanical planarization process), to form a cap structure 118 within the cap cavity (902 of FIG. 11) and a gate electrode 112 within the gate cavity (904 of FIG. 11)”] and a current limiting structure on [the Examiner notes that “on” does not mean touching, see that 118h is on 108 and 118v is on and touching 108 ] the potential energy barrier layer,
c) wherein the current limiting structure [“the cap structure 118 comprises a horizontally extending portion 118h and a vertically extending portion 118v” “horizontally extending portion 118h of the cap structure 118 directly contacts a sidewall of the source contact 116. The horizontally extending portion 118h, in some embodiments, is spaced apart from the active layer 108 by the passivation layer 122” see that 118h has a finite thickness in the vertical direction] extends upward along the surface of a first side of the source electrode to reduce [“By being coupled to the source contact 116 and by acting as a Schottky contact, the cap structure 118 partially depletes the channel region along the heterojunction 124 and thus, reduces the saturation current of the HEMT device when in the enhancement mode (e.g., when the HEMT device is “ON”)”] the saturation current of the transistor, and wherein the first side of the source electrode is [see Fig. 1A] a side near the gate conductor.
In regard to claim 15 Lin teaches wherein the current limiting structure is located on [see Fig. 1A] an upper surface of the potential energy barrier layer.
In regard to claim 18 Lin teaches wherein a material of the current limiting structure [“As shown in the cross-sectional view 1200 of FIG. 12, a gate electrode material 1202 is deposited over the masking layer 1002 and within the cap cavity (902 of FIG. 11) and the gate cavity (904 of FIG. 11)” “As shown in the cross-sectional view 1300 of FIG. 13, in some embodiments, the gate electrode material 1202 of FIG. 12 may undergo a planarization process (e.g., chemical mechanical planarization process), to form a cap structure 118 within the cap cavity (902 of FIG. 11) and a gate electrode 112 within the gate cavity (904 of FIG. 11)”] and the material of the gate conductor is the same.
In regard to claim 20 Lin teaches further comprising forming a dielectric layer [see Fig. 1A “gate barrier layer 114 is formed on an area of the active layer 108 that is meant for a gate electrode”] between the potential energy barrier layer and the gate conductor.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claim(s) 3 is/are rejected under 35 U.S.C. 103 as being unpatentable over Wang et al. (CN 107154426 A) hereafter referred to as Wang in view of Brierley et al. (US 20100219452 A1) hereafter referred to as Brierley
In regard to claim 3 Wang does not specifically teach wherein the current limiting structure extends to the interior of the potential energy barrier layer.
See Brierley Fig. 6 see paragraph 0033 “The gate electrode 26 (and, possibly a drift region) is recessed completely through the GaN and AlN cap layers 16', 36 and partially through the AlGaN Schottky layer 12. By removing the GaN/AlN cap layer 16', 36, the extra induced two-dimensional electron gas charge that comes from the AlN (or high Al composition AlGaN) cap layer is eliminated; by continuing to etch through the AlGaN Schottky layer 12 the 2DEG charge is reduced even further through the effect of thinning the AlGaN (FIG. 2)”.
Thus, it would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains to modify Wang to include wherein the current limiting structure extends to the interior of the potential energy barrier layer.
Thus it would be obvious to combine the references to arrive at the claimed invention.
The motivation is to further reduce and better control the 2DEG of the HEMT under the Schottky contact metal of Wang.
Claim(s) 6 is/are rejected under 35 U.S.C. 103 as being unpatentable over Wang et al. (CN 107154426 A) hereafter referred to as Wang in view of Lin et al. (US 20210066483 A1) hereafter referred to as Lin
In regard to claim 6 Wang does not specifically teach wherein the current limiting structure comprises a plurality of parts arranged in parallel and at intervals along a first direction, wherein the first direction is perpendicular to the stacking direction of the transistor and the channel extension direction of the transistor.
See Lin Fig. 2 see paragraph 0026 “The top-view 200B of FIG. 2B comprises the same features as the top-view 100B of FIG. 1B, except that the cap structure 118 comprises multiple cap segments 118s. Each cap segment 118s is spaced from a nearest neighbor by a first distance di. In some embodiments, the minimum value of the first distance di may be, for example, approximately 0.5 micrometers. In some embodiments, from the top-view 200B perspective, the multiple cap segments 118s of the cap structure 118 cover approximately 5% to approximately 10% less of a region of the active layer 108 compared to the cap structure 118 of FIG. 1B that continuously extends along the length of the source contact 116 and covers 100% of the region of the active layer 108. In some embodiments, the second width w.sub.2, the third width w.sub.3, and/or the first distance di of the cap structure 118 with multiple cap segments 118s may be increased or decreased to adjust the desired saturation current of the HEMT device, which provides more flexibility in designing a reliable HEMT device compared to the cap structure 118 that continuously extends along the length of the source contact 116 in FIG. 1B”.
Thus, it would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains to modify Wang to include wherein the current limiting structure comprises a plurality of parts arranged in parallel and at intervals along a first direction, wherein the first direction is perpendicular to the stacking direction of the transistor and the channel extension direction of the transistor.
Thus it would be obvious to combine the references to arrive at the claimed invention.
The motivation is to get more flexibility in designing a reliable HEMT device by ability to adjust the desired saturation current of the HEMT device.
Claim(s) 12, 13, 15-20 is/are rejected under 35 U.S.C. 103 as being unpatentable over Wang et al. (CN 107154426 A) hereafter referred to as Wang in view of Lin et al. (US 20210066483 A1) hereafter referred to as Lin. Lin is also provided as evidence.
In regard to claim 12 Wang teaches a method [“FIG. 3 to FIG. 8 is the model structure silicon in this invention each step of manufacturing a GaN base HEMT”] of forming a high electron mobility transistor, the method comprising:
a) forming a source electrode [“shown in FIG. 4, structure based on photo-etching, etching the source and drain ohm contacting area, prepared by electron-beam evaporating ohm contact metal (Ti/Al/Ni/Au = 20nm/150nm/50nm/80nm) and finally peeling, rapid thermal annealing in nitrogen environment (850 degrees centigrade, 30s), forming ohmic contact, as shown in FIG. 5”] and a drain electrode on a potential energy barrier [“As shown in FIG. 3, first on the silicon substrate, using MOCVD to grow a layer of carbon-doped GaN or AlN buffer layer, then re-growing a layer of intrinsic GaN channel layer, grown on the intrinsic AlGaN barrier layer, finishing epitaxial growth of silicon based AlGaN/GaN material”] layer; and
b) forming a gate conductor [“after forming, photoetching grid electrode region, prepared by electron beam evaporation grid metal (Ni/Au=50nm/250nm) and peeling off to form the device gate metal after the cross sectional view as shown in FIG. 6”] and a current limiting structure [“then preparing the Schottky contact metal (Ni/Au=50nm/150nm) of the source end and stripping by electron beam evaporation, to form the device cross sectional view as shown in FIG. 7”] on the potential energy barrier layer,
c) wherein the current limiting structure extends upward [see Fig. 7] along the surface of a first side of the source electrode to reduce the saturation current [“so it can be two-dimensional electron gas to high pressure has a certain shielding effect and positive because in the three-end device withstand voltage test, with negative movement with the grid voltage, a two-dimensional electron gas is gradually exhausted, shielding effect is weakened, the off-state breakdown voltage after breaking is gradually reduced, until depletion to the greatest extent, voltage saturation. ohm off-state breakdown and the source end which indicates that silicon-based GaN HEMT injection related to source end ohm contact forming process in the generation of damage in a high pressure process, injection current is very large, resulting in breakdown voltage of the device is reduced. along such a breakdown mechanism, the source end of silicon-based GaN HEMT ohm contact improvement to source end Schottky-ohm contact, namely the ohm contact on the basis of multi-adding a section of Schottky contact. the Schottky contact metal has the off-state breakdown voltage and the shielding function of the two-dimensional electron gas equally, when the device is high, the Schottky contact metal shields the influence of a portion of high pressure, reduces the source-end ohm contact of injection so as to improve the silicon-based GaN HEMT” i.e. due to lower current injection, the saturation current is lower. See evidence of Lin about the Schottky effect on saturation current, see paragraph 0011, 0016, 0022, 0044 “In some embodiments, the cap structure 118 comprises a first material that has a higher work function than the active layer 108 such that the cap structure 118 is coupled to the active layer 108 as a Schottky contact” “In the enhancement mode, the current at the heterojunction eventually reaches a saturation current which is the maximum current that can flow along the heterojunction before breakdown” “when the HEMT device is in the enhancement mode, the cap structure partially depletes the channel region (e.g., partially “turns off” current between source and drain) and the saturation current is reduced. As a result, during high voltage applications, the HEMT device with the cap structure has a reduced saturation current and device failure is mitigated” “By being coupled to the source contact 116 and by acting as a Schottky contact, the cap structure 118 partially depletes the channel region along the heterojunction 124 and thus, reduces the saturation current of the HEMT device when in the enhancement mode (e.g., when the HEMT device is “ON”)”] of the transistor, and wherein the first side of the source electrode is a side [see Fig. 7] near the gate conductor
does not teach “simultaneously”.
See “evaporation grid metal (Ni/Au=50nm/250nm) and peeling off to form the device gate metal” “preparing the Schottky contact metal (Ni/Au=50nm/150nm)” see both are Ni/Au.
See Lin teaches “FIGS. 1A, 1B and 1C illustrate a cross-sectional view, a top-view and a perspective view of some embodiments of a high electron mobility transistor (HEMT) device comprising a cap structure that continuously extends along a length of a source contact” “in some embodiments, the channel layer 104 may comprise gallium nitride (GaN) and the active layer 108 may comprise aluminum gallium nitride (AlGaN)” “By being coupled to the source contact 116 and by acting as a Schottky contact, the cap structure 118 partially depletes the channel region along the heterojunction 124 and thus, reduces the saturation current of the HEMT device when in the enhancement mode (e.g., when the HEMT device is “ON”)” “As shown in the cross-sectional view 1200 of FIG. 12, a gate electrode material 1202 is deposited over the masking layer 1002 and within the cap cavity (902 of FIG. 11) and the gate cavity (904 of FIG. 11)” “As shown in the cross-sectional view 1300 of FIG. 13, in some embodiments, the gate electrode material 1202 of FIG. 12 may undergo a planarization process (e.g., chemical mechanical planarization process), to form a cap structure 118 within the cap cavity (902 of FIG. 11) and a gate electrode 112 within the gate cavity (904 of FIG. 11)”. See the use of masking layer 1002, “the masking layer 1002 is patterned to re-open the cap cavity 902 and the gate cavity 904”, see in Fig. 12 that 1202 is also formed above source 116, and see that the masking and planarization technique can form the gate and Schottky contact metal simultaneously.
Thus, it would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains to modify Wang to use “simultaneously”.
Thus it would be obvious to combine the references to arrive at the claimed invention.
The motivation is to simplify design and manufacturing of the Ni/Au metal deposition to a single step by using suitable masking and also obtain good reliability by reducing complexity.
In regard to claim 13 Wang and Lin as combined teaches wherein the current limiting structure extends from the potential energy barrier layer [see combination, see Wang Fig. 7] to an upper surface of the source electrode along the side surface of one side of the source electrode, and covers at least a portion [see combination, see Wang Fig. 7] of the upper surface of the source electrode.
In regard to claim 15 Wang and Lin as combined teaches wherein the current limiting structure is located on [see combination, see Wang Fig. 7] an upper surface of the potential energy barrier layer.
In regard to claim 16 Wang and Lin as combined teaches wherein the current limiting structure fully covers [see combination, see Wang Fig. 7] the upper surface of the source electrode.
In regard to claim 17 Wang and Lin as combined does not specifically teach wherein the current limiting structure comprises a plurality of parts arranged in parallel and at intervals along a first direction, wherein the first direction is perpendicular to the stacking direction of the transistor and the channel extension direction of the transistor.
See Lin Fig. 2 see paragraph 0026 “The top-view 200B of FIG. 2B comprises the same features as the top-view 100B of FIG. 1B, except that the cap structure 118 comprises multiple cap segments 118s. Each cap segment 118s is spaced from a nearest neighbor by a first distance di. In some embodiments, the minimum value of the first distance di may be, for example, approximately 0.5 micrometers. In some embodiments, from the top-view 200B perspective, the multiple cap segments 118s of the cap structure 118 cover approximately 5% to approximately 10% less of a region of the active layer 108 compared to the cap structure 118 of FIG. 1B that continuously extends along the length of the source contact 116 and covers 100% of the region of the active layer 108. In some embodiments, the second width w.sub.2, the third width w.sub.3, and/or the first distance di of the cap structure 118 with multiple cap segments 118s may be increased or decreased to adjust the desired saturation current of the HEMT device, which provides more flexibility in designing a reliable HEMT device compared to the cap structure 118 that continuously extends along the length of the source contact 116 in FIG. 1B”.
Thus, it would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains to modify Wang to include wherein the current limiting structure comprises a plurality of parts arranged in parallel and at intervals along a first direction, wherein the first direction is perpendicular to the stacking direction of the transistor and the channel extension direction of the transistor.
Thus it would be obvious to combine the references to arrive at the claimed invention.
The motivation is to get more flexibility in designing a reliable HEMT device by ability to adjust the desired saturation current of the HEMT device.
In regard to claim 18 Wang and Lin as combined teaches wherein a material of the current limiting structure [see combination Lin “simultaneously”] and the material of the gate conductor is the same.
In regard to claim 19 Wang and Lin as combined teaches further comprising:
a) forming a buffer layer [see Wang “As shown in FIG. 3, first on the silicon substrate, using MOCVD to grow a layer of carbon-doped GaN or AlN buffer layer, then re-growing a layer of intrinsic GaN channel layer, grown on the intrinsic AlGaN barrier layer, finishing epitaxial growth of silicon based AlGaN/GaN material”] on a substrate;
b) forming a channel layer [i.e. intrinsic GaN channel layer] on the buffer layer; and
c) forming the potential energy barrier [i.e. intrinsic AlGaN barrier layer] layer on the channel layer.
In regard to claim 20 Wang and Lin as combined teaches further comprising forming a dielectric layer [see Wang Fig. 7 see Si3N4 under the gate “the good epitaxial growth of the AlGaN/GaN material organic cleaning, with flowing deionized water after cleaning into HCL: H2O=1: 10 solution to wash for 1 to 2min, and it can form a layer of thin gate dielectric layer on its surface by PECVD, ICPCVD or LPCVD”] between the potential energy barrier layer and the gate conductor.
Claim(s) 14 is/are rejected under 35 U.S.C. 103 as being unpatentable over Wang and Lin as combined and further in view of Brierley et al. (US 20100219452 A1) hereafter referred to as Brierley
In regard to claim 14 Wang and Lin as combined does not specifically teach wherein the current limiting structure extends to the interior of the potential energy barrier layer.
See Brierley Fig. 6 see paragraph 0033 “The gate electrode 26 (and, possibly a drift region) is recessed completely through the GaN and AlN cap layers 16', 36 and partially through the AlGaN Schottky layer 12. By removing the GaN/AlN cap layer 16', 36, the extra induced two-dimensional electron gas charge that comes from the AlN (or high Al composition AlGaN) cap layer is eliminated; by continuing to etch through the AlGaN Schottky layer 12 the 2DEG charge is reduced even further through the effect of thinning the AlGaN (FIG. 2)”.
Thus, it would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains to modify Wang to include wherein the current limiting structure extends to the interior of the potential energy barrier layer.
Thus it would be obvious to combine the references to arrive at the claimed invention.
The motivation is to further reduce and better control the 2DEG of the HEMT under the Schottky contact metal of Wang.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to SITARAMARAO S YECHURI whose telephone number is (571)272-8764. The examiner can normally be reached M-F 8:00-4:30 PM.
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/SITARAMARAO S YECHURI/ Primary Examiner, Art Unit 2893
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