DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1, 7, 9, 11, 14-16, and 20 are rejected under 35 U.S.C. 103 as being unpatentable over Eisele et al. (US 2023/0369529) in view of Yagi et al. (US 2022/0140156).
In reference to claim 1, Eisele et al. (US 2023/0369529), hereafter “Eisele,” discloses a photodetector, with reference to Figure 7, comprising:
a semiconductor layer having a top surface on a first side, wherein the semiconductor layer is configured to allow light to enter via the first side 106, the semiconductor layer comprising:
a body having a first type of doping (p-type);
a first region 126 having a second type of doping (n-type) different from the first type; and
wherein the semiconductor layer further comprises a junction formed between the body and the first region,
wherein the junction is configured to have respective surface area that is a second fraction of the surface area of the top surface; and
an electrode 104 coupled to the first region, paragraph 203.
Eisele does not disclose wherein a first fraction of a surface area of the top surface of the semiconductor layer comprises a surface topography; or
wherein the second fraction is smaller than the first fraction.
Yagi et al. (US 2022/0140156), hereafter “Yagi,” discloses a photodetector, with reference to Figures 14 and 15, including teaching a first fraction 180C of a surface area of the top surface of the semiconductor layer comprises a surface topography; and the junction (corresponding to 154, 155, paragraph 131) is configured to have respective surface area that is a second fraction of the surface area of the top surface wherein the second fraction is smaller than the first fraction, paragraph 196.
It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention for a first fraction of a surface area of the top surface of the semiconductor layer to comprise a surface topography and the second fraction to be smaller than the first fraction. One would have been motivated to do so in order to reduce reflectance at the surface to increase the photoelectric conversion efficiency, paragraphs 143 and 190.
In reference to claim 7, Eisele discloses the first region 126 comprises a top portion disposed on the top surface of the semiconductor layer and in contact with the electrode 104, a column that extends from the top portion into the body, and a tip portion at a first end of the column, wherein the junction is formed between the tip portion and the body (avalanche zone at guard structure 130, guard structure 130 can be generated by reducing the dopant concentration of avalanche zone 124, paragraph 211).
In reference to claim 9, Eisele discloses the second type of doping is a heavy n-type doping (n+ doped 125), and wherein the junction is a p-n junction (p+ doped 124), paragraph 205.
In reference to claim 11, Eisele discloses a photodetector apparatus, with reference to Figure 7, comprising:
a semiconductor layer having a first surface 106, the semiconductor layer comprising:
a body having a first type of doping (p-type);
a first region 126 having a second type of doping (n-type) different from the first type; and
wherein the semiconductor layer further comprises a junction formed between the body and the first region,
wherein the junction is configured to have respective surface area that is a second fraction of the surface area of the top surface, paragraph 203.
Eisele does not disclose wherein a first fraction of a surface area of the top surface of the semiconductor layer comprises a surface topography; or
wherein the second fraction is smaller than the first fraction.
Yagi discloses a photodetector, with reference to Figures 14 and 15, including teaching a first fraction 180C of a surface area of the top surface of the semiconductor layer comprises a surface topography; and the junction (corresponding to 154, 155, paragraph 131) is configured to have respective surface area that is a second fraction of the surface area of the top surface wherein the second fraction is smaller than the first fraction, paragraph 196.
It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention for a first fraction of a surface area of the top surface of the semiconductor layer to comprise a surface topography and the second fraction to be smaller than the first fraction. One would have been motivated to do so in order to reduce reflectance at the surface to increase the photoelectric conversion efficiency, paragraphs 143 and 190.
In reference to claim 14, Eisele discloses a dielectric layer, ‘isolator’ in Figure 7/150 in Figure 8a, disposed on the first surface of the semiconductor layer, and a trench formed in the semiconductor layer, wherein the trench has a depth that extends from the first surface of the semiconductor to at least partially inside the substrate, paragraph 218.
In reference to claim 15, Eisele discloses the first region 126 comprises a top portion disposed on the top surface of the semiconductor layer and in contact with the electrode 104, a column that extends from the top portion into the body, and a tip portion at a first end of the column, wherein the junction is formed between the tip portion and the body (avalanche zone at guard structure 130, guard structure 130 can be generated by reducing the dopant concentration of avalanche zone 124, paragraph 211).
In reference to claim 16, Eisele discloses a photodetector apparatus, with reference to Figure 7, comprising a first photodetector, the first photodetector comprising:
a semiconductor layer having a top surface on a first side, wherein the semiconductor layer is configured to allow light to enter via the first side 106, the semiconductor layer comprising:
a body having a first type of doping (p-type);
a first region 126 having a second type of doping (n-type) different from the first type; and
wherein the semiconductor layer further comprises a junction formed between the body and the first region,
wherein the junction is configured to have respective surface area that is a second fraction of the surface area of the top surface, paragraph 203.
Eisele does not disclose a plurality of photodetectors disposed on a substrate in a grid arrangement,
wherein a first fraction of a surface area of the top surface of the semiconductor layer comprises a surface topography; or
wherein the second fraction is smaller than the first fraction.
Yagi discloses a photodetector array, with reference to Figures 14 and 15, including teaching a plurality of photodetectors disposed on a substrate in a grid arrangement, paragraph 195, a first photodetector including a first fraction 180C of a surface area of the top surface of the semiconductor layer comprises a surface topography; and the junction (corresponding to 154, 155, paragraph 131) is configured to have respective surface area that is a second fraction of the surface area of the top surface wherein the second fraction is smaller than the first fraction, paragraph 196.
It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention for the photodetector to comprise a plurality of photodetectors disposed on a substrate in a grid arrangement. One would have been motivated to do so in order to form a distance measuring image sensor, for example, paragraph 2.
It would have also been obvious to one of ordinary skill in the art before the effective filing date of the invention for a first fraction of a surface area of the top surface of the semiconductor layer to comprise a surface topography and the second fraction to be smaller than the first fraction. One would have been motivated to do so in order to reduce reflectance at the surface to increase the photoelectric conversion efficiency, paragraphs 143 and 190.
In reference to claim 20, Eisele discloses the first region 126 comprises a top portion disposed on the top surface of the semiconductor layer and in contact with the electrode 104, a column that extends from the top portion into the body, and a tip portion at a first end of the column, wherein the junction is formed between the tip portion and the body (avalanche zone at guard structure 130, guard structure 130 can be generated by reducing the dopant concentration of avalanche zone 124, paragraph 211).
Claims 2, 3, 8 and 12 are rejected under 35 U.S.C. 103 as being unpatentable over Eisele et al. (US 2023/0369529) in view of Yagi et al. (US 2022/0140156) as applied to claims 1 and 16 above and further in view of Teva et al. (US 2016/0035929).
In reference to claim 2, Eisele does not disclose a substrate having the first type of doping of a different concentration than the body, wherein the semiconductor layer is disposed on the substrate.
Teva et al. (US 2016/0035929), hereafter “Teva,” discloses a photodetector device including teaching a substrate, 1 in Figure 1, having the first type of doping of a different concentration than the body 2, wherein the semiconductor layer 2 is disposed on the substrate, (implied by semiconductor body of substrate 1 and epi layer 2 of p-type conductivity, and an epi-layer 2 of low electric conductivity and the substrate 1 may have a higher electric conductivity), paragraph 37. It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention for the substrate to have the first type of doping of a different concentration than the body, wherein the semiconductor layer is disposed on the substrate. One would have been motivated to do so in order to form active circuitry in a region of sufficiently low conductivity to prevent negative effects on the characteristics circuitry, paragraph 37.
In reference to claim 3, Teva discloses the semiconductor layer 2 is an epitaxial layer formed on the substrate, paragraph 37.
In reference to claim 8, Eisele does not disclose an insulation channel formed around at least part of the column of the first region and between the first region and the body, wherein the insulation channel is configured to electrically insulate at least part of the first region from the semiconductor layer.
Teva teaches an insulation channel, 33 in Figure 8, formed around at least part of the column of the first region 4 and between the first region and the body 2, wherein the insulation channel is configured to electrically insulate at least part of the first region from the semiconductor layer, paragraphs 51 and 52 (where collar layer 33 is not removed). It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention for an insulation channel to be formed around at least part of the column of the first region and between the first region and the body, wherein the insulation channel is configured to electrically insulate at least part of the first region from the semiconductor layer. One would have been motivated to do so in order to inhibit diffusion of the second type dopant into the body, paragraph 52.
In reference to claim 12, Eisele does not disclose a substrate having the first type of doping, wherein the semiconductor layer is disposed on the substrate.
Teva discloses a photodetector device including teaching a substrate, 1 in Figure 1, having the first type of doping, wherein the semiconductor layer 2 is disposed on the substrate, (semiconductor body of substrate 1 and epi layer 2 of p-type conductivity), paragraph 37. It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention for the substrate to have the first type of doping, wherein the semiconductor layer is disposed on the substrate. One would have been motivated to do so in order to form active circuitry in a region of sufficiently low conductivity to prevent negative effects on the characteristics circuitry, paragraph 37.
Claim 4 is rejected under 35 U.S.C. 103 as being unpatentable over Eisele et al. (US 2023/0369529) in view of Yagi et al. (US 2022/0140156) and Teva et al. (US 2016/0035929) as applied to claim 2 above and further in view of Wang et al. (US 2021/0242354).
In reference to claim 4, Eisele does not disclose an insulation layer disposed on the substrate, wherein the insulation layer is formed of a dielectric material, and wherein the semiconductor layer is disposed on the insulation layer.
Wang et al. (US 2021/0242354), hereafter “Wang ‘354,” discloses a semiconductor photodetector devices including teaching an insulation layer, BOX in Figure 8A, disposed on the substrate, Si, wherein the insulation layer is formed of a dielectric material, and wherein the semiconductor layer, Si P, is disposed on the insulation layer, paragraph 310.
It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention for an insulation layer to be disposed on the substrate, wherein the insulation layer is formed of a dielectric material, and wherein the semiconductor layer is disposed on the insulation layer. To do so would have merely been a simple substitution of one known element for another to obtain predictable results; KSR Int'l Co. v. Teleflex Inc., 550 U.S. 398, 82 USPQ2d 1385, (2007), MPEP 2143 I. B. In this case substituting one substrate for another: substituting a silicon-on-insulator configuration for a solid substrate, as suggested by Wang ‘354, paragraph 324 (optional BOX layer).
Claims 5 and 6 are rejected under 35 U.S.C. 103 as being unpatentable over Eisele et al. (US 2023/0369529) in view of Yagi et al. (US 2022/0140156) and Teva et al. (US 2016/0035929) as applied to claim 2 above and further in view of Wang et al. (CN 116207179).
In reference to claim 5, Eisele does not disclose a dielectric layer disposed on the top surface of the semiconductor layer, and a trench formed in the semiconductor layer, wherein the trench has a depth that extends from the top surface of the semiconductor to at least partially inside the substrate.
Wang et al. (CN 116207179), hereafter “Wang,” a machine translation of which is included herewith and cited herein, discloses a semiconductor photodetector including teaching a dielectric layer, 9 in Figure 4, disposed on the top surface of the semiconductor layer 2, paragraph 32, and a trench 14 formed in the semiconductor layer, wherein the trench has a depth that extends from the top surface of the semiconductor to at least partially inside the substrate 1, paragraph 44. It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention for a dielectric layer to be disposed on the top surface of the semiconductor layer, and a trench to be formed in the semiconductor layer, wherein the trench has a depth that extends from the top surface of the semiconductor to at least partially inside the substrate. One would have been motivated to do so in order to mask openings for contacts, paragraph 32, and provide isolation to shield adjacent photodiodes, paragraph 44.
In reference to claim 6, Eisele in view of Wang does not specify the trench is filled with a dielectric material.
Yagi discloses the photodetector array includes a trench, 157 in Figure 14, formed in the semiconductor layer, the trench is filled with a dielectric material 158 and/or 159, paragraphs 134, 135, and 137. It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention for the trench to be filled with dielectric material. One would have been motivated to do so in order to provide dielectric isolation between adjacent photodiodes, paragraphs 135 and 137.
Claims 10 and 17 are rejected under 35 U.S.C. 103 as being unpatentable over Eisele et al. (US 2023/0369529) in view of Yagi et al. (US 2022/0140156) as applied to claims 1 and 16 above and further in view of Sato (US 2023/0307473).
In reference to claims 10 and 17, Eisele in view of Yagi does not disclose the surface topography is a paraboloid nipple array.
Sato (US 2023/0307473) discloses a photodetector device including teaching a surface topography, 71 in Figure 2, that is a paraboloid nipple array, paragraphs 98-101 (concave portions or convex portions … have a certain degree of curvature, paragraph 101). It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention for the surface topography to be a paraboloid nipple array. To do so would have merely been a simple substitution of one known element for another to obtain predictable results; KSR Int'l Co. v. Teleflex Inc., 550 U.S. 398, 82 USPQ2d 1385, (2007), MPEP 2143 I. B. In this case substituting a concave-convex structure of one shape for another shape, as suggested by Sate, end of paragraph 101.
Claim 13 is rejected under 35 U.S.C. 103 as being unpatentable over Eisele et al. (US 2023/0369529) in view of Yagi et al. (US 2022/0140156) as applied to claim 11 above and further in view of Wang et al. (US 2021/0242354).
In reference to claim 13, Eisele does not disclose an insulation layer disposed on the substrate, wherein the insulation layer is formed of a dielectric material, and wherein the semiconductor layer is disposed on the insulation layer.
Wang ‘354 discloses a semiconductor photodetector devices including teaching an insulation layer, BOX in Figure 8A, disposed on the substrate, Si, wherein the insulation layer is formed of a dielectric material, and wherein the semiconductor layer, Si P, is disposed on the insulation layer, paragraph 310.
It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention for an insulation layer to be disposed on the substrate, wherein the insulation layer is formed of a dielectric material, and wherein the semiconductor layer is disposed on the insulation layer. To do so would have merely been a simple substitution of one known element for another to obtain predictable results; KSR Int'l Co. v. Teleflex Inc., 550 U.S. 398, 82 USPQ2d 1385, (2007), MPEP 2143 I. B. In this case substituting one substrate for another: substituting a silicon-on-insulator configuration for a solid substrate, as suggested by Wang ‘354, paragraph 324 (optional BOX layer).
Claim 18 is rejected under 35 U.S.C. 103 as being unpatentable over Eisele et al. (US 2023/0369529) in view of Yagi et al. (US 2022/0140156) as applied to claim 16 above and further in view of Moussy et al. (US 2021/0159257).
In reference to claim 18, Eisele does not disclose the first photodetector further comprises: a substrate having the first type of doping of a different concentration than the body, wherein the semiconductor layer is disposed on the substrate; and an insulation layer disposed on the substrate, wherein the insulation layer is formed of a dielectric material, and wherein the semiconductor layer is disposed on the insulation layer.
Moussy et al. (US 2021/0159257) discloses a photodetector device including teaching a substrate, 105 in Figure 3, having the first type of doping of a different concentration than the body 101, wherein the semiconductor layer 2 is disposed on the substrate, paragraph 47, and an insulation layer 301 disposed on the substrate, wherein the insulation layer is formed of a dielectric material, and wherein the semiconductor layer is disposed on the insulation layer. It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention for the substrate to have the first type of doping of a different concentration than the body, wherein the semiconductor layer is disposed on the substrate. One would have been motivated to do so in order to set doping levels so that the electric field at the level of the vertical PN junction is sufficiently intense for the avalanche to be triggered by a single photogenerated charge, paragraph 46.
It would have also been obvious to one of ordinary skill in the art before the effective filing date of the invention for an insulation layer to be disposed on the substrate, wherein the insulation layer is formed of a dielectric material, and wherein the semiconductor layer is disposed on the insulation layer. To do so would have merely been a simple substitution of one known element for another to obtain predictable results; KSR Int'l Co. v. Teleflex Inc., 550 U.S. 398, 82 USPQ2d 1385, (2007), MPEP 2143 I. B. In this case substituting one substrate for another: substituting a silicon-on-insulator configuration for a solid substrate, as suggested by Moussy, embodiments of Figures 1 and 3.
Claim 19 is rejected under 35 U.S.C. 103 as being unpatentable over Eisele et al. (US 2023/0369529) in view of Yagi et al. (US 2022/0140156) as applied to claim 16 above and further in view of Wang et al. (CN 116207179).
In reference to claim 19, Eisele does not disclose a dielectric layer disposed on the top surface of the semiconductor layer, and a trench formed in the semiconductor layer, disposed at least partially between the first photodetector and an adjacent photodetector of the plurality of photodetectors, wherein the trench has a depth that extends from the top surface of the semiconductor to at least partially inside the substrate.
Wang discloses a semiconductor photodetector array including teaching a dielectric layer, 9 in Figure 4, disposed on the top surface of the semiconductor layer 2, paragraph 32, and a trench 14 formed in the semiconductor layer, disposed at least partially between a first photodetector and an adjacent photodetector of a plurality of photodetectors, wherein the trench has a depth that extends from the top surface of the semiconductor to at least partially inside the substrate 1, paragraph 44. It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention for a dielectric layer to be disposed on the top surface of the semiconductor layer, and a trench to be formed in the semiconductor layer, disposed at least partially between the first photodetector and an adjacent photodetector of the plurality of photodetectors, wherein the trench has a depth that extends from the top surface of the semiconductor to at least partially inside the substrate. One would have been motivated to do so in order to mask openings for contacts, paragraph 32, and provide isolation to shield adjacent photodiodes, paragraph 44.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Borthakur et al. (US 2021/0175380) and Wang et al. (US 2019/0019899) disclose photodetectors with related surface topography.
Jonak-Auer et al. (US 2014/0312449), Van Sieleghem (US 2021/0005645), Zimmer et al. (US 2022/0310867), and Cheng et al. (CN 115224150) discloses related photodetector structures.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to BRYAN R. JUNGE whose telephone number is (571)270-5717. The examiner can normally be reached M-F 8:00-4:30 CT.
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/BRYAN R JUNGE/ Primary Examiner, Art Unit 2897
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