Prosecution Insights
Last updated: October 26, 2026
Application No. 18/664,690

SEMICONDUCTOR MEMORY DEVICE AND ELECTRONIC SYSTEM INCLUDING THE SAME

Final Rejection §103§112
Filed
May 15, 2024
Priority
Aug 04, 2023 — RE 10-2023-0102332
Examiner
LEE, EUGENE
Art Unit
2815
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Samsung Electronics Co., Ltd.
OA Round
2 (Final)
82%
Grant Probability
Favorable
3-4
OA Rounds
2m
Est. Remaining
88%
With Interview

Examiner Intelligence

Grants 82% — above average
82%
Career Allowance Rate
761 granted / 928 resolved
+14.0% vs TC avg
Moderate +6% lift
Without
With
+5.7%
Interview Lift
resolved cases with interview
Typical timeline
2y 8m
Avg Prosecution
34 currently pending
Career history
972
Total Applications
across all art units

Statute-Specific Performance

§101
0.5%
-39.5% vs TC avg
§103
59.7%
+19.7% vs TC avg
§102
16.7%
-23.3% vs TC avg
§112
13.4%
-26.6% vs TC avg
Black line = Tech Center average estimate • Based on career data from 928 resolved cases

Office Action

§103 §112
DETAILED ACTION Drawings The drawings are objected to under 37 CFR 1.83(a). The drawings must show every feature of the invention specified in the claims. Therefore, the first horizontal protrusion is not provided between the second cell contact plug and the peripheral circuit structure (claim 23) must be shown or the feature(s) canceled from the claim(s). No new matter should be entered. Corrected drawing sheets in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. The figure or figure number of an amended drawing should not be labeled as “amended.” If a drawing figure is to be canceled, the appropriate figure must be removed from the replacement sheet, and where necessary, the remaining figures must be renumbered and appropriate changes made to the brief description of the several views of the drawings for consistency. Additional replacement sheets may be necessary to show the renumbering of the remaining figures. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance. Claim Rejections - 35 USC § 112 The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention. Claim 23 is rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. In lines 2-3, the applicant states “the first horizontal protrusion is not provided between the second cell contact plug and the peripheral circuit structure.”; however, this limitation appears contradictory to claim 1 wherein claim 1 states “the second cell contact plug includes a first horizontal protrusion.” Appropriate clarification and/or correction are required. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. In view of the 112 rejection above, claim(s) 1 thru 9, 13 thru 18, 20, 23, and 24 is/are rejected under 35 U.S.C. 103 as being unpatentable over Lee et al. US 2022/0013538 A1 in view of Rha et al. US 2022/0216227 A1 in view of Baek et al. US 2019/0312055 A1. Lee discloses (see, for example, FIG. 4) a semiconductor memory device comprising a cell array structure CS and a peripheral circuit structure PS, the cell array structure CS provided on the peripheral circuit structure PS in a vertical direction, wherein the cell array structure CS includes: a first stack structure ST2, a second stack structure ST1 between the first stack structure ST2 and the peripheral circuit structure PS, and vertical channel structures CH, which includes vertical channel structures 330/332/334/335 extending into the first and second stack structures; and a second cell contact plug 311 extending into the first, and second stack structures and extending into a second contact pad 160 at an end of a second word line 141 in the second stack structure ST1, and wherein the second cell contact plug 311 includes a first horizontal protrusion CTR1 having a horizontal width that increases discontinuously at a connection portion of the first stack structure ST2 and the second stack structure ST1. Lee does not disclose a third stack structure between the second stack structure and the peripheral circuit structure, each of the first, second, and third stack structures including a plurality of word lines. However, Rha discloses (see, for example, FIG. 6B) a semiconductor memory device comprising a first stack structure GS3, second stack structure GS2, and third stack structure GS1 including a plurality of word lines 330. It would have been obvious to one of ordinary skill in the art, at time prior to the effective filing date, to have a third stack structure between the second stack structure and the peripheral circuit structure, each of the first, second, and third stack structures including a plurality of word lines in order to increase the storage capacity of the semiconductor memory device while using the same physical stacking footprint. Further, it has been held that mere duplication of the essential working parts (i.e. such as adding another stack structure) of a device involves only routine skill in the art. St. Regis Paper Co. v. Bemis Co., 193 USPQ 8. Lee in view of Rha does not discloses the second cell contact plug includes a first horizontal protrusion having a horizontal width that increases discontinuously with distance from the peripheral circuit structure at a connection portion of the first stack structure and the second stack structure. However, Baek discloses (see, for example, FIG. 12) a semiconductor memory device 200 comprising a second contact plug 260 that includes a first horizontal protrusion 266P having a horizontal width that increases discontinuously with distance from the peripheral circuit structure between two memory stacks. It would have been obvious to one of ordinary skill in the art, at a time prior to the effective filing date, to have the second cell contact plug includes a first horizontal protrusion having a horizontal width that increases discontinuously with distance from the peripheral circuit structure at a connection portion of the first stack structure and the second stack structure in order to improve the stability of the second cell contact plug by providing a mechanical anchor within the second contact plug, and, further, to provide relief within the second contact plug by easing the overall manufacturing process and minimizing defects such as voiding, etc.. Also, such a modification would have involved a mere change in the shape of a component. A change in shape is generally recognized as being within the level of ordinary skill in the art. In re Dailey, 357 F.2d 669, 149 USPQ 47 (CCPA 1966). Regarding claim 2, see, for example, FIG. 4 wherein Lee discloses multiple contacts plugs 320 that extend into multiple stack structures that connect to contact pads 160, 170 at the ends of word lines in multiple stack structures. Each of the stack structures ST1, ST2 have horizontal protrusions having a horizontal width that increases discontinuously at a connection portion of the stack structures ST1, ST2, and therefore, the same structure (i.e. “a third cell contact plug extending into the first to third stack structures and connected to a third contact pad at an end of a third word line in the third stack structure, wherein the third cell contact plug includes a second horizontal protrusion having a horizontal width that increases discontinuously at a connection portion of the third stack structure and the second stack structure.”) disclosed in claim 2 is also disclosed in the embodiment of Lee in view of Rha when the third stack structure of Rha is combined with the first and second stack structures of Lee. Further, it has been held that mere duplication of the essential working parts (i.e. third cell contact plug, third stack structure, third contact pad, second horizontal protrusion, etc.) of a device involves only routine skill in the art. St. Regis Paper Co. v. Bemis Co., 193 USPQ 8. Regarding claims 3, 9, and 15, see, for example, FIG. 4 wherein Lee discloses multiple cell contact plugs 310/320 wherein the cell contact plugs 310/320 do not include a horizontal protrusion (i.e. the upper portion of the contact plugs 310/320 in the portion 150) at a connection portion 150 of the first stack structure and the second stack structure. Further, it has been held that omission of an element and its function in a combination where the remaining elements perform the same function as before involves only routine skill in the art. In re Karlson, 136 USPQ 184. Regarding claims 4, and 16, see, for example, FIG. 4 wherein Lee discloses a first cell contact plug 326 extending into stack structures ST1/ST2 and connected to a first contact pad at an end of a first word line 246 in the first stack structure ST2. Regarding the limitation “wherein the first cell contact plug does not include a horizontal protrusion”, the upper portion of the contact plug 326 in the portion 150 does not include a horizontal protrusion, and further, it has been held that omission of an element and its function in a combination where the remaining elements perform the same function as before involves only routine skill in the art. In re Karlson, 136 USPQ 184. Further, the applicant does not define the metes and bounds of the term “horizontal protrusion” as every structure has a width, and therefore, has a “horizontal protrusion.” Regarding claims 5-6, and 17, see, for example, FIG. 4 wherein Lee discloses multiple cell contact plugs 310/320 being between, for example, the cell contact plug 322, and the vertical channel structures CH. Regarding claim 7, see, for example, FIG. 4 wherein Lee discloses the first horizontal protrusion CTR1 being spaced apart from the peripheral circuit structure PS with the second contact pad 160 therebetween. Regarding claim 8, see, for example, FIG. 4 wherein Lee discloses the first horizontal protrusion CTR1 vertically overlaps the second contact pad 160. Regarding claims 13, and 14, see, for example, the rejection for claim 2 above. Further, see, for example, FIG. 4 wherein Lee discloses a semiconductor layer 120 that is provided between the stack structures ST1, ST2 and the peripheral circuit structure PS. Regarding claim 18, see, for example, FIG. 4 wherein Lee discloses the first horizontal protrusion CTR1 being between the second contact pad 260 and the semiconductor layer 120. Regarding claim 20, see, for example, the rejection for claim 1 above, and further, FIG. 1 wherein Lee discloses an electronic system 10 including a controller CTRL, and FIG. 17 wherein Lee discloses input/output pads 400/500. Regarding claim 23, see, for example, FIG. 4 wherein Lee discloses a portion of the second contact plug 311 not having a first horizontal protrusion between the second cell contact plug 311 and the peripheral circuit structure PS. Also see 112 rejection above. Regarding claim 24, see, for example, FIG. 12 wherein Baek discloses the first horizontal protrusion includes a top surface and a bottom surface, wherein the first horizontal protrusion having a horizontal width that increases discontinuously at both the top and bottom surfaces of the first horizontal protrusion. Claim(s) 21, and 22 is/are rejected under 35 U.S.C. 103 as being unpatentable over Lee et al. US 2022/0013538 A1 in view of Rha et al. US 2022/0216227 A1 in view of Baek et al. US 2019/0312055 A1 as applied to claims 1-9, 13-18, 20, 23, and 24 above, and further in view of Kim et al. US 2021/0066277 A1. Lee in view of Rha in view of Baek does not disclose a bit line disposed between the vertical channel structures and the peripheral circuit structure; and a second interconnection line disposed in a same vertical level with the bit line. However, Kim discloses (see, for example, FIG. 14) a semiconductor memory device comprising a bit line BL, vertical channel structures VC, peripheral circuit structure C1, and a second interconnection line 244 disposed in a same vertical level with the bit line BL. It would have been obvious to one of ordinary skill in the art, at a time prior to the effective filing date, to have a bit line disposed between the vertical channel structures and the peripheral circuit structure; and a second interconnection line disposed in a same vertical level with the bit line in order to improve the interface underneath the memory stacks while minimizing the size of the semiconductor memory device. Regarding claim 22, see, for example, FIG. 14 wherein Kim discloses the second interconnection line 244, which is below the contact plug CCP, and therefore, the second interconnection line is closer to the peripheral circuit structure than the first horizontal protrusion and the second contact pad. Response to Arguments Applicant’s arguments with respect to claim(s) 1-9, 13-18, and 20-24 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument. Conclusion Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. INFORMATION ON HOW TO CONTACT THE USPTO Any inquiry concerning this communication or earlier communications from the examiner should be directed to EUGENE LEE whose telephone number is (571)272-1733. The examiner can normally be reached M-F 730-330 PM. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, JOSHUA BENITEZ can be reached at 571-270-1435. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. Eugene Lee October 13, 2026 /EUGENE LEE/Primary Examiner, Art Unit 2815
Read full office action

Prosecution Timeline

May 15, 2024
Application Filed
Jun 10, 2026
Non-Final Rejection mailed — §103, §112
Jul 15, 2026
Examiner Interview Summary
Jul 15, 2026
Applicant Interview (Telephonic)
Sep 09, 2026
Response Filed
Oct 16, 2026
Final Rejection mailed — §103, §112 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

3-4
Expected OA Rounds
82%
Grant Probability
88%
With Interview (+5.7%)
2y 8m (~2m remaining)
Median Time to Grant
Moderate
PTA Risk
Based on 928 resolved cases by this examiner. Grant probability derived from career allowance rate.

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