Prosecution Insights
Last updated: April 19, 2026
Application No. 18/665,006

SYNCHRONOUS RECTIFICATION CHIP PIN MULTIPLEXING TECHNOLOGY

Non-Final OA §102
Filed
May 15, 2024
Examiner
BERHANE, ADOLF D
Art Unit
2838
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Diodes Incorporated
OA Round
1 (Non-Final)
88%
Grant Probability
Favorable
1-2
OA Rounds
2y 2m
To Grant
86%
With Interview

Examiner Intelligence

Grants 88% — above average
88%
Career Allow Rate
914 granted / 1036 resolved
+20.2% vs TC avg
Minimal -2% lift
Without
With
+-2.0%
Interview Lift
resolved cases with interview
Fast prosecutor
2y 2m
Avg Prosecution
18 currently pending
Career history
1054
Total Applications
across all art units

Statute-Specific Performance

§101
0.9%
-39.1% vs TC avg
§103
28.1%
-11.9% vs TC avg
§102
49.2%
+9.2% vs TC avg
§112
7.4%
-32.6% vs TC avg
Black line = Tech Center average estimate • Based on career data from 1036 resolved cases

Office Action

§102
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Priority Receipt is acknowledged of certified copies of papers required by 37 CFR 1.55. Information Disclosure Statement The information disclosure statements (IDS) submitted on 08/19/24 and 09/05/24 have been considered by the examiner. Drawings The drawings received on 05/15/24 are acceptable. Claim Rejections - 35 USC § 102 (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claims 1, 10-11, 17 and 20 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Miletic. (US 11.626.871 B2). Miletic discloses a control of secondary switches based on secondary winding voltage in a power converter in Figures 1-13. PNG media_image1.png 590 820 media_image1.png Greyscale Regarding claim 1. A switching power supply (Figure 1, (100)) comprising: a protocol circuit (125) disposed on a secondary side of the switching power supply and configured to detect (128) a power supply demand of a load device connected to the protocol circuit; a synchronous rectifier circuit (134) disposed on the secondary side of the switching power supply and configured to control a rectifier power tube; and a signal transmission circuit (132) disposed between the protocol circuit and the synchronous rectifier circuit and configured to transmit a signal between the protocol circuit and the synchronous rectifier circuit (see Figures 1. 2A and 2B, col. 3, line 25 to col. 6, line 38). Regarding claim 10. A synchronous rectifier chip (Figure 1, (100), used in a secondary side of a switching power supply comprising a protocol chip (125), the synchronous rectifier chip (134) comprising: a control pin (140, 142) configured to control turning on and turning off of a rectifier power tube (118, 119) according to an input signal; and a receiving pin connected to the protocol chip and configured to receive a power supply demand signal (132) characterizing a load device connected to the switching power supply and adjust a working mode of the synchronous rectifier chip (see Figures 1. 2A and 2B, col. 3, line 25 to col. 6, line 38). Regarding claim 11. The synchronous rectifier chip of claim 10, wherein the receiving pin is connected to an external impedance component (Figure 2A). Regarding claim 17. A protocol chip (Figure 1, (100), used in a secondary side of a switching power supply comprising a synchronous rectifier chip (134), the protocol chip comprising: a detection pin (132) configured to detect a power supply demand of a load device connected to the protocol chip; and an output pin configured to transmit a power supply demand signal to the synchronous rectifier chip, to adjust a working mode of the synchronous rectifier chip (see Figures 1. 2A and 2B, col. 3, line 25 to col. 6, line 38). Regarding claim 20. The protocol chip of claim 17, further comprising a constant current and constant voltage control circuit configured to control stability of an output voltage and an output current (Figure 2A, col. 2, line 62 to col. 3, line 25). Allowable Subject Matter Claims 2-9, 12-16 and 18-19 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. The following is a statement of reasons for the indication of allowable subject matter: Claim 2 is allowed because the prior art of record fails to disclose or suggest a switching power supply including the limitation “wherein the signal transmission circuit comprises a switching circuit and a signal identification circuit; wherein an input terminal of the switching circuit is connected to the protocol circuit, an output terminal of the switching circuit is connected to an input terminal of the signal identification circuit, and an output terminal of the signal identification circuit is connected to the synchronous rectifier circuit; wherein the switching circuit is configured to adjust a switching state of the switching circuit, according to a detection result outputted by the protocol circuit, to output a power supply demand signal; and wherein the signal identification circuit is configured to output a control signal received by the synchronous rectifier circuit, according to the power supply demand signal outputted by the switching circuit, to adjust a working mode of the synchronous rectifier circuit“ in addition to other limitations recited therein. Dependent claims 3-9 are allowable by virtue of their dependency. Claim 12 is allowed because the prior art of record fails to disclose or suggest a synchronous rectifier including the limitation “wherein the synchronous rectifier chip further comprises a signal identification circuit; and wherein the signal identification circuit is configured to identify the power supply demand signal and adjust the working mode of the synchronous rectifier chip according to the power supply demand signal“ in addition to other limitations recited therein. Dependent claims 13-16 are allowable by virtue of their dependency. Claim 18 is allowed because the prior art of record fails to disclose or suggest a protocol chip including the limitation “wherein the protocol chip further comprises a switching circuit and a detection circuit; wherein an input terminal of the switching circuit is connected to the detection circuit, and an output terminal of the switching circuit is connected to the output pin; and wherein the switching circuit is configured to adjust a switching state of the switching circuit according to a detection result outputted by the detection circuit, to output the power supply demand signal via the output pin“ in addition to other limitations recited therein. Dependent claim 19 is allowable by virtue of their dependency Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Yang et al. (US 10,014,786 B2) disclose a flyback power converter and synchronous rectification(SR) switch control circuit and power switch control circuit thereof. Zhang (US 2017/03/2194 A1) discloses a synchronous rectification circuit and switching power supply thereof. Wang et al. (US 9,595,885 B2) disclose an isolated mode power supply and the method thereof. Examiner has cited particular columns, line numbers and/or paragraphs in thereferences applied to the claims above for the convenience of the applicant. Althoughthe specified citations are representative of the teachings of the art and are applied tospecific limitations within the individual claim(s), other passages and figures may applyas well. Additionally, in the event that other prior art is provided and made of record by theExaminer, as being relevant or pertinent to applicant's disclosure but not relied upon.The references are provided for the convenience of the applicant. The Examinerrequest that the references be considered in any subsequent amendments, as they arealso representative of the art and may apply to the specific limitations ofany newly amended claim(s). It is respectfully requested from the applicant in preparing amendments or responses, to fully consider the references in their entirety as potentially teaching all or part of theclaimed invention, as well as the context of the passage as taught by the prior art and/ordisclosed by the Examiner. In the case of amending the claimed invention, Applicant is respectfully requested to indicate the portion(s) of the specification which dictate(s) the structure relied upon inorder to ensure proper interpretation of the newly added limitations and toverify/ascertain the metes and bounds of the claimed invention. Any inquiry concerning this communication or earlier communications from the examiner should be directed to ADOLF D BERHANE whose telephone number is (571)272-2077. The examiner can normally be reached 7:00 AM to 4:00 PM. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Crystal Hammond can be reached at 571-270-1682. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /ADOLF D BERHANE/Primary Examiner, Art Unit 2838
Read full office action

Prosecution Timeline

May 15, 2024
Application Filed
Dec 26, 2025
Non-Final Rejection — §102 (current)

Precedent Cases

Applications granted by this same examiner with similar technology

Patent 12603573
SWITCH BOOTSTRAPPING FOR MULTI-LEVEL INDUCTIVE POWER CONVERTER
2y 5m to grant Granted Apr 14, 2026
Patent 12597870
CONTROL CIRCUIT FOR MULTI-PHASE POWER CONVERSION CIRCUIT AND MULTI-PHASE POWER SUPPLY
2y 5m to grant Granted Apr 07, 2026
Patent 12597864
CONTROLLER AND ISOLATED POWER CONVERTER
2y 5m to grant Granted Apr 07, 2026
Patent 12592652
HIG EFFICIENCY AC-DC CONVERTER
2y 5m to grant Granted Mar 31, 2026
Patent 12592645
SWITCHED-IN VOLTAGE DOUBLER UTILIZING PARALLEL/SERIES RECTIFIER OUTPUT
2y 5m to grant Granted Mar 31, 2026
Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
88%
Grant Probability
86%
With Interview (-2.0%)
2y 2m
Median Time to Grant
Low
PTA Risk
Based on 1036 resolved cases by this examiner. Grant probability derived from career allow rate.

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