DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Election/Restrictions
Applicant’s election without traverse of Species A, directed to claims 1-12 and 18-19 in the reply filed on August 05, 2026 is acknowledged. Claims 13-17 have been withdrawn from further consideration pursuant to 37 CFR 1.142(b) as being drawn to a nonelected species.
Priority
Receipt is acknowledged of certified copies of papers required by 37 CFR 1.55.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-3 and 8 are rejected under 35 U.S.C. 103 as being unpatentable over Igarashi (US 2022/0302246 A1) in view of Tanaka et al. (JPH1032199A; hereafter Tanaka).
Regarding claim 1, Igarashi teaches a semiconductor device (see e.g., Figures 5A-5C) comprising:
a substrate (see e.g., substrate 10, Para [0061], Figures 5A-5C and 6A-6B);
a first electrode layer on the substrate (see e.g., lower electrode 14 formed on the substrate 10, Para [0061], Figures 5A-5C and 6A-6B);
a dielectric film on the first electrode layer, the dielectric film containing silicon oxide (see e.g., dielectric film 16 formed on the lower electrode 14 and is an inorganic film such as silicon oxide film, Para [0035], Figures 5A-5C and 6A-6B), and
a second electrode layer on the dielectric film (see e.g., upper electrode 18 formed on the dielectric film 16, Para [0061], Figures 5A-5C and 6A-6B);
a protective layer covering the first electrode layer and the second electrode layer; and (see e.g., an insulating film 24 covering the lower electrode 14 and the upper electrode 18, Para [0062], Figures 5A-5C and 6A-6B)
outer electrodes piercing the protective layer (see e.g., additional electrode 22/wiring 26A and wiring layer 23/wiring 26b formed in the through holes passing through the insulating film 24, Para [0063], Figures 5A-5C and 6A-6B).
Igarashi does not explicitly teach
“a ratio of three-membered ring structures to four-membered ring structures in the silicon oxide is 0.46 or less”;
In a similar field of endeavor Tanaka teaches that silicon oxide is composed of various Si-O multi-membered ring structures including three-membered ring structures (see e.g., Figure 1a) and four-membered ring structures (see e.g., Figure 1b). Tanaka further teaches with reference to the Raman spectrum of a silicon oxide film of Figure 2 that a Raman peak at approximately 608
c
m
-
1
is attributable to the three-membered ring structures and a Raman peak at approximately 504
c
m
-
1
is attributable to the four-membered ring structures.
Tanaka teaches that the abundance of the three-membered ring structures in the silicon oxide film is controllable by varying the deposition conditions. Reducing the abundance of these three-membered ring structures yields a denser silicon oxide film with optimized physical properties including reduced water permeability and hygroscopicity thereby suppressing moisture penetrating and diffusion through the silicon oxide film and improving device reliability.
Although Tanak does not explicitly teach the claimed ratio of three-membered ring structures to four-membered ring structures in the silicon oxide to be 0.46 or less, the relative abundance of the three-membered ring structure constitutes a result effective parameter that dictates the film’s density and moisture resistance capabilities.
Therefore, it would have been obvious to one skilled in art at the time the invention was effectively filed to optimize this structural ratio through routine experimentation to achieve the predictable, desirable benefit of reduced permeability and improved device stability.
Regarding claim 2, Igarashi, as modified by Tanaka, teaches the limitations of claim 1 as mentioned above. Igarashi does not explicitly teach
“wherein the ratio of the three-membered ring structures to the four-membered ring structures in the silicon oxide contained in the dielectric film is less than 0.44”.
In a similar field of endeavor Tanaka teaches that silicon oxide is composed of various Si-O multi-membered ring structures including three-membered ring structures (see e.g., Figure 1a) and four-membered ring structures (see e.g., Figure 1b). Tanaka further teaches with reference to the Raman spectrum of a silicon oxide film of Figure 2 that a Raman peak at approximately 608
c
m
-
1
is attributable to the three-membered ring structures and a Raman peak at approximately 504
c
m
-
1
is attributable to the four-membered ring structures.
Tanaka teaches that the abundance of the three-membered ring structures in the silicon oxide film is controllable by varying the deposition conditions. Reducing the abundance of these three-membered ring structures yields a denser silicon oxide film with optimized physical properties including reduced water permeability and hygroscopicity thereby suppressing moisture penetrating and diffusion through the silicon oxide film and improving device reliability.
Although Tanak does not explicitly teach the claimed ratio of three-membered ring structures to four-membered ring structures in the silicon oxide to be less than 0.44, the relative abundance of the three-membered ring structure constitutes a result effective parameter that dictates the film’s density and moisture resistance capabilities.
Therefore, it would have been obvious to one skilled in art at the time the invention was effectively filed to optimize this structural ratio through routine experimentation to achieve the predictable, desirable benefit of reduced permeability and improved device stability.
Regarding claim 3, Igarashi, as modified by Tanaka, teaches the limitations of claim 1 as mentioned above. Igarashi does not explicitly teach
“wherein the ratio of the three-membered ring structures to the four-membered ring structures in the silicon oxide contained in the dielectric film is 0.41 or less”.
In a similar field of endeavor Tanaka teaches that silicon oxide is composed of various Si-O multi-membered ring structures including three-membered ring structures (see e.g., Figure 1a) and four-membered ring structures (see e.g., Figure 1b). Tanaka further teaches with reference to the Raman spectrum of a silicon oxide film of Figure 2 that a Raman peak at approximately 608
c
m
-
1
is attributable to the three-membered ring structures and a Raman peak at approximately 504
c
m
-
1
is attributable to the four-membered ring structures.
Tanaka teaches that the abundance of the three-membered ring structures in the silicon oxide film is controllable by varying the deposition conditions. Reducing the abundance of these three-membered ring structures yields a denser silicon oxide film with optimized physical properties including reduced water permeability and hygroscopicity thereby suppressing moisture penetrating and diffusion through the silicon oxide film and improving device reliability.
Although Tanak does not explicitly teach the claimed ratio of three-membered ring structures to four-membered ring structures in the silicon oxide to be 0.41 or less, the relative abundance of the three-membered ring structure constitutes a result effective parameter that dictates the film’s density and moisture resistance capabilities.
Therefore, it would have been obvious to one skilled in art at the time the invention was effectively filed to optimize this structural ratio through routine experimentation to achieve the predictable, desirable benefit of reduced permeability and improved device stability.
Regarding claim 8, Igarashi, as modified by Tanaka, teaches the limitations of claim 1 as mentioned above. Igarashi further teaches
wherein the outer electrodes include a first outer electrode coupled to the first electrode layer and a second outer electrode coupled to the second electrode layer (see e.g., additional electrode 22/wiring 26a coupled to the upper electrode 18 and the wiring layer 23/wiring 26b is coupled to the lower electrode 14, Figure 6B).
Claims 4-7 are rejected under 35 U.S.C. 103 as being unpatentable over Igarashi (US 2022/0302246 A1) in view of Tanaka et al. (JPH1032199A; hereafter Tanaka) and further in view of Kurihara et al. (US 2004/0130849 A1; hereafter Kurihara).
Regarding claim 4, Igarashi, as modified by Tanaka, teaches the limitations of claim 1 as mentioned above. Igarashi does not explicitly teach
“further comprising:
a moisture-resistant film on the dielectric film and on the second electrode layer, wherein
the protective layer is on the moisture-resistant film”.
In a similar field of endeavor Kurihara teaches
further comprising:
a moisture-resistant film on the dielectric film and on the second electrode layer (see e.g., barrier layer 15, comprising silicon oxide, formed on the dielectric layer 13 and the upper electrode layer 14 of the capacitor, Paras [0121], [0126], Figure 5), wherein
the protective layer is on the moisture-resistant film (see e.g., the protective insulating film made of for example, polyimide resin formed over the barrier layer 15, Figure 5).
Therefore, it would have been obvious to one skilled in art at the time the invention was effectively filed to implement Kurihara’s teachings of further comprising: a moisture-resistant film on the dielectric film and on the second electrode layer, wherein the protective layer is on the moisture-resistant film in the device of Igarashi to protect the capacitor dielectric from penetration of deleterious species and thereby suppress deterioration of the dielectric characteristics.
Regarding claim 5, Igarashi, as modified by Tanaka and Kurihara, teaches the limitations of claim 4 as mentioned above. Igarashi does not explicitly teach
“wherein the moisture-resistant film is made of silicon oxide,”
In a similar field of endeavor Kurihara teaches
wherein the moisture-resistant film is made of silicon oxide (see e.g., barrier layer 15 comprising silicon oxide, Paras [0121], [0126], Figure 5)
Therefore, it would have been obvious to one skilled in art at the time the invention was effectively filed to implement Kurihara’s teachings of wherein the moisture-resistant film is made of silicon oxide in the device of Igarashi to protect the capacitor dielectric from penetration of deleterious species and thereby suppress deterioration of the dielectric characteristics.
Igarashi does not explicitly teach
“a ratio of three-membered ring structures to four-membered ring structures in the silicon oxide contained in the moisture-resistant film is 0.46 or less”.
In a similar field of endeavor Tanaka teaches that silicon oxide is composed of various Si-O multi-membered ring structures including three-membered ring structures (see e.g., Figure 1a) and four-membered ring structures (see e.g., Figure 1b). Tanaka further teaches with reference to the Raman spectrum of a silicon oxide film of Figure 2 that a Raman peak at approximately 608
c
m
-
1
is attributable to the three-membered ring structures and a Raman peak at approximately 504
c
m
-
1
is attributable to the four-membered ring structures.
Tanaka teaches that the abundance of the three-membered ring structures in the silicon oxide film is controllable by varying the deposition conditions. Reducing the abundance of these three-membered ring structures yields a denser silicon oxide film with optimized physical properties including reduced water permeability and hygroscopicity thereby suppressing moisture penetrating and diffusion through the silicon oxide film and improving device reliability.
Although Tanak does not explicitly teach the claimed ratio of three-membered ring structures to four-membered ring structures in the silicon oxide to be 0.46 or less, the relative abundance of the three-membered ring structure constitutes a result effective parameter that dictates the film’s density and moisture resistance capabilities.
Therefore, it would have been obvious to one skilled in art at the time the invention was effectively filed to optimize this structural ratio through routine experimentation to achieve the predictable, desirable benefit of reduced permeability and improved device stability.
Regarding claim 6, Igarashi, as modified by Tanaka and Kurihara, teaches the limitations of claim 5 as mentioned above. Igarashi does not explicitly teach
“wherein the ratio of the three-membered ring structures to the four-membered ring structures in the silicon oxide contained in the moisture-resistant film is less than 0.44.”
In a similar field of endeavor Tanaka teaches that silicon oxide is composed of various Si-O multi-membered ring structures including three-membered ring structures (see e.g., Figure 1a) and four-membered ring structures (see e.g., Figure 1b). Tanaka further teaches with reference to the Raman spectrum of a silicon oxide film of Figure 2 that a Raman peak at approximately 608
c
m
-
1
is attributable to the three-membered ring structures and a Raman peak at approximately 504
c
m
-
1
is attributable to the four-membered ring structures.
Tanaka teaches that the abundance of the three-membered ring structures in the silicon oxide film is controllable by varying the deposition conditions. Reducing the abundance of these three-membered ring structures yields a denser silicon oxide film with optimized physical properties including reduced water permeability and hygroscopicity thereby suppressing moisture penetrating and diffusion through the silicon oxide film and improving device reliability.
Although Tanak does not explicitly teach the claimed ratio of three-membered ring structures to four-membered ring structures in the silicon oxide to be less than 0.44, the relative abundance of the three-membered ring structure constitutes a result effective parameter that dictates the film’s density and moisture resistance capabilities.
Therefore, it would have been obvious to one skilled in art at the time the invention was effectively filed to optimize this structural ratio through routine experimentation to achieve the predictable, desirable benefit of reduced permeability and improved device stability.
Regarding claim 7, Igarashi, as modified by Tanaka and Kurihara, teaches the limitations of claim 5 as mentioned above. Igarashi does not explicitly teach
“wherein the ratio of the three-membered ring structures to the four-membered ring structures in the silicon oxide contained in the moisture-resistant film is 0.41 or less.”
In a similar field of endeavor Tanaka teaches that silicon oxide is composed of various Si-O multi-membered ring structures including three-membered ring structures (see e.g., Figure 1a) and four-membered ring structures (see e.g., Figure 1b). Tanaka further teaches with reference to the Raman spectrum of a silicon oxide film of Figure 2 that a Raman peak at approximately 608
c
m
-
1
is attributable to the three-membered ring structures and a Raman peak at approximately 504
c
m
-
1
is attributable to the four-membered ring structures.
Tanaka teaches that the abundance of the three-membered ring structures in the silicon oxide film is controllable by varying the deposition conditions. Reducing the abundance of these three-membered ring structures yields a denser silicon oxide film with optimized physical properties including reduced water permeability and hygroscopicity thereby suppressing moisture penetrating and diffusion through the silicon oxide film and improving device reliability.
Although Tanak does not explicitly teach the claimed ratio of three-membered ring structures to four-membered ring structures in the silicon oxide to be 0.41 or less, the relative abundance of the three-membered ring structure constitutes a result effective parameter that dictates the film’s density and moisture resistance capabilities.
Therefore, it would have been obvious to one skilled in art at the time the invention was effectively filed to optimize this structural ratio through routine experimentation to achieve the predictable, desirable benefit of reduced permeability and improved device stability.
Claims 9-12 are rejected under 35 U.S.C. 103 as being unpatentable over Igarashi (US 2022/0302246 A1) in view of Tanaka et al. (JPH1032199A; hereafter Tanaka) and further in view of Ashimine (US 2016/0322166 A1).
Regarding claim 9, Igarashi, as modified by Tanaka, teaches the limitations of claim 8 as mentioned above. Igarashi does not explicitly teach
“further comprising a first resin member between the first outer electrode and the second outer electrode as viewed in a plan in a thickness direction of the semiconductor device”.
In a similar field of endeavor Ashimine teaches
further comprising a first resin member between the first outer electrode and the second outer electrode as viewed in a plan in a thickness direction of the semiconductor device (see e.g., first outer electrode 19, a second outer electrode 20 and a resin layer 23 disposed around the external electrodes. Resin layer 23 includes a portion disposed in the region between external electrodes 19 and 20, thereby providing a resin member between the first and second external electrodes when viewed in the thickness direction, Para [0032], Figure 1).
Therefore, it would have been obvious to one skilled in art at the time the invention was effectively filed to implement Ashimine’s teachings of further comprising a first resin member between the first outer electrode and the second outer electrode as viewed in a plan in a thickness direction of the semiconductor device in the device of Igarashi to provide electrical insulation and protection between adjacent external electrode regions.
Regarding claim 10, Igarashi, as modified by Tanaka and Ashimine, teaches the limitations of claim 9 as mentioned above. Igarashi does not explicitly teach
“wherein, in the thickness direction, a distal end of the first resin member is at a position higher than distal ends of the first outer electrode and the second outer electrode”.
In a similar field of endeavor Ashimine teaches
wherein, in the thickness direction, a distal end of the first resin member is at a position higher than distal ends of the first outer electrode and the second outer electrode (see e.g., as shown in the cross-sectional structure, resin layer 23 extending upwardly adjacent to the external electrodes 19 and 20 such that the distal surface of the resin is positioned higher in the thickness direction than the exposed distal surfaces of the external electrodes, Figure 1).
Therefore, it would have been obvious to one skilled in art at the time the invention was effectively filed to implement Ashimine’s teachings of wherein, in the thickness direction, a distal end of the first resin member is at a position higher than distal ends of the first outer electrode and the second outer electrode in the device of Igarashi to provide increased protection and electrical isolation of the external electrode regions.
Regarding claim 11, Igarashi, as modified by Tanaka and Ashimine, teaches the limitations of claim 9 as mentioned above. Igarashi does not explicitly teach
“further comprising a second resin member between the first outer electrode and edges of the substrate and between the second outer electrode and edges of the substrate as viewed in the plan view in the thickness direction of the semiconductor device”.
In a similar field of endeavor Ashimine teaches
further comprising a second resin member between the first outer electrode and edges of the substrate and between the second outer electrode and edges of the substrate as viewed in the plan view in the thickness direction of the semiconductor device (see e.g., resin layer 23 extending not only between external electrodes 19 and 20 but also outwardly around the peripheral portions of the respective external electrodes. Accordingly, respective peripheral portions of the resin layer 23 are disposed between external electrode 19 and a peripheral edge of the electronic component and between the external electrode 20 and an opposite peripheral edge of the electronic component, Para [0032], Figure 1).
Therefore, it would have been obvious to one skilled in art at the time the invention was effectively filed to implement Ashimine’s teachings of further comprising a second resin member between the first outer electrode and edges of the substrate and between the second outer electrode and edges of the substrate as viewed in the plan view in the thickness direction of the semiconductor device in the device of Igarashi to provide electrical insulation and protection of the peripheral portions of the external electrodes.
Regarding claim 12, Igarashi, as modified by Tanaka and Ashimine, teaches the limitations of claim 11 as mentioned above. Igarashi does not explicitly teach
“wherein, in the thickness direction, a distal end of the first resin member is at a position higher than distal ends of the first outer electrode and the second outer electrode and/or a distal end of the second resin member is at a position higher than the distal ends of the first outer electrode and the second outer electrode”.
In a similar field of endeavor Ashimine teaches
wherein, in the thickness direction, a distal end of the first resin member is at a position higher than distal ends of the first outer electrode and the second outer electrode and/or a distal end of the second resin member is at a position higher than the distal ends of the first outer electrode and the second outer electrode (see e.g., as shown in the cross-sectional structure, the distal surface of resin layer 23 extends to a position higher in the thickness direction than the exposed distal surfaces of external electrodes 19 and 20. Thus, both the resin portions located outwardly of the external electrodes extend higher than the distal ends of the external electrodes, Figure 1).
Therefore, it would have been obvious to one skilled in art at the time the invention was effectively filed to implement Ashimine’s teachings of wherein, in the thickness direction, a distal end of the first resin member is at a position higher than distal ends of the first outer electrode and the second outer electrode and/or a distal end of the second resin member is at a position higher than the distal ends of the first outer electrode and the second outer electrode in the device of Igarashi to improve electrical isolation and provide mechanical protection of the exposed external electrode regions.
Claims 18-19 are rejected under 35 U.S.C. 103 as being unpatentable over Igarashi (US 2022/0302246 A1) in view of Tanaka et al. (JPH1032199A; hereafter Tanaka) and further in view of Akiyama (WO 2019/082551A1).
Regarding claim 18, Igarashi, as modified by Tanaka, teaches the limitations of claim 1 as mentioned above. Igarashi does not explicitly teach
“A matching circuit comprising the semiconductor device of Claim 1”.
In a similar field of endeavor Akiyama teaches matching circuit 11A and 11B as shown in Figures 1A and 1B respectively. These matching circuits include autotransformer TA/TB and a capacitor C1 and perform impedance matching between ports P1 and P2. capacitor coupled to an autotransformer for providing impedance matching. Hence, establishing that capacitors are conventionally employed as circuit elements in impedance matching circuits.
Therefore, it would have been obvious to one skilled in art at the time the invention was effectively filed to implement a capacitor in the matching circuit because capacitors are known circuit elements for providing the desired impedance characteristics in an impedance matching network.
Regarding claim 19, Igarashi, as modified by Tanaka, teaches the limitations of claim 1 as mentioned above. Igarashi does not explicitly teach
“A filtering circuit comprising the semiconductor device according to Claim 1”.
In a similar field of endeavor Akiyama teaches a matching circuit 13A having a band pass filter function as shown in Figure 10A. The circuit includes an autotransformer TA, a first capacitor C1 and a second capacitor C2. The first capacitor C1 together with a series parasitic inductance forms a low pass filter and the second capacitor C2 together with a parallel parasitic inductance forms a high pass filter, thereby providing band pass filter characteristics between ports P1 and P2. Hence, establishing that capacitors are conventionally employed as circuit elements in filtering circuits.
Therefore, it would have been obvious to one skilled in art at the time the invention was effectively filed to implement a capacitor in the matching circuit because capacitors are known circuit elements for providing capacitance in a frequency selective circuit.
Conclusion
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/FAKEHA SEHAR/ Examiner, Art Unit 2893
/YARA B GREEN/ Supervisor Patent Examiner, Art Unit 2893
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