Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claim(s) 1-6 and 9-12 is/are rejected under 35 U.S.C. 102(a)(2) as being anticipated by HSIEH et al. (Pub. No.: US 2022/0336523) (hereinafter HSIEH).
Re claim 1, HSIEH, Figs. 1-3 teaches a micro light-emitting diode, comprising:
a plurality of micro light-emitting regions (310/320), wherein a gap is formed between adjacent two of the micro light-emitting regions;
a filling structure (INS) disposed in the gap between the adjacent two micro light-emitting regions; and
a conductive layer (CON) disposed on the micro light-emitting regions and the filling structure, wherein the micro light-emitting regions are electrically connected in a tandem structure by the conductive layer.
Re claim 2, HSIEH, Figs. 1-3 teaches the micro light-emitting diode of claim 1, further comprising:
a first electrode (340) and a second electrode (350), wherein the first electrode is disposed on one of the micro light-emitting regions, and the second electrode is disposed on another one of the micro light-emitting regions;
wherein, each of the micro light-emitting regions comprises a first type semiconductor layer (316/326), a light-emitting layer (314/324), and a second type semiconductor layer (312/322, [0029]), which are stacked in order, the first electrode (340) is connected to the first type semiconductor layer of the one of the micro light-emitting regions (312/322), and the second electrode (350) is connected to the second type semiconductor layer of the another one of the micro light-emitting regions, and receives a driving voltage provided from a circuit substrate.
Re claim 3, HSIEH, Figs. 1-3 teaches the micro light-emitting diode of claim 2, wherein the conductive layer (CON) electrically connects the second type semiconductor layer (322) of one of the two adjacent micro light-emitting regions to the first type semiconductor layer (316) of the other one the two adjacent micro light-emitting regions.
Re claim 4, HSIEH, Figs. 1-3 teaches the micro light-emitting diode of claim 2, wherein the filling structure (INS) is disposed between parts of side walls of the second type semiconductor layers of the two adjacent micro light-emitting regions (310/320), and directly contacts the second type semiconductor layers (312/322).
Re claim 5, HSIEH, Figs. 1-3 teaches the micro light-emitting diode of claim 2, further comprising:
an insulating layer (INS) disposed on side walls of the first type semiconductor layers (316/326), the light-emitting layers (314/324) and parts of the second type semiconductor layers (312/322) of the two adjacent micro light-emitting regions.
Re claim 6, HSIEH, Figs. 1-3 teaches the micro light-emitting diode of claim 5, wherein the filling structure (INS in the middle) is formed between parts of the side walls of the second type semiconductor layers (312/322) of the two adjacent micro light-emitting regions, the insulating layer (INS on the right) and the conductive layer.
Re claim 9, HSIEH, Figs. 1-3 teaches the micro light-emitting diode of claim 1, wherein the micro light-emitting regions in the tandem structure are connected in series (Fig. 2B).
Re claim 10, HSIEH, Figs. 1-3 teaches the micro light-emitting diode of claim 1, wherein a ratio of a width of the gap (horizontal width of the middle gap) between the two adjacent micro light-emitting regions (310/320) to a width of each of the micro light-emitting regions (horizontal width of each of 310 and 320) is greater than 0 and is less than or equal to 0.16.
Re claim 11, HSIEH, Figs. 1-3 teaches a micro light-emitting diode, comprising:
a plurality of micro light-emitting regions (310/320), wherein an air gap is formed between adjacent two of the micro light-emitting regions; and
a conductive layer (CON) disposed on the two adjacent micro light-emitting regions and the air gap, wherein the two adjacent micro light-emitting regions are electrically connected in a tandem structure by the conductive layer.
Re claim 12, HSIEH, Figs. 1-3 teaches the micro light-emitting diode of claim 11, further comprising:
an insulating layer (INS) disposed between the two adjacent micro light-emitting regions;
wherein, each of the two adjacent micro light-emitting regions comprises a first type semiconductor layer (316/326), a light-emitting layer (314/324), and a second type semiconductor layer (312/322), which are stacked in order, and the insulating layer (INS) is disposed on side walls of the first type semiconductor layers, the light-emitting layers and parts of the second type semiconductor layers of the two adjacent micro light-emitting regions; and
wherein, the insulating layer (INS) and parts of the second type semiconductor layers (312/322) of the two adjacent micro light-emitting regions define the air gap.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 7-8 is/are rejected under 35 U.S.C. 103 as being unpatentable over HSIEH in view of PARK (Pub. No.: US 2023/0317738).
Re claim 7, HSIEH teaches all the limitation of claim 1.
HSIEH fails to teach the limitation of claim 7.
PARK teaches wherein the filling structure comprises an organic material (INS, FIG. 9A, [0302]).
It would have been obvious for a person of ordinary skill in the art before the effective filing date of the claim invention to include the above said teaching for the purpose of securing electrical stability of the pixel electrodes as taught by PARK, [0055].
Re claim 8, HSIEH, in the combination, Figs. 1-3 teaches the micro light-emitting diode of claim 7, wherein the filling structure is a light reflecting material or a light absorbing material (INS in the middle).
Conclusion
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/TONY TRAN/Primary Examiner, Art Unit 2893
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