Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Priority
Acknowledgment is made of applicant’s claim for foreign priority under 35 U.S.C. 119 (a)-(d). The certified copy has been filed in parent Application No. JAPAN 2021-187831, filed on 11/18/2021.
Information Disclosure Statement
The information disclosure statement (IDS) submitted on 05/17/2024. The submission is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner.
Drawings
The drawings are objected to because comparators 35 & 38 of Fig. 13 which needed to show connection to Vcc1 (as shown in Fig. 7) in order to configure to adjust or provide signal to bias circuit. It is noted that Claim 13 required second transformer which read on Fig. 13, Claim 17 which required second comparator that provides a magnitude of a second power supply voltage applied. Corrected drawing sheets in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. The figure or figure number of an amended drawing should not be labeled as “amended.” If a drawing figure is to be canceled, the appropriate figure must be removed from the replacement sheet, and where necessary, the remaining figures must be renumbered and appropriate changes made to the brief description of the several views of the drawings for consistency. Additional replacement sheets may be necessary to show the renumbering of the remaining figures. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 11-19 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
In Claim 11, the recitation of “first comparator circuit that is connected to the second bias circuit and configured to switch a magnitude of a first power supply voltage applied to the second bias circuit according to a magnitude of a power supply voltage applied to the power amplifier circuit” is unclear because as to how the first comparator circuit would configure to switch a magnitude of a first power supply voltage applied to the second bias circuit. Does the applicant meant by configure to adjust or provide a magnitude of a first power supply voltage applied to the second bias circuit? Further clarification is needed.
Claim 17 is rejected in the same manner as discussed in claim 11. Claims 12-16 & 18-19 are rejected due to their dependency.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
This application currently called joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claim(s) 1 & 5-6 is/are rejected under 35 U.S.C. 103 as being unpatentable over Lehtola (US 20190149099 A1) in view of Samata (US 20210203285 A1).
Regarding claim 1:
Lehtola discloses in Fig 4, a power amplifier circuit (Abstract, Doherty amplifier) comprising:
a carrier amplifier (Fig. 4, transistors of amplifier 22);
a first peak amplifier (Fig. 4: transistors of amplifier 32);
an external output terminal (a terminal RFOUT);
a combiner (circuit 14) that includes a first input terminal (top terminal of inductor LINV) connected to an output terminal of the carrier amplifier, a second input terminal (a terminal between capacitor CINV and un-labeled inductor) connected to an output terminal of the first peak amplifier, and a first output terminal (a terminal of un-labeled far right capacitor) connected to the external output terminal;
a first bias circuit (CLASS AB BIAS) configured to supply a first DC bias current to the carrier amplifier;
a second bias circuit (CLASS C BIAS)) configured to supply a second DC bias current to the first peak amplifier.
Watkins does not disclose a first modulation circuit that is connected between the first peak amplifier and the second bias circuit, and configured to change a magnitude of the second DC bias current according to a magnitude of a power supply voltage applied to the power amplifier circuit.
Samata discloses in Fig. 11, a power amplifier circuit comprising a bias circuit 160 connected to an adjustment circuit 170 (controlled circuit).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have replaced the generic bias circuit as taught by Watkins with the bias circuit 160 and the adjustment circuit 170 as taught by Samata. Such a modification would have imparted the advantageous benefit of improving the gain dispersion and current in the power amplifier circuit (Par. [0065-0066]) as taught by Samata to Watkins reference, thereby suggesting the obviousness of such a modification.
Accordingly, the combination (Watkins in view of Samata) further discloses a first modulation circuit (circuit 170 of fig. 11) that is connected between the first peak amplifier (Q2 of fig. 7) and the second bias circuit (bias circuit 160 of Fig. 11), and configured to change a magnitude of the second DC bias current according to a magnitude of a power supply voltage applied to the power amplifier circuit.
Regarding claim 5:
The combination (Watkins in view of Samata) discloses the power amplifier circuit of claim 1, wherein a size of the first peak amplifier is equal to or greater than a size of the carrier amplifier (carrier and peaking amplifier are same size).
Regarding claim 6:
The combination (Watkins in view of Samata) discloses all the limitations as applied in claim 6 except for wherein the size of the first peak amplifier is greater than the size of the carrier amplifier.
It is noted that the applicant used different sizes between the first peak amplifier and the carrier amplifier interchangeably. It would have been obvious to one having ordinary skill in the art at the time the invention was made to have chosen or selected the size of the first peak amplifier is greater than the size of the carrier amplifier since it has been held that discovering an optimum value of an effective variable result involves only routine skill in the art. In re Boesch, 617F.2d 272, 205 USPQ 215 (CCPA 1980).
Claim(s) 2 & 20 is/are rejected under 35 U.S.C. 103 as being unpatentable over Lehtola (US 20190149099 A1) in view of Samata (US 20210203285 A1) and further in view of Watkins (US 20190158047 A1).
Regarding claims & 20:
Lehtola discloses in Fig 4, a power amplifier circuit (Abstract, Doherty amplifier) comprising:
a carrier amplifier (Fig. 4, transistors of amplifier 22);
a first peak amplifier (Fig. 4: transistors of amplifier 32);
an external output terminal (a terminal RFOUT);
a combiner (circuit 14) that includes a first input terminal (top terminal of inductor LINV) connected to an output terminal of the carrier amplifier, a second input terminal (a terminal between capacitor CINV and un-labeled inductor) connected to an output terminal of the first peak amplifier, and a first output terminal (a terminal of un-labeled far right capacitor) connected to the external output terminal;
a first bias circuit (CLASS AB BIAS) configured to supply a first DC bias current to the carrier amplifier;
a second bias circuit (CLASS C BIAS)) configured to supply a second DC bias current to the first peak amplifier.
Watkins does not disclose a first modulation circuit that is connected between the first peak amplifier and the second bias circuit, and configured to change a magnitude of the second DC bias current according to a magnitude of a power supply voltage applied to the power amplifier circuit.
Samata discloses in Fig. 11, a power amplifier circuit comprising a bias circuit 160 connected to an adjustment circuit 170 (controlled circuit).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have replaced the generic bias circuit as taught by Watkins with the bias circuit 160 and the adjustment circuit 170 as taught by Samata. Such a modification would have imparted the advantageous benefit of improving the gain dispersion and current in the power amplifier circuit (Par. [0065-0066]) as taught by Samata to Watkins reference, thereby suggesting the obviousness of such a modification.
Accordingly, the combination (Watkins in view of Samata) further discloses a first modulation circuit (circuit 170 of fig. 11) that is connected between the first peak amplifier (Q2 of fig. 7) and the second bias circuit (bias circuit 160 of Fig. 11), and configured to change a magnitude of the second DC bias current according to a magnitude of a power supply voltage applied to the power amplifier circuit.
The combination (Watkins in view of Samata) discloses the limitations as applied in claim 1 except for wherein the combiner includes a transformer including an input side coil of which both ends are respectively connected to the first input terminal and the second input terminal and an output side coil of which both ends are respectively connected to the first output terminal and a ground.
Watkins discloses in Fig. 6, an amplifier circuit comprising a transformer being used to combine signals of carrier and peaking amplifier.
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have added a transformer as taught by Watkins to the circuit of the combination (Watkins in view of Samata). Such a modification would have imparted the advantageous benefit of boosting power and achieving high efficiency and also increasing efficiency at back-off (Par. [0053], last line).
Accordingly, the combination further discloses wherein the combiner includes a transformer (see Fig. 6 of Watkins, transformer) including an input side coil (left coil) of which both ends are respectively connected to the first input terminal and the second input terminal and an output side coil (right coil) of which both ends are respectively connected to the first output terminal and a ground.
Allowable Subject Matter
Claims 3-4 & 7-10 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Claims 3 & 4 are allowable since the closest prior art (i.e., Lehtola) does not disclose wherein the combiner includes: a first transformer including a first input side coil and a first output side coil, and a second transformer including a second input side coil and a second output side coil.
Claims 7-10 are allowable since the closest prior art (i.e., Lehtola) does not disclose further comprising: a second peak amplifier; a third bias circuit configured to supply a third DC bias current to the second peak amplifier; and a second modulation circuit that is connected between the second peak amplifier and the third bias circuit and configured to change a magnitude of the third DC bias current according to the magnitude of the power supply voltage.
Claims 11-19 would be allowable if rewritten or amended to overcome the rejection(s) under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), 2nd paragraph, set forth in this Office action.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to KHIEM D NGUYEN whose telephone number is (571)270-3941. The examiner can normally be reached Mon-Fri 8:00 AM-5:00 PM EST.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Jessica Han can be reached at (571) 272-2078. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/KHIEM D NGUYEN/Examiner, Art Unit 2843
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