DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Election/Restrictions
Applicant’s election without traverse of Invention I (corresponding to claims 1-16) in the reply filed on 8/4/26 is acknowledged.
Information Disclosure Statement
The information disclosure statements (IDS) were submitted on 5/17/24 and 10/10/24. The submissions are in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statements have been considered by the examiner.
Drawings
The drawings are objected to under 37 CFR 1.83(a). The drawings must show every feature of the invention specified in the claims. Therefore, the following must be shown or the feature(s) canceled from the claim(s):
“A third line metallization between the first and second line metallizations, the third line metallization having a top surface coplanar with that of the first and second line metallizations and a third height, less than the second height” (subject matter of claim 13);
“A fourth thickness of dielectric material over the third thickness of dielectric material, wherein: the first line metallization passes through the second thickness of dielectric material, the third thickness of dielectric material and the fourth thickness of dielectric material; the second line metallization passes through the third thickness of dielectric material and the fourth thickness of dielectric material but does not pass through any portion of the second thickness of dielectric material; and the third line metallization passes through the fourth thickness of dielectric material, but does not pass through any portion of the second or third thicknesses of dielectric material” (subject matter of claim 14);
“A second intervening material layer between the third thickness of dielectric material and the fourth thickness of dielectric material, wherein the second intervening material layer has a different composition than the fourth thickness of dielectric material” (subject matter of claim 15).
No new matter should be entered
Corrected drawing sheets in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. The figure or figure number of an amended drawing should not be labeled as “amended.” If a drawing figure is to be canceled, the appropriate figure must be removed from the replacement sheet, and where necessary, the remaining figures must be renumbered and appropriate changes made to the brief description of the several views of the drawings for consistency. Additional replacement sheets may be necessary to show the renumbering of the remaining figures. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance.
The drawings are objected to as failing to comply with 37 CFR 1.84(p)(4) because reference character “W3” has been used to designate both a width of a lower portion of a 510B and an upper portion of a different 510B (See e.g., Fig. 5B). Corrected drawing sheets in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claim(s) 1-2 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Parikh (U.S. 6,225,207 B1).
Regarding claim 1, Parikh discloses an integrated circuit (IC) structure, comprising:
A plurality of transistors including one or more semiconductor materials (col 1, lines 10-17); and
A plurality of interconnect levels coupling the transistors into circuitry, wherein an individual one of the interconnect levels comprises: a plurality of metal lines (354, 358, Fig. 3G), wherein a top surface of the metal lines (354, 358, Fig. 3G) are all co-planar and wherein a bottom surface of the metal lines (354, 358, Fig. 3G) are not coplanar.
Regarding claim 2, Parikh discloses a top portion of a first (354, Fig. 3G) of the metal lines is adjacent to a first thickness of dielectric material (320, Fig. 3G), and a bottom portion of the first of the metal lines is adjacent to a second thickness of dielectric material (316, Fig. 3G), and adjacent to an intervening material layer (318, Fig. 3G) between the first thickness of dielectric material and the second thickness of dielectric material; a second (358, Fig. 3G) of the metal lines is adjacent to the first thickness of dielectric material, but does not extend into the second thickness 316, Fig. 3G) of dielectric material as deeply as the first (354, Fig. 3G) of the metal lines.
Claim(s) 6-9 and 11 is/are rejected under 35 U.S.C. 102(a)(2) as being anticipated by Park (U.S. 2020/0203275 A1).
Regarding claim 6, Park discloses an apparatus, comprising:
An integrated circuit via metallization (120, Fig. 2) within a first thickness of dielectric material (110, Fig. 2);
A second thickness of dielectric material (210, Fig. 2) over the first thickness of dielectric material (110, Fig. 2);
A first line metallization (320, 220, Fig. 2) within the second thickness of dielectric material (210, Fig. 2), the first line metallization having a first height and in contact with the via metallization (120, Fig. 2); and
A second line metallization (325, Fig. 2) adjacent to the first line metallization (320, 220, Fig. 2), the second line metallization (325, Fig. 2) having a top surface coplanar with the first line metallization (320, 220, Fig. 2) and a second height, less than the first height (Fig. 2).
Regarding claim 7, Park discloses a third thickness of dielectric material (310, Fig. 2) over the second thickness of dielectric material, wherein: the first line metallization (320, 220, Fig. 2) passes through both the second thickness of dielectric material (210, Fig. 2) and the third thickness of dielectric material (310, Fig. 2); and the second line metallization (325, Fig. 2) passes through the third thickness of dielectric material (310, Fig. 2) but does not pass through any portion of the second thickness of dielectric material (210, Fig. 2).
Regarding claim 8, Park discloses an intervening material layer (240, Fig. 2) between the second thickness of dielectric material (210, Fig. 2) and the third thickness of dielectric material (310, Fig. 2), wherein the intervening material layer (240, Fig. 2) has a different composition than the third thickness of dielectric material ([0042]-[0043], [0033], [0039]).
Regarding claim 9, Park discloses the second thickness of dielectric material (210, Fig. 2) has the same composition as the third thickness of dielectric material (310, Fig. 2) ([0043], [0033], [0040]).
Regarding claim 11, Park discloses a top portion (320, Fig. 2) of the first line metallization (320, 220, Fig. 2) adjacent to the third thickness of dielectric material (310, Fig. 2) has a first transverse width a bottom portion (220, Fig. 2) of the first line metallization has a second transverse width no larger than a transverse width of an opening through the intervening material layer (240, Fig. 2), and smaller than the first transverse width (Fig. 2).
Claim(s) 6-8 and 10 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Hodo et al. (U.S. 2017/0125450 A1).
Regarding claim 6, Hodo discloses an apparatus, comprising:
An integrated circuit via metallization (112a, Fig. 23A) within a first thickness of dielectric material (108, Fig. 23A);
A second thickness of dielectric material (110, Fig. 23A) over the first thickness of dielectric material (108, Fig. 23A);
A first line metallization (122a, Fig. 23A) within the second thickness of dielectric material, the first line metallization having a first height and in contact with the via metallization; and
A second line metallization (62b, Fig. 23A) adjacent to the first line metallization, the second line metallization having a top surface coplanar with the first line metallization (122a, Fig. 23A) and a second height, less than the first height (Fig. 23A).
Regarding claim 7, Hodo discloses a third thickness of dielectric material (67, Fig. 23A) over the second thickness of dielectric material (110, Fig. 23A), wherein: the first line metallization (122a, Fig. 23A) passes through both the second thickness of dielectric material (110, Fig. 23A) and the third thickness of dielectric material (67, Fig. 23A); and the second line metallization (62b, Fig. 23A) passes through the third thickness of dielectric material but does not pass through any portion of the second thickness of dielectric material (110, Fig. 23A).
Regarding claim 8, Hodo discloses an intervening material layer (61, Fig. 23A) between the second thickness of dielectric material (110, Fig. 23A) and the third thickness of dielectric material (67, Fig. 23A), wherein the intervening material layer (61, Fig. 23A) has a different composition than the third thickness of dielectric material (67, Fig. 23A) ([0246]-[0247]).
Regarding claim 10, Hodo discloses the first height (height of 122a, Fig. 23A) is equal to a sum of the second thickness of dielectric material (110, Fig. 23A), the third thickness of dielectric material (67, Fig. 23A), and the thickness of the intervening material layer (61, Fig. 23A) and wherein the second height (height of 62b, Fig. 23A) is no greater than a sum of the third thickness of dielectric material (67, Fig. 23A) and a thickness of the intervening material layer (61, Fig. 23A).
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 1-5 is/are rejected under 35 U.S.C. 103 as being unpatentable over Park (U.S. 2020/0203275 A1) in view Parikh (U.S. 6,225,207 B1).
Regarding claim 1, Park discloses a structure, comprising:
At least a transistor including one or more semiconductor materials ([0031]); and
A plurality of interconnect levels, wherein an individual one of the interconnect levels comprises: a plurality of metal lines (320/220 and 325, Fig. 2) ([0041], [0044], [0050]), wherein a top surface of the metal lines (top of 320 and top of 325, Fig. 2) are all co-planar and wherein a bottom surface (bottom of 220 and bottom of 325, Fig. 2) of the metal lines are not coplanar (Fig. 2).
Yet, Park does not disclose there are a plurality of transistors. However, Parikh discloses a plurality of transistors (col 1, lines 10-17). This has the advantage of forming an integrated circuit. Therefore, it would have been obvious to one having ordinary skill in the art at the time the invention was effectively filed to modify the invention of Park with a plurality of transistors, as taught by Parikh, so as to form an integrated circuit.
Regarding claim 2, Park and Parikh disclose a top portion (Park: 320, Fig. 2) of a first (Park: 320/220, Fig. 2) of the metal lines is adjacent to a first thickness of dielectric material (Park: 310, Fig. 2), and a bottom portion (Park: 220, Fig. 2) of the first (Park: 320/220, Fig. 2) of the metal lines is adjacent to a second thickness of dielectric material (Park: 210, Fig. 2), and adjacent to an intervening material layer (Park: 240, Fig. 2) between the first thickness of dielectric material (Park: 310, Fig. 2) and the second thickness of dielectric material (Park: 210, Fig. 2); a second (Park: 325, Fig. 2) of the metal lines is adjacent to the first thickness of dielectric material (Park: 310, Fig. 2), but does not extend into the second thickness (Park: 210, Fig. 2) of dielectric material as deeply as the first (Park: 320/220, Fig. 2) of the metal lines.
Regarding claim 3, Park and Parikh disclose the top portion (Park: 320, Fig. 2) of a first (Park: 320/220, Fig. 2) of the metal lines has a first transverse width; and the bottom portion (Park: 220, Fig. 2) of the first (Park: 320/220, Fig. 2) of the metal lines has a second transverse width no larger than a transverse width of an opening through the intervening material layer (Park: 240, Fig. 2), and smaller than the first transverse width (Park: width of 320, Fig. 2).
Regarding claim 4, Park and Parikh disclose the individual one of the interconnect levels further comprises a metal via (Park: 120, Fig. 2) having a via diameter, and wherein the first (Park: 320/220, Fig. 2) and second (Park: 325, Fig. 2) metal lines both have a longitudinal length but do not explicitly disclose those longitudinal lengths are greater than the via diameter. However, it would have been obvious to one having ordinary skill in the art at the time the invention was made to select longitudinal lengths of the first and the second of the metal lines to be greater than the via diameter, since it has been held that where the general conditions of a claim are disclosed in the prior art, discovering the optimum or workable ranges involves only routine skill in the art. In re Aller, 105 USPQ 233.
Regarding claim 5, Park and Parikh disclose only one (Park: 320/220, Fig. 2) of the metal lines is located over the metal via (120, Fig. 2) and has a height sufficient to contact the metal via (120, Fig. 2).
Claim(s) 12 is/are rejected under 35 U.S.C. 103 as being unpatentable over Park (U.S. 2020/0203275 A1) as applied to claim 6 above.
Regarding claim 12, Park discloses the via metallization has a via diameter (diameter of 120, Fig. 2), the first line metallization (320, 220, Fig. 2) and the second line metallization (325, Fig. 2) both have a longitudinal length but does not the longitudinal lengths are greater than the via diameter. However, it would have been obvious to one having ordinary skill in the art at the time the invention was made to select longitudinal lengths of the first line metallization and second line metallization to be greater than the via diameter, since it has been held that where the general conditions of a claim are disclosed in the prior art, discovering the optimum or workable ranges involves only routine skill in the art. In re Aller, 105 USPQ 233.
Double Patenting
The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969).
A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP § 2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b).
The filing of a terminal disclaimer by itself is not a complete reply to a nonstatutory double patenting (NSDP) rejection. A complete reply requires that the terminal disclaimer be accompanied by a reply requesting reconsideration of the prior Office action. Even where the NSDP rejection is provisional the reply must be complete. See MPEP § 804, subsection I.B.1. For a reply to a non-final Office action, see 37 CFR 1.111(a). For a reply to final Office action, see 37 CFR 1.113(c). A request for reconsideration while not provided for in 37 CFR 1.113(c) may be filed after final for consideration. See MPEP §§ 706.07(e) and 714.13.
The USPTO Internet website contains terminal disclaimer forms which may be used. Please visit www.uspto.gov/patent/patents-forms. The actual filing date of the application in which the form is filed determines what form (e.g., PTO/SB/25, PTO/SB/26, PTO/AIA /25, or PTO/AIA /26) should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about eTerminal Disclaimers, refer to www.uspto.gov/patents/apply/applying-online/eterminal-disclaimer.
Claims 1, 6, and 12 are rejected on the ground of nonstatutory double patenting as being unpatentable over claims 1-2 and 9 of U.S. Patent No. U.S. 12,002,754 (‘754 patent).
Claim 1 of the instant application corresponds with claim 9 of the ‘754 patent.
Claim 6 of the instant application corresponds with claims 1-2 of the ‘754 patent.
Claim 12 of the instant application corresponds with claims 1-2 of the ‘754 patent.
Allowable Subject Matter
Claims 13-16 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Conclusion
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/REEMA PATEL/Primary Examiner, Art Unit 2812 9/23/2026
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