DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claim(s) 11- 12, 14, and 17- 19 are rejected under 35 U.S.C. 103 as being unpatentable over West et al. (U.S. 2012/0112220 A1, hereinafter refer to West) in view of Camras et al. (U.S. 2011/0062469 A1, hereinafter refer to Camras).
Regarding Claim 11: West discloses a chip scale light-emitting diode package (see West, Figs.10 and 16 as shown below and ¶ [0002]) comprising:
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a light-emitting diode chip having a first electrode pad (124) and a second electrode pad (125) formed on a lower surface thereon (see West, Figs.10 and 16 as shown above);
a molding part (135/132) formed to cover an outer surface of the light-emitting diode chip (121) (see West, Fig.16 as shown above);
an adhesive layer (140) formed to cover an upper surface of the light-emitting diode chip and an upper surface of the molding part (135/132) (see West, Fig. 16 as shown above); and
a lens (191) attached to the adhesive layer (140) and covering the upper surface of the light- emitting diode chip and the upper surface of the molding part (135/132) (see West, Fig. 16 as shown above),
wherein the lens (191) includes a lens portion having a central axis coincident with a central axis of the light-emitting diode chip (see West, Fig.16 as shown above).
West is silent upon explicitly disclosing wherein the adhesive layer includes a first adhesive film attached to the lens and a second adhesive film attached to the light-emitting diode chip, and a wavelength conversion material is disposed between the first adhesive film and the second adhesive film.
For support see Camras, which teaches wherein the adhesive layer (1402/222/1410) includes a first adhesive film (1410) attached to the lens (1414) and a second adhesive film (1402) attached to the light-emitting diode chip (202), and a wavelength conversion material (222) is disposed between the first adhesive film (1410) and the second adhesive film (1402) (see Camras, Fig.14 as shown below and ¶ [0005]).
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Thus, it would have been obvious to one of ordinary skill in the art before effective filing date of the claimed invention to combine the teachings of West and Camras to enable the West’s adhesive layer to include a first adhesive film attached to the lens and a second adhesive film attached to the light-emitting diode chip, and a wavelength conversion material to be disposed between the first adhesive film and the second adhesive film as taught by Camras in order to improve bonding between the lens and the light-emitting diode chip.
Regarding Claim 12: West as modified teaches a chip scale light-emitting diode package as set forth in claim 11 as above. The combination of West and Camras further teaches wherein the adhesive layer (1402/222/1410) includes an adhesive film including an adhesive material on both sides thereof (see Camras, Fig.14 as shown above).
Regarding Claim 14: West as modified teaches a chip scale light-emitting diode package as set forth in claim 11 as above. The combination of West and Camras further teaches wherein the molding part (132) includes a light-transmitting material (note: silicone or epoxy is known as a light-transmitting material) (see West, Fig.16 as shown above, ¶ [0068], and ¶ [0086]).
Regarding Claim 17: West as modified teaches a chip scale light-emitting diode package as set forth in claim 11 as above. The combination of West and Camras further teaches wherein the molding part (135) includes a light reflective material, and the light-emitting diode chip emits light upward (see West, Fig.16 as shown above).
Regarding Claim 18: West as modified teaches a chip scale light-emitting diode package as set forth in claim 11 as above. The combination of West and Camras further teaches wherein the lens portion (191) has a dome shape (see West, Fig.16 as shown above).
Regarding Claim 19: West as modified teaches a chip scale light-emitting diode package as set forth in claim 11 as above. The combination of West and Camras is silent upon explicitly disclosing wherein a distance from a bottom end of the light-emitting diode chip to a top end of the lens is 5 times to 10 times the thickness of the light-emitting diode chip.
However, the combination of West and Camras teaches wherein a distance from a bottom end of the light-emitting diode chip to a top end of the lens is less than the thickness of the light-emitting diode chip (see West, Fig.16 as shown above).
Thus, it would have been obvious to one of ordinary skill in the art of making semiconductor devices to determine the workable or optimal value for the distance from a bottom end of the light-emitting diode chip to a top end of the lens with respect to the thickness of the light-emitting diode chip through routine experimentation and optimization to obtain optimal or desired device performance because the distance from a bottom end of the light-emitting diode chip to a top end of the lens with respect to the thickness of the light-emitting diode chip is a result-effective variable and there is no evidence indicating that it is critical or produces any unexpected results and it has been held that it is not inventive to discover the optimum or workable ranges of a result-effective variable within given prior art conditions by routine experimentation. See MPEP § 2144.05
Claim(s) 15-16 are rejected under 35 U.S.C. 103 as being unpatentable over West et al. (U.S. 2012/0112220 A1, hereinafter refer to West) and Camras et al. (U.S. 2011/0062469 A1, hereinafter refer to Camras) as applied to claim 11 above, and further in view of Jeon (U.S. WO 2015/060687 A1, hereinafter refer to Jeon).
Regarding Claim 15: West as modified teaches a chip scale light-emitting diode package as applied to claim 11 above. The combination of West and Camras is silent upon explicitly disclosing wherein the light-emitting diode chip includes a semiconductor layer stacked structure, a first reflective layer and a second reflective layer,
wherein the semiconductor layer stacked structure includes an active layer, a first semiconductor layer formed above the active layer and a second semiconductor layer formed under the active layer,
the first reflective layer is formed on the opposite side of the active layer with respect to the first semiconductor layer, and
the second reflective layer is formed on the opposite side of the active layer with respect to the second semiconductor layer.
For support see Jeon, which teaches wherein the light-emitting diode chip includes a semiconductor layer stacked structure (30/40/50), a first reflective layer (51) and a second reflective layer (31) (see Jeon, Fig.4 as shown below and page.1),
wherein the semiconductor layer stacked structure (30/40/50) includes an active layer (40), a first semiconductor layer (30) formed above the active layer (40) and a second semiconductor layer (50) formed under the active layer (40) (see Jeon, Fig.4 as shown below and page.1),
the first reflective layer (51) is formed on the opposite side of the active layer (40) with respect to the first semiconductor layer (30) (see Jeon, Fig.4 as shown below and page.1), and
the second reflective layer (51) is formed on the opposite side of the active layer (40) with respect to the second semiconductor layer (50) (see Jeon, Fig.4 as shown below and page.1).
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Thus, it would have been obvious to one of ordinary skill in the art before effective filing date of the claimed invention to combine the teachings of West, Camras, and Jeon to enable the combination of West’s and Camras light-emitting diode chip to include a semiconductor layer stacked structure, a first reflective layer and a second reflective layer, wherein the semiconductor layer stacked structure includes an active layer, a first semiconductor layer formed above the active layer and a second semiconductor layer formed under the active layer as taught by Jeon in order to obtain a side-emitting semiconductor light emitting diode that can switch the orientation of the emitted light.
Regarding Claim 16: West as modified teaches a chip scale light-emitting diode package as set forth in claim 15 as above. The combination of West, Camras, and Jeon further teaches wherein the light-emitting diode chip includes a light-transmitting material layer (10) positioned above the first semiconductor layer (30) and having a light scattering pattern (see Jeon, Fig.4 as shown above).
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to BITEW A DINKE whose telephone number is (571)272-0534. The examiner can normally be reached M-F 7 a.m. - 5 p.m..
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/BITEW A DINKE/Primary Examiner, Art Unit 2812
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