Prosecution Insights
Last updated: October 01, 2026
Application No. 18/668,786

ELECTRONIC DEVICE

Non-Final OA §102§112
Filed
May 20, 2024
Priority
Jun 21, 2023 — provisional 63/509,293 +1 more
Examiner
ABDELAZIEZ, YASSER A
Art Unit
Tech Center
Assignee
Innolux Corporation
OA Round
1 (Non-Final)
86%
Grant Probability
Favorable
1-2
OA Rounds
0m
Est. Remaining
89%
With Interview

Examiner Intelligence

Grants 86% — above average
86%
Career Allowance Rate
722 granted / 837 resolved
+26.3% vs TC avg
Minimal +3% lift
Without
With
+3.0%
Interview Lift
resolved cases with interview
Fast prosecutor
2y 1m
Avg Prosecution
30 currently pending
Career history
851
Total Applications
across all art units

Statute-Specific Performance

§101
2.0%
-38.0% vs TC avg
§103
48.4%
+8.4% vs TC avg
§102
28.8%
-11.2% vs TC avg
§112
18.7%
-21.3% vs TC avg
Black line = Tech Center average estimate • Based on career data from 837 resolved cases

Office Action

§102 §112
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Election/Restrictions Applicant elected species III, with traverse, directed to Claims 1, 2 and 6-20 is acknowledged. Applicant argues that “the claims are drawn to closely related aspects of a single inventive concept and share common technical features” as the only reason for traversing the restriction requirement, hence it would not impose a serious burden on the Examiner to consider the above-identified species in the single application”. Examiner noted that the features of each species are mutually exclusive, hence by definition and in accordance with the MPEP for representing an examination burden. Therefore, the restriction requirement is maintained. Claims 1, 2 and 6-20 are examined on the merit. Claim Rejections - 35 USC § 112 The following is a quotation of the first paragraph of 35 U.S.C. 112(a): (a) IN GENERAL.—The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor or joint inventor of carrying out the invention. The following is a quotation of the first paragraph of pre-AIA 35 U.S.C. 112: The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor of carrying out his invention. Claims 1, 2 and 6-20 are rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, because the specification, while being enabling for having an auxiliary pad, does not reasonably provide enablement for the material of the auxiliary pad. The specification does not enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to which class of material are covered in the invention commensurate in scope with these claims, except for couple of material examples that definitely not covering the expansive range of claimed intrinsic stress +800 MPa and -1000 MPa, which covers a wide array of materials such as conductive or insulating that may exhibit highly tensile stress to highly compressive stress and any value in between, including stress relaxed materials. In the instant case, the application specify 3 materials, silicon oxide, titanium oxide and silicon nitride in paragraph [0062], namely dielectric material, however, it does not limit it to only these materials, instead expand on it to any material or combination thereof that can exhibit the claimed intrinsic stress of +800 MPa and -1000 MPa, which does not identify the metes and bound of the claimed invention as to enable one of ordinary skill in the art to make and use the claimed invention, particularly other dielectric layers claimed such as the first insulating layer and the passivation layers are one of the same material as auxiliary pad such as the silicon oxide and silicon nitride, therefore, the distinction between auxiliary pad material and the first insulating material as well as the passivation layer material is not clear and is not specifically identified in the disclosure to enable one of ordinary skill in the art to make and use the claimed invention. Applicant correction is required. Claims 1, 2 and 6-20 are rejected under 35 U.S.C. 112(a) or pre-AIA 35 U.S.C. 112, first paragraph, as based on a disclosure which is not enabling. The disclosure does not enable one of ordinary skill in the art to practice the invention without including that the auxiliary pad is made of silicon oxide (SiOx), silicon nitride (SiNx), titanium dioxide (TiO2), another suitable material as mentioned in paragraph [0062], hence is a dielectric material or some equivalent material, due to the expansive range covering claimed intrinsic stress +800 MPa and -1000 MPa, which covers a wide array of materials such as conductive or insulating that may exhibit highly tensile stress to highly compressive stress and any value in between, including stress relaxed materials., which is/are critical or essential to the practice of the invention but not included in the claim(s). See In re Mayhew, 527 F.2d 1229, 188 USPQ 356 (CCPA 1976). In the instant case, the distinction between auxiliary pad material and the first insulating material as well as the passivation layer material is not clear and is not specifically identified in the disclosure to enable one of ordinary skill in the art to make and use the claimed invention. Applicant correction is required. Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claim(s) 1, 2, 6, 10, 13 and 15 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by LAI et al, (US 2022/0406730), (hereinafter, LAI). PNG media_image1.png 380 749 media_image1.png Greyscale RE Claim 1, LAI discloses in FIG. 1G an electronic package. RE Claim 1, LAI discloses an electronic device, comprising: an electronic component 122; an encapsulating layer 140 surrounding the electronic component 122; a circuit structure 108/110/112/116 electrically connected to the electronic component 122, the circuit structure 108/110/112/116 having a connection part 110; a bonding element 148 overlapping with the connection part and is electrically connected to the electronic component 122; and a first auxiliary pad 112 “conductive structure” disposed in the circuit structure 108/110/112/116. Examiner notes that the conductive structure 112 as functionally equivalent to an auxiliary pad since it provides a mechanical and electrical support of the circuit structure, which supports the plain meaning of the word “auxiliary” and is inherently have an intrinsic stress and made of copper, aluminum, gold, palladium, cobalt, titanium, nickel, silver, graphene, hence meeting the claimed limitation, wherein the connection part 110 is disposed between the first auxiliary pad and the bonding element 1480/1481, the connection part 110 overlaps with the first auxiliary pad 112, referring to FIG. 1G. examiner notes that the intrinsic stress of cobalt typically range from -150 MPa (compressive) to +800 MPa (tensile), titanium range from −350 MPa (compressive) to +100 MPa (tensile) and nickel 60 MPa compressive to 400 MPa tensile, which lies within the claimed intrinsic stress between +800 MPa and -1000 MPa, hence the claimed limitation is inherently met. RE Claim 2, LAI discloses an electronic device, wherein the electronic component comprises: a chip 124 “integrated circuit”; a passivation layer 132; and a first insulating layer 1144, wherein the passivation layer 132 is disposed between the chip 124 and the first insulating layer 1144, and a thickness of the first insulating layer 1144 is greater than a thickness of the passivation layer 132, referring to FIGS. 1B and 1G. RE Claim 6, LAI discloses an electronic device, wherein the circuit structure further comprises: a patterned conductive layer 116, wherein the connection part 110 is disposed between the patterned conductive layer 116 and the bonding element 148. RE Claim 10, LAI discloses an electronic device, wherein the circuit structure further comprises: a second insulating layer 1141 disposed between the electronic component 124 and the bonding element 148. RE Claim 13, LAI discloses an electronic device, wherein the first auxiliary pad 110 is in contact “indirect contact” with the second insulating layer 1141. RE Claim 15, LAI discloses an electronic device, wherein one end of the bonding element 148 is electrically connected to the connection part 110, and the other end of the bonding element 1480/1481 is electrically connected to an external electronic component 160. Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. In the instant case, Sarihan (“Role of film intrinsic stress in packaging of multi-layer microelectronic structures,” Materials Science and Engineering A 421, pp 109–117, 2006) discloses a study of Internal stress due to material CTE and Young’s modulus mismatch in microelectronic and micro-electromechanical system (MEMS) structures is critical to their reliability. It is well understood and hence its impact is generally controllable. However, the film intrinsic stress develops as a function of processing. The level of stress and how it changes with additional processing or environmental exposure is still not well understood. This stress is typically neglected in response prediction as its magnitude, behavior and response impact are not well known. Intrinsic film stress can play a substantial role in enhancing or degrading the response of multi-layer structures. Intrinsic stress can cause failures or can mitigate catastrophic failures. Thin film intrinsic stress is processing-related so, it may be controlled by modifying processing parameters. In addition, these stresses are also dependent on film size and thickness. Any inquiry concerning this communication or earlier communications from the examiner should be directed to YASSER ABDELAZIEZ whose telephone number is (571)270-5783. The examiner can normally be reached Monday - Friday 9 am - 6 pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Leonard Chang can be reached at (571) 270-3691. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /YASSER A ABDELAZIEZ, PhD/Primary Examiner, Art Unit 2898
Read full office action

Prosecution Timeline

May 20, 2024
Application Filed
Sep 22, 2026
Non-Final Rejection mailed — §102, §112 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
86%
Grant Probability
89%
With Interview (+3.0%)
2y 1m (~0m remaining)
Median Time to Grant
Low
PTA Risk
Based on 837 resolved cases by this examiner. Grant probability derived from career allowance rate.

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