Prosecution Insights
Last updated: October 02, 2026
Application No. 18/668,920

SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME

Non-Final OA §102§103
Filed
May 20, 2024
Priority
Aug 16, 2023 — RE 10-2023-0107224
Examiner
SPRENGER, JAIME LYNN
Art Unit
Tech Center
Assignee
Samsung Electronics Co., Ltd.
OA Round
1 (Non-Final)
100%
Grant Probability
Favorable
1-2
OA Rounds
3m
Est. Remaining
99%
With Interview

Examiner Intelligence

Grants 100% — above average
100%
Career Allowance Rate
2 granted / 2 resolved
+40.0% vs TC avg
Minimal +0% lift
Without
With
+0.0%
Interview Lift
resolved cases with interview
Typical timeline
2y 8m
Avg Prosecution
27 currently pending
Career history
24
Total Applications
across all art units

Statute-Specific Performance

§103
54.7%
+14.7% vs TC avg
§102
26.3%
-13.7% vs TC avg
§112
15.3%
-24.7% vs TC avg
Black line = Tech Center average estimate • Based on career data from 2 resolved cases

Office Action

§102 §103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Specification The title of the invention is not descriptive. A new title is required that is clearly indicative of the invention to which the claims are directed. Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claim(s) 1-6 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Chunchieh Wang et al.(US 20220278197 A1) hereinafter referred to as “Wang”. Regarding claim 1 Wang teaches A method of manufacturing a semiconductor device (Fig 14a-Fig 24b), the method comprising: preparing a substrate (Fig 13a element 50) comprising a first region (50 P) and a second region (50 N) next to the first region; forming a first channel pattern in the first region and forming a second channel pattern in the second region, wherein the first channel pattern comprises a first plurality of semiconductor patterns (68) vertically stacked on the substrate, a first inner region, and a first outer region, and wherein the second channel pattern comprises a second plurality of semiconductor patterns(68) vertically stacked on the substrate(50), a second inner region, and a second outer region; (see Fig 14a) forming a high-k dielectric layer (112b) covering the first channel pattern and the second channel pattern; forming a first protective mask (Fig 15a/b element 116a) on the high-k dielectric layer in the first region and the second region; removing the first protective mask from the first outer region and the second outer region(Fig 16 a/b); and forming an additional mask layer (Fig 17a/b element 116b) surrounding the first channel pattern and the second channel pattern, wherein the additional mask layer does not have etch selectivity with the first protective mask (116a and 116 b may be made of the same material [0062],[0066] therefore they do not have etch selectivity since their etch rates would be the same), wherein the first inner region comprises spaces between adjacent semiconductor patterns of the first plurality of semiconductor patterns, and the first outer region comprises a space around the first plurality of semiconductor patterns excluding the first inner region, and wherein the second inner region comprises spaces between adjacent semiconductor patterns of the second plurality of semiconductor patterns, and the second outer region comprises a space around the second plurality of semiconductor patterns excluding the second inner region.(Fig 13a-Fig 24b) Regarding Claim 2 Wang teaches The method of claim 1, further comprising, after the forming the additional mask layer(Fig 17a element 116b): forming a first photo mask layer (Fig 18b, Para[0069] element 118a) in the first region (50p); and removing the additional mask layer(116b) and the first protective mask (116a)from the second region(50N) by using the first photo mask layer as an etch mask.(Fig 18 a/b) Regarding Claim 3 Wang teaches The method of claim 2, further comprising, after the removing the additional mask layer and the first protective mask from the second region(Fig 18a), forming a conductive layer (114a, Fig 20a) which fills the second inner region and which also fills at least part of the second outer region. Regarding Claim 4 Wang teaches The method of claim 3, further comprising, after the forming the conductive layer (114a, Fig 20a): forming a second photo mask layer(118b, Fig 21a, para[0081]) covering the conductive layer(114a) in the second region(50N); and removing (Fig 19b) the additional mask layer(116b) and the first protective mask (116a) from the first region(Fig 21b). Regarding Claim 5 Wang teaches The method of claim 3, wherein the conductive layer (114a para[0079]) fills (at least a portion of) the first inner region and the second inner region.(Fig 20a and 20b) Regarding Claim 6 Wang teaches The method of claim 1, wherein the removing of the first protective mask (Fig 15a/b to 16 a/b) does not remove the first protective mask from the first inner region or the second inner region.(Fig 16 a/b) Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim(s) 7-10, 14-15, 18-20 is/are rejected under 35 U.S.C. 103 as being unpatentable over Wang, and further in view of Te-Yang Lai et al. (US 11791216 B2) hereinafter referred to as “Lai”. Regarding Claim 7 Wang teaches The method of claim 1, further comprising, And forming an additional mask layer (Wang fig 17 a/b element 116b) Wang is not relied upon to teach after the forming the additional mask layer, forming a second protective mask on the additional mask layer, wherein the second protective mask has etch selectivity with the additional mask layer. Lai teaches a similar method of forming these channel structures wherein after the forming the additional mask layer (the portion of 126 in the outer regions), forming a second protective mask (128) on the additional mask layer(portions of 126), wherein the second protective mask (128 may be made of TiO2) has etch selectivity with the additional mask layer.(126 may be made of Al2O3 which do not have the same etch rate. Since the etch rate is different between the material the layers thusly have etch selectivity) (Lai Col 12 lines 59-63, Col 13 line 47-52) It would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to modify the device of Wang such that there is a second protective layer with etch selectivity with the additional mask layer, as described in Lai because the modification allows for a thicker hard mask layer that protects against oxidization of the nanostructures and allows for the thickness of the interfacial layer to remain unchanged. (Lai Col 14-15 lines 63-6) Regarding claim 8 Wang in view of Lai teaches The method of claim 7, wherein the first protective mask and the additional mask layer (Lai 126) each comprise at least one of: aluminum, a mixture of aluminum and another metal, an oxide of aluminum, (Lai Col 12 lines 59-63) an oxide of a mixture of aluminum and another metal, a carbide of aluminum, a carbide of a mixture of aluminum and another metal, a silicide of aluminum, a silicide of a mixture of aluminum and another metal, a silicon nitride of aluminum, a silicon nitride of a mixture of aluminum and another metal, a silicon carbide of aluminum, or a silicon carbide of a mixture of aluminum and another metal. Regarding Claim 9 Wang in view of Lai teaches The method of claim 8, wherein the second protective mask (Lai 128) comprises at least one of: titanium, tantalum, a combination of titanium and tantalum, an oxide of titanium, (Lai Col 12 lines 59-63, Col 13 line 47-52) an oxide of tantalum, an oxide of a combination of titanium and tantalum, a nitride of titanium, a nitride of tantalum, a nitride of a combination of titanium and tantalum, a carbide of titanium, a carbide of tantalum, a carbide of a combination of titanium and tantalum, a silicide of titanium, a silicide of tantalum, a silicide of a combination of titanium and tantalum, a silicon nitride of titanium, a silicon nitride of tantalum, a silicon nitride of a combination of titanium and tantalum, or a silicon carbide of titanium, a silicon carbide of tantalum, or a silicon carbide of a combination of titanium and tantalum. Regarding Claim 10 Wang in view of Lai teaches The method of claim 7, wherein the additional mask layer (Lai outer portions of 126) is disposed between (Lai Fig 16b) the second protective mask (Lai 128) and the high-k dielectric layer (Lai 122 Col 12 lines 14-31). Regarding Claim 14 Wang teaches The method of claim 1, Wang Teaches the importance of the distance between each channel pattern (68 para [0061]) Which would determine the thickness of the first protective mask. However, Wang does not talk about the thickness of the additional mask layer. Lai teaches that the width of the recess that the channel pattern is in determines the upper limit of the thickness for the additional mask layer (outer portions of 126 Col 13 lines 5-7) . So as to make the layer spatially economically the width of the additional mask layer is a result effective variable that balances special efficiency as to leave room for other layers that provide protection against oxidizing of the channel nanostructures. (Col 14 lines 48-62) Therefore, Wang in view of Lai teaches the reduction of the thickness of the additional mask layer (Lai) while teaching the maintained thickness of the first protective mask layer (Wang) and thusly teaches wherein a thickness of the additional mask layer on any one of the first channel pattern and the second channel pattern is less than a thickness of the first protective mask on any one of the first inner region and the second inner region. It would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to modify the device of Wang such that the thickness of the additional mask layer is reduced (since it is taught as a result effective variable explained above), as described in Lai because the modification allows for the proper distance between channel patterns (Wang) while also maximizing the spatial economy for other protective layers (Lai). (Wang Para [0061], Lai Col 13 lines 5-7, Col 14 lines 48-62) Regarding Claim 15 Wang teaches A method of manufacturing a semiconductor device (Fig 14a-Fig 24b), the method comprising: preparing a substrate (Fig 13a element 50) comprising a first region (50 P) and a second region (50N) next to the first region; forming a first channel pattern in the first region and forming a second channel pattern in the second region, wherein the first channel pattern comprises a first plurality of semiconductor patterns (68) vertically stacked on the substrate, a first inner region, and a first outer region, and wherein the second channel pattern comprises a second plurality of semiconductor patterns (68) vertically stacked on the substrate, a second inner region, and a second outer region; forming a first protective mask surrounding the first channel pattern and the second channel pattern; removing (Fig 16 a/b) the first protective mask (Fig 15a/b element 116a) from the first outer region and the second outer region; forming an additional mask layer (Fig 17a/b element 116b) surrounding the first channel pattern and the second channel pattern, wherein the additional mask layer does not have etch selectivity with the first protective mask; forming a first photo mask layer (Fig 18b, Para[0069] element 118a) covering the first region (50p); and exposing a sidewall of the additional mask layer in a boundary between the first region and the second region by removing the additional mask layer, and the first protective mask from the second region by using the first photo mask layer as an etch mask, (Fig 18a and 18b) wherein the first inner region comprises spaces between adjacent semiconductor patterns of the first plurality of semiconductor patterns, and the first outer region comprises a space around the first plurality of semiconductor patterns excluding the first inner region, and wherein the second inner region comprises spaces between adjacent semiconductor patterns of the second plurality of semiconductor patterns, and the second outer region comprises a space around the second plurality of semiconductor patterns excluding the second inner region. (Fig 13a-Fig 24b) Wang is not relied upon to teach the second protective mask and thusly id not relied upon to teach forming, on the additional mask layer, a second protective mask having etch selectivity with the first protective mask and the additional mask layer the second protective mask in the first region; and exposing a sidewall of the second protective mask by removing the second protective mask from the second region Lai teaches a similar method that does include the second protective mask and therefore is relied upon to teach forming, on the additional mask layer (outer portions of 126) , a second protective mask (128) (128 may be made of TiO2) having etch selectivity with the first protective mask and the additional mask layer (126 may be made of Al2O3 which do not have the same etch rate. Since the etch rate is different between the material the layers thusly have etch selectivity) (Lai Col 12 lines 59-63, Col 13 line 47-52) the second protective mask (128 Fig 16b) in the first region; and exposing a sidewall of the second protective mask by removing the second protective mask from the second region (since the second protective mask is now disposed on top of the additional mask and first protective mask in order to remove the additional mask layer, and the first protective mask from the second region the second protective mask must also be removed) It would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to modify the device of Wang such that there is a second protective layer, as described in Lai because the modification allows for a thicker hard mask layer that protects against oxidization of the nanostructures and allows for the thickness of the interfacial layer to remain unchanged. (Lai Col 14-15 lines 63-6) Regarding Claim 18 Wang in view of Lai teaches The method of claim 15, further comprising, exposing the sidewall of the second protective mask and the sidewall of the additional mask layer, (Wang Fig 18a and 18b) , (since the second protective mask is now disposed on top of the additional mask order to remove the additional mask layer, from the second region the second protective mask must also be removed as taught in the rejection of claim 15 ) Wang further teaches After, forming a conductive layer (114a Fig 20a/b) covering the first channel pattern and the second channel pattern. Regarding Claim 19 Wang in view of Lai teaches The method of claim 18, further comprising, after the forming the conductive layer (Wang 114a Fig 20a/b): forming a second photo mask layer (Wang 118b) covering the conductive layer in the second region (50n) ; and removing the conductive layer from the first region(Fig 21b) by using the second photo mask layer as an etch mask. Regarding Claim 20 Wang teaches A method of manufacturing a semiconductor device (Fig 14a-Fig 24b), the method comprising: preparing a substrate (Fig 13a element 50) comprising a first region (50 P) and a second region (50N) next to the first region; forming a first channel pattern in the first region and forming a second channel pattern in the second region, wherein the first channel pattern comprises a first plurality of semiconductor patterns (68) vertically stacked on the substrate and a first inner region, and wherein the second channel pattern comprises a second plurality of semiconductor patterns (68) vertically stacked on the substrate and a second inner region; forming a high-k dielectric layer (112b) covering the first channel pattern and the second channel pattern; forming a first protective mask (Fig 15a/b element 116a) filling the first inner region and the second inner region and surrounding the first channel pattern and the second channel pattern in an outer region, wherein the outer region comprises a remaining space on the first plurality of semiconductor patterns and the second plurality of semiconductor patterns excluding the first inner region and the second inner region; exposing at least part of a surface of the high-k dielectric layer by removing the first protective mask from the outer region (Fig 16 a/b); forming an additional mask layer (Fig 17a/b element 116b) covering the exposed surface of the high-k dielectric layer and sidewalls of the first protective mask, wherein the additional mask layer has no etch selectivity with the first protective mask (116a and 116 b may be made of the same material [0062],[0066] therefore they do not have etch selectivity since their etch rates would be the same); forming the first protective mask (116a) forming a photo mask layer covering the first region; and removing the additional mask layer(116b), and the first protective mask (116a) from the second region by using the photo mask layer as an etch mask. Wang is not relied upon to teach the second protective mask and thusly id not relied upon to teach forming a second protective mask having etch selectivity with the additional mask layer on the additional mask layer; the second protective mask in the first region, removing the second protective mask from the second region Lai teaches a similar method that does include the second protective mask and therefore is relied upon to teach forming a second protective mask (128 may be made of TiO2) having etch selectivity with the additional mask layer on the additional mask layer; (126 may be made of Al2O3 which do not have the same etch rate. Since the etch rate is different between the material the layers thusly have etch selectivity) (Lai Col 12 lines 59-63, Col 13 line 47-52) the second protective mask (128 Fig 16b) in the first region; the second protective mask from the second region (since the second protective mask is now disposed on top of the additional mask and first protective mask in order to remove the additional mask layer, and the first protective mask from the second region the second protective mask must also be removed) It would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to modify the device of Wang such that there is a second protective layer with etch selectivity with the additional mask layer, and as described in Lai because the modification allows for a thicker hard mask layer that protects against oxidization of the nanostructures and allows for the thickness of the interfacial layer to remain unchanged. (Lai Col 14-15 lines 63-6) Claim(s) 11-13 is/are rejected under 35 U.S.C. 103 as being unpatentable over Wang , and further in view of Ruqiang Bao et al. (US 9997519 B1) hereinafter referred to as “Bao”. Regarding Claim 11 Wang teaches The method of claim 1, further comprising, A high-k dielectric layer (112b) The first protective mask (116a) Wang does not teach forming a conductive layer before forming the first protective mask and therefore is not relied upon to teach after the forming the high-k dielectric layer and before the forming the first protective mask, forming a conductive layer covering the high-k dielectric layer, wherein the conductive layer fills only a part of the first inner region and the second inner region. Bao teaches a similar method for forming these channel structures and does teach after the forming the high-k dielectric layer (218) and before the forming the first protective mask (212) , forming a conductive layer (222) covering the high-k dielectric layer, wherein the conductive layer fills only a part of the first inner region and the second inner region.(Fig 2a) It would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to modify the device of Wang such that there is a conductive layer around the high-k dielectric layer before the first protective mask , as described in Bao because the modification of the placement of the conductive layer allows for the multiplicity of threshold voltages between the channel patterns. (Col 3 lines 10-61) Regarding Claim 12 Wang in view of Bao The method of claim 11, wherein the conductive layer comprises at least one of: one of aluminum, magnesium, calcium, strontium, vanadium, niobium, scandium, yttrium, lanthanum; a combination of one or more of aluminum, magnesium, calcium, strontium, vanadium, niobium, scandium, yttrium and lanthanum; a silicate of aluminum, magnesium, calcium, strontium, vanadium, niobium, scandium, yttrium, lanthanum, or any combination thereof; an oxynitride of aluminum, magnesium, calcium, strontium, vanadium, niobium, scandium, yttrium, lanthanum, or any combination thereof; a silicon oxynitride of aluminum, magnesium, calcium, strontium, vanadium, niobium, scandium, yttrium, lanthanum, or any combination thereof,; a P-type work function metal; or an N-type work function metal. (Wang teaches a similar conductive layer (114a) after the first protective mask layer comprising at least aluminum and/or a work-function metal (Para [0074]), while Bao teaches the conductive layer (222) before the protective mask comprising at least aluminum and/or a work-function metal (Col 7 lines 4-15) ) It would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to make the conductive layer out of these material whether that is before or after the first protective mask layer, as described in Wang and Bao because the material is thusly not affected if done before or after the first protective layer (Wang Para [0074], Bao (Col 7 lines 4-15) ) Regarding Claim 13 Wang in view of Bao teaches The method of claim 11, further comprising, Wang teaches after the forming the additional mask layer (116b Fig 17 a/b): forming a photo mask layer (118a Fig 18b) in the first region (50p); removing the additional mask layer(116b), the first protective mask(116a), by using the photo mask layer as an etch mask; and removing the photo mask layer, the additional mask layer, and the first protective mask from the first region. (fig 21b) since Wang is not relied upon to teach the conductive layer wang does not teach removing the conductive layer from the second region Bao however does teach removing (from Fig 2b to 3a) the conductive layer from the second region (right of Fig 3a) It would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to modify the device of Wang such that the conductive layer is placed and then removed, as described in Bao because the modification allows for the multiplicity of threshold voltages between the channel patterns. (Col 3 lines 10-61) Claim(s) 16-17 is/are rejected under 35 U.S.C. 103 as being unpatentable over Wang in view of Lai, and further in view of Bao Regarding Claim 16 Wang in view of Lai teaches The method of claim 15, further comprising, The first protective mask (116a) Wang in view of Lai does not teach a conductive layer before the first protective mask and therefore is not relied upon to teach after the forming the first channel pattern and the second channel pattern and before the forming the first protective mask, forming a conductive layer surrounding the first channel pattern and the second channel pattern. Bao teaches a similar method for forming these channel structures and does teach after the forming the first channel pattern (214) and the second channel pattern (214) and before the forming the first protective mask(212), forming a conductive layer (222) surrounding the first channel pattern and the second channel pattern.(Fig 2A) It would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to modify the device of Wang such that there is a conductive layer around the channel pattern before the first protective mask , as described in Bao because the modification of the placement of the conductive layer allows for the multiplicity of threshold voltages between the channel patterns. (Col 3 lines 10-61) Regarding Claim 17 Wang in view of Lai in view of Bao teaches The method of claim 16, further comprising, Wang in view of Lai further teach after the exposing the sidewall of the second protective mask and the sidewall of the additional mask layer, (since the second protective mask is now disposed on top of the additional mask order to remove the additional mask layer, from the second region the second protective mask must also be removed as taught in the rejection of claim 15 ) since Wang in view of Lai is not relied upon to teach the conductive layer they do not teach after, removing the conductive layer from the second region Bao however does teach removing (from Fig 2b to 3a) the conductive layer from the second region (right of Fig 3a) It would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to modify the device of Wang in view of Lai such that the conductive layer is placed and then removed, as described in Bao because the modification allows for the multiplicity of threshold voltages between the channel patterns. (Col 3 lines 10-61) Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Park; Junmo (US 20230029827 A1), Huang; Mao-Lin (US 20210336033 A1), Ando; Takashi (US 20200006356 A1), BAO R (US 20190355851 A1), Wang; Chun-Chieh (US 11410889 B2), Any inquiry concerning this communication or earlier communications from the examiner should be directed to JAIME LYNN SPRENGER whose telephone number is (571)272-8444. The examiner can normally be reached Monday - Friday, 9:00a.m. - 5:00p.m. ET.. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, SUE PURVIS can be reached at 571-272-1236. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /JAIME LYNN SPRENGER/ Examiner, Art Unit 2893 /SUE A PURVIS/ Supervisory Patent Examiner, Art Unit 2893
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Prosecution Timeline

May 20, 2024
Application Filed
Aug 13, 2026
Non-Final Rejection mailed — §102, §103 (current)

Precedent Cases

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Patent 12677542
DISPLAY PANEL AND ELECTRONIC APPARATUS INCLUDING THE SAME
2y 7m to grant Granted Jul 07, 2026
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Prosecution Projections

1-2
Expected OA Rounds
100%
Grant Probability
99%
With Interview (+0.0%)
2y 8m (~3m remaining)
Median Time to Grant
Low
PTA Risk
Based on 2 resolved cases by this examiner. Grant probability derived from career allowance rate.

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