Prosecution Insights
Last updated: September 27, 2026
Application No. 18/670,696

SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF

Non-Final OA §103
Filed
May 21, 2024
Priority
Mar 15, 2024 — TW 113109804
Examiner
HOANG, DZUNG T
Art Unit
Tech Center
Assignee
Hon Young Semiconductor Corporation
OA Round
1 (Non-Final)
71%
Grant Probability
Favorable
1-2
OA Rounds
2m
Est. Remaining
71%
With Interview

Examiner Intelligence

Grants 71% — above average
71%
Career Allowance Rate
5 granted / 7 resolved
+11.4% vs TC avg
Minimal +0% lift
Without
With
+0.0%
Interview Lift
resolved cases with interview
Typical timeline
2y 6m
Avg Prosecution
29 currently pending
Career history
23
Total Applications
across all art units

Statute-Specific Performance

§103
72.8%
+32.8% vs TC avg
§102
20.2%
-19.8% vs TC avg
§112
7.0%
-33.0% vs TC avg
Black line = Tech Center average estimate • Based on career data from 7 resolved cases

Office Action

§103
DETAILED ACTION Priority Receipt is acknowledged of certified copies of papers required by 37 CFR 1.55. Information Disclosure Statement The information disclosure statement (IDS) submitted on 5/21/2024 and 01/15/2025 were filed. The submission is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner. Election/Restrictions Applicant’s election without traverse of claims 1-15 in the reply filed on 7/20/2026 is acknowledged. Claims 16-20 are cancelled. Claims 1-15 remain pending in the application. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim(s) 1- 6 is/are rejected under 35 U.S.C. 103 as being unpatentable over Yu (US 5380678 A) in view of Lee (US 20250228144 A1) Regarding claim 1, Yu discloses (Fig. 5) A manufacturing method of a semiconductor device (col. 2, lines 16-29), comprising: forming a metal layer (112) over a substrate (100), wherein the metal layer has a void (114) therein; and performing a laser annealing process (laser planarization), wherein during the laser annealing process, the metal layer flows and fills the void, while the coating layer remains substantially solid (col. 3, lines 53-66; Fig. 6). Yu is silent regarding forming a coating layer fully covering the metal layer before the annealing process. Lee discloses (¶ [0031], Figs. 4, 5A) forming a coating layer (112) fully covering underlying layers (104, 102) before the annealing process (¶ [0031], Figs. 4, 5A). The coating layer of Lee serves purpose of heat absorption and transfer to the underlying layers during laser anneal with high absorption an efficiency. As such one of ordinary skill in the art before the effective filing date of the invention would have been motivated to add a coating layer as disclosed by Lee to the metal layer of Yu to efficiently transfer heat to the underlying metal layer. Regarding claim 2, Yu in view of Lee discloses the manufacturing method according to claim 1. Yu discloses the wherein the laser annealing process is performed through a laser having a wavelength (excimer pulse 308 nm, col. 4, lines 8-18) and the metal layer is preferably aluminum (col. 2, lines 55-62). The combination of the coating layer of Lee and the interconnect metal layer of Yu would allow for the reflectivity of the cap layer to be lower than that of the metal layer (characteristics of TiN vs Al). Regarding claim 3, Yu in view of Lee discloses the manufacturing method according to claim 1. The modified structure of Yu-Lee would allow for, under a process pressure of the laser annealing process, a boiling point of the coating layer is higher than a boiling point of the metal layer (characteristics of TiN vs Al). Regarding claim 4, Yu in view of Lee discloses the manufacturing method according to claim 1. Yu discloses the wherein the laser annealing process is performed through a laser having a wavelength of 308 nm and a pulse duration of 25 nanoseconds (col. 4, lines 15-18). Artisans in the art would have appreciated for laser annealing a suitable range of pulse duration affects how quickly and deeply the laser energy is delivered to the material to melt and fill the voids. As such, absent unpredictable results, one of ordinary skill in the art would have selected a pulse bandwidth of the laser in a range from about 80 nanoseconds to about 120 nanoseconds through routine optimization. Thus, it would have been obvious to one of ordinary skill in the art before the filing date of the invention to select a pulse bandwidth of the laser in a range from about 80 nanoseconds to about 120 nanoseconds for the laser annealing of the metal layer of Yu to optimize a variety of laser annealing applications. Regarding claim 5, Yu in view of Lee discloses the manufacturing method according to claim 1. The modified structure of Yu-Lee would allow for the wherein the coating layer to extend over the void. Regarding claim 6, Yu in view of Lee discloses the manufacturing method according to claim 1. Lee discloses (¶ [0031]) the coating layer is made of titanium or titanium nitride. Claim(s) 7-15 is/are rejected under 35 U.S.C. 103 as being unpatentable over Sato (US 20150076589 A1) in view of Yu (US 5380678 A) and Lee (US 20250228144 A1) Regarding claim 7, Sata discloses A manufacturing method (¶ [0004]) of a semiconductor device, comprising (Fig. 9): forming a contact structure (50) over a plurality of gate structures (42), wherein the gate structures are disposed on a semiconductor substrate (10) and spaced apart from each other, the contact structure extends between every adjacent two of the gate structures (Fig. 9). Sato is silent regarding the contact structure that has a void therein; forming a coating layer covering the contact structure; and performing a laser annealing process, wherein during the laser annealing process, the contact structure flows and fills the void, while the coating layer remains substantially solid. Though not mentioning the source electrode (contact structure) including voids during metal formation, Sato discloses the contact structure extending between every adjacent two of the gate structures, which is more likely a reason that the metal deposition would generate more voids in the openings (vias) between the gate structures. As such, it is predictable for artisans in the art to mitigate the voids issue in the contact structure. Examples of void mitigation in metal deposition is laser annealing as disclosed by Yu where voids generated in vias of an interconnect metal layer are filled with molten metal during a laser annealing process (Yu: Fig. 5, col. 3, lines 53-65). Thus, it would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to add the laser annealing method as taught by Yu to the intercontact metal layer of Sato to alleviate the voids potentially formed in the vias in the metal layers during the metal deposition. Doing that would densify the structure of the metal layer and improve ohmic connectivity in the metal contact layer. Adding Yu’s laser annealing process to Sato’s device would indeed improve electrical connectivity due to resistivity improvement. Voids in a metal contact generally create discontinuities in the conductive path and reduce the effective cross-section for current flow. In the world of laser annealing, Lee discloses (¶ [0031], Figs. 4, 5A) a top electrode (112) absorbs heat from laser beam (210). The top electrode made of TiN having a high absorption efficiency to the laser beam of less than 400 nm. As such one of ordinary skill in the art before the effective filing date of the invention would have been motivated to add a high heat absorption layer (cap layer) as disclosed by Lee to the metal layer of Sato-Yu to efficiently preserve the heat required for the reflow of metal to fill the void. Doing so would allow for the laser beam heat to be absorbed and preserved to pass down to the metal layer underneath and then melt the metal to reflow the voids. While Sato is silent regarding the material of the contact structure, Yu discloses the metal layer is preferably aluminum (col. 2, lines 55-62). Artisans in the art would have appreciated highly conductive materials generally have higher reflectivity due to their free electrons, which efficiently reflect incident light. It is predictable to for one of ordinary skill in the art to before the effective filing date of the invention to substitute the interconnect metal of Yu for the contact structure of Sato for a diversity of application. Thus, the modified device of Sato would result in an aluminum contact layer (Yu) and a TiN cap layer (Lee). Regarding claim 8, Sato in view of Yu and Lee discloses the manufacturing method according to claim 7. The modified device of Sato-Yu-Lee would result in a cap layer having lower reflectivity than that of the metal contact (characteristics of TiN vs Al). Regarding claim 9, Sato in view of Yu and Lee discloses the manufacturing method according to claim 7. The modified device of Sato-Yu-Lee would result in the void being in between two of the structure. Regarding claim 10, Sato in view of Yu and Lee discloses the manufacturing method according to claim 7. Sato discloses (Fig. 9) wherein the contact structure (50) is electrically connected to a source region (34) and the source region is disposed between the semiconductor substrate and the contact structure. Regarding claim 11, Sato in view of Yu and Lee discloses the manufacturing method according to claim 7. The modified device of Sato-Yu-Lee would allow for the coating layer to extend over the void. Regarding claim 12, Sato in view of Yu and Lee discloses the manufacturing method according to claim 7. Yu further discloses (Fig.5) : forming a barrier metal layer (108, 110) around the lining of the via structure. The modified device of Sato-Yu-Lee would include the laser annealing process such that interlayer insulation films (Sato: 44, Fig. 9, ¶ [0057]) around the lining of the gate structures and the semiconductor substrate would be reasonably expected to be substituted with the barrier layer to protect the gate structure during laser annealing process, wherein forming the contact structure comprises forming the contact structure over the gate structures and on the barrier metal layer. Regarding claim 13, Sato in view of Yu and Lee discloses the manufacturing method according to claim 7. The modified device of Sato-Yu-Lee would allow for, under a process pressure of the laser annealing process, a boiling point of the coating layer is higher than a boiling point of the contact structure (characteristics of TiN vs Al). Regarding claim 14, Sato in view of Yu and Lee discloses the manufacturing method according to claim 7. Yu discloses the wherein the laser annealing process is performed through a laser having a wavelength of 308 nm and a pulse duration of 25 nanoseconds (col. 4, lines 15-18). Artisans in the art would have appreciated for laser annealing a suitable range of pulse duration affects how quickly and deeply the laser energy is delivered to the material to melt and fill the voids. As such, absent unpredictable results, one of ordinary skill in the art would have selected a pulse bandwidth of the laser in a range from about 80 nanoseconds to about 120 nanoseconds through routine optimization. Thus, it would have been obvious to one of ordinary skill in the art before the filing date of the invention to select a pulse bandwidth of the laser in a range from about 80 nanoseconds to about 120 nanoseconds for the laser annealing of the metal layer of Yu to optimize a variety of laser annealing applications. Regarding claim 15, Sato in view of Yu and Lee discloses the manufacturing method according to claim 7. The modified device of Sato-Yu-Lee would allow for the coating layer being made of titanium or titanium nitride (Lee). Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to DZUNG T HOANG whose telephone number is (571)272-5622. The examiner can normally be reached M-F 8:00 - 5:00. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Leonard Chang can be reached at 571-270-3691. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /DTH/Examiner, Art Unit 2898 /Leonard Chang/Supervisory Patent Examiner, Art Unit 2898
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Prosecution Timeline

May 21, 2024
Application Filed
Sep 09, 2026
Non-Final Rejection mailed — §103 (current)

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Prosecution Projections

1-2
Expected OA Rounds
71%
Grant Probability
71%
With Interview (+0.0%)
2y 6m (~2m remaining)
Median Time to Grant
Low
PTA Risk
Based on 7 resolved cases by this examiner. Grant probability derived from career allowance rate.

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